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spt_lp.cfg
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spt_lp.cfg
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spt_lp {
include csme_region {
cse_cfg = "cfg/csme.cfg";
},
device thub {
type = tracehub;
bus = pch_prim;
bus_no = 0;
device_no = 31;
func_no = 7;
bar0 = 0xF7400000;
bar3 = 0xF7000000;
fake_probe = 1;
command = 2;
},
device fspi {
type = fastspi;
bus = pch_prim;
bus_no = 0;
device_no = 25;
func_no = 0;
sai = 0x40;
bar0 = 0xF461E000;
bar1 = 0xF3000000;
bar2 = 0xF2000000;
command = 2;
rom_image = "testmod/unpack_img/test_img_c.bin";
region_0_base = 0x0000;
region_0_limit = 0x1000;
region_0_csme_readable = 1;
region_2_base = 0x3000;
region_2_limit = 0x6FD000;
region_2_csme_readable = 1;
region_2_csme_writeable = 1;
jedec_00 = 0xEF;
jedec_01 = 0x40;
jedec_02 = 0x18;
comp_0_vscc = 0xFFD820E5;
comp_0_par_data_0 = 0xFFF120E5;
},
device pmc {
type = pmc;
bus = pch_prim;
bus_no = 0;
device_no = 26;
func_no = 0;
bar0 = 0xF461A000;
bar1 = 0xF4628000;
command = 2;
sai = 0x2A;
d31id = 0x9D00;
},
device fusectl {
type = fusectl;
endpoint = 0xD5;
sai = 0x24;
},
device dfxagg {
type = dfxagg;
endpoint = 0xB7;
sai = 0x2E;
puid = 0x012345678ABCDEF;
},
device exi {
type = exi;
endpoint = 0xB8;
sai = 0x2E;
ectrl = 0x100;
},
library rom_user {
path = "testmod/romlib";
base = 0x1000;
tstamp_read = 0x1010;
write_seg_32 = 0x11B9;
write_seg_16 = 0x11BE;
write_seg_8 = 0x11C3;
read_seg_32 = 0x11C8;
read_seg_16 = 0x11CD;
read_seg_8 = 0x11D2;
write_seg = 0x11D7;
read_seg = 0x11DC;
}
}