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Fixed register allocation when ADD/SUB/MUL two references in tracing JIT
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The bug was introdueced by 7690fa0 and
leaded to failure in `make test TESTS="-d opcache.jit=1254 --repeat 3 ext/date/tests/bug30096.phpt"`
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dstogov committed Aug 30, 2021
1 parent d3a6054 commit f1f4403
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Showing 3 changed files with 16 additions and 8 deletions.
3 changes: 3 additions & 0 deletions ext/opcache/jit/zend_jit_arm64.dasc
Original file line number Diff line number Diff line change
Expand Up @@ -99,6 +99,9 @@ const char* zend_reg_name[] = {
#define ZREG_FCARG1x ZREG_X0
#define ZREG_FCARG2x ZREG_X1

#define ZREG_FCARG1 ZREG_FCARG1x
#define ZREG_FCARG2 ZREG_FCARG2x

|.type EX, zend_execute_data, FP
|.type OP, zend_op
|.type ZVAL, zval
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18 changes: 10 additions & 8 deletions ext/opcache/jit/zend_jit_trace.c
Original file line number Diff line number Diff line change
Expand Up @@ -4209,9 +4209,12 @@ static const void *zend_jit_trace(zend_jit_trace_rec *trace_buffer, uint32_t par
// case ZEND_DIV: // TODO: check for division by zero ???
op1_info = OP1_INFO();
op1_addr = OP1_REG_ADDR();
if (opline->op1_type != IS_CONST
&& orig_op1_type != IS_UNKNOWN
&& (orig_op1_type & IS_TRACE_REFERENCE)) {
op2_info = OP2_INFO();
op2_addr = OP2_REG_ADDR();
if (orig_op1_type != IS_UNKNOWN
&& (orig_op1_type & IS_TRACE_REFERENCE)
&& (Z_MODE(op2_addr) != IS_REG || Z_REG(op2_addr) != ZREG_FCARG1)
&& (orig_op2_type == IS_UNKNOWN || !(orig_op2_type & IS_TRACE_REFERENCE))) {
if (!zend_jit_fetch_reference(&dasm_state, opline, orig_op1_type, &op1_info, &op1_addr,
!ssa->var_info[ssa_op->op1_use].guarded_reference, 1)) {
goto jit_failure;
Expand All @@ -4223,11 +4226,10 @@ static const void *zend_jit_trace(zend_jit_trace_rec *trace_buffer, uint32_t par
} else {
CHECK_OP1_TRACE_TYPE();
}
op2_info = OP2_INFO();
op2_addr = OP2_REG_ADDR();
if (opline->op2_type != IS_CONST
&& orig_op2_type != IS_UNKNOWN
&& (orig_op2_type & IS_TRACE_REFERENCE)) {
if (orig_op2_type != IS_UNKNOWN
&& (orig_op2_type & IS_TRACE_REFERENCE)
&& (Z_MODE(op1_addr) != IS_REG || Z_REG(op1_addr) != ZREG_FCARG1)
&& (orig_op1_type == IS_UNKNOWN || !(orig_op1_type & IS_TRACE_REFERENCE))) {
if (!zend_jit_fetch_reference(&dasm_state, opline, orig_op2_type, &op2_info, &op2_addr,
!ssa->var_info[ssa_op->op2_use].guarded_reference, 1)) {
goto jit_failure;
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3 changes: 3 additions & 0 deletions ext/opcache/jit/zend_jit_x86.dasc
Original file line number Diff line number Diff line change
Expand Up @@ -133,6 +133,9 @@ const char* zend_reg_name[] = {
# define ZREG_FCARG2a ZREG_RDX
#endif

#define ZREG_FCARG1 ZREG_FCARG1a
#define ZREG_FCARG2 ZREG_FCARG2a

|.type EX, zend_execute_data, FP
|.type OP, zend_op
|.type ZVAL, zval
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