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Add 40 more asm.describe for Thumb2
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radare committed Mar 27, 2017
1 parent 2ce093b commit 6de4961
Showing 1 changed file with 42 additions and 1 deletion.
43 changes: 42 additions & 1 deletion libr/asm/d/arm
@@ -1,8 +1,10 @@
adc=add with carry
add=add two values
adds=add two values and update flags
addeq=add two values if Z set (equal)
addne=add two values if Z clear (not equal)
and=logical AND
ands=logical AND that updates flags
andeq=logical AND if Z set (equal)
andne=logical AND if Z clear (not equal)
b=branches the program counter to dst (pc aka r15)
Expand Down Expand Up @@ -31,26 +33,34 @@ cmp=compare
cmp=compares two registers
cps=change processor state
eor=logical exclusive OR (XOR)
eors=logical exclusive OR (XOR) and update flags
eoreq=logical exclusive OR (XOR) if Z set (equal)
eorne=logical exclusive OR (XOR) if Z clear (not equal)
flt=armfpu: convert int to float: flt
ldc=load from memory to coprocessor
ldf=armfpu: load float value pointed by reg+(offset): ldf f0, [r0,#off]
ldm.w=load multiple words from memory into registers
ldmda=decrement after
ldmdb=decrement before
ldmia=incrememnt after
ldmib=increment before
ldr=load from memory to register
ldr.w=load from memory to register
ldrb=load byte from memory to register
ldrb.w=load from memory to register
ldreq=load from memory to register if Z set (equal)
ldrne=load from memory to register if Z clear (not equal)
mcr=move to coprocessor from ARM register
mcrr=move to coprocessor from two ARM register
mov.w=move 3byte immediate into register
mov=move value between registers
movs=move byte into register
movs=move immediate into register and update flags
asr=arithmetic shift right
asrs=arithmetic shift right and update flags
movt=write 16 bit value on top of halfword
movw=write 16 bit value on lower bits
orr=logical inclusive OR
orrs=logical inclusive OR and update flags
orreq=logical inclusive OR if Z set (equal)
orrne=logical inclusive OR if Z clear (not equal)
rfe=return from exception (loads pc+cpsr)
Expand All @@ -63,10 +73,17 @@ stc=store coprocessor register
stc=store from coprocessor to memory
stf=armfpu: store float value pointed by reg+(offset): ldf [r0,#off]
str=store register into memory
strb=store byte value in register into memory
strb.w=store byte value in register into memory
strh=store byte value in register into memory
strh.w=store byte value in register into memory
strd=store floating point value in memory
streq=store register into memory if Z set (equal)
strne=store register into memory if Z clear (not equal)
sub=substract two values
subs=substract two values and update flags
lsr=logical shift right
lsrs=logical shift right and update flags
subeq=substract two values if Z set (equal)
subne=substract two values if Z clear (not equal)
svc=supervisor call
Expand All @@ -79,3 +96,27 @@ uxtab=zero extend byte to word, add
vadd=vector add
vsri=vector shift right and insert
wfs=armfpu: write fp status register. wfs r0
cpsie=quick version of msr, but only permit i and f, not a
cpsid=quick version of msr, but only permit i and f, not a
uxth=extracts bits[15:0] and zero extends to 32 bits.
sxth=extracts bits[15:0] and sign extends to 32 bits.
uxtb=extracts bits[7:0] and zero extends to 32 bits.
sxtb=extracts bits[7:0] and sign extends to 32 bits.
pop=load N elements from stack into given registers
vldmia=vector load memory into paired registers
pop.w=load N words from stack into registers
it=if then
bics=Bitwise bit clear (shifted register), setting the condition flags.
bics.w=word bitwise bit clear and update flags
udiv=unsigned division
sdiv=signed division
mul=multiply
mla=multiply and accumulate
mls=multiply and substract
rsbs=subtracts the value from zero, producing the arithmetic negative of the value, and updates flags
rsbs.w=substract the negative value
uxtab=zero extend Byte and Add. Extends an 8-bit value to a 32-bit value.
uxtb.w=zero textend word and add, extend to 32bit value
wfi=wait for interrupt
wfe=wait for event
yield=alias for hint instructrion

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