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attiny_hal::pac::exint::pcmsk::W missing BitWriterRaw implementation? #130
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Transferred this issue to the It seems the register information is incorrect here. The way to fix is this adding a YAML patch to correct it. For example, here we have a patch which sets a field read-only: avr-device/patch/common/pll.yaml Lines 6 to 10 in aa5b202
we'd need a similar patch to set this field to |
Thanks, @Rahix! I'll have a look and see what I can do. |
@Rahix I don't think that it's a read/write issue, but that the fields are missing. Compare with <register>
<name>GIMSK</name>
<description>General Interrupt Mask Register</description>
<addressOffset>0x26</addressOffset>
<size>0x8</size>
<access>read-write</access>
<fields>
<field>
<name>PCIE</name>
<description>Pin Change Interrupt Enable</description>
<bitRange>[5:5]</bitRange>
<access>read-write</access>
</field>
<field>
<name>INT0</name>
<description>External Interrupt Request 0 Enable</description>
<bitRange>[6:6]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PCMSK</name>
<description>Pin Change Enable Mask</description>
<addressOffset>0x0</addressOffset>
<size>0x8</size>
<access>read-write</access>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>255</maximum>
</range>
</writeConstraint>
</register> So I tried to patch PCMSK:
_add:
PCINT0:
description: Enable pin change interrupt on pin 0
bitOffset: 0
bitWidth: 1
access: read-write
PCINT1:
description: Enable pin change interrupt on pin 1
bitOffset: 1
bitWidth: 1
access: read-write
PCINT2:
description: Enable pin change interrupt on pin 2
bitOffset: 2
bitWidth: 1
access: read-write
PCINT3:
description: Enable pin change interrupt on pin 3
bitOffset: 3
bitWidth: 1
access: read-write
PCINT4:
description: Enable pin change interrupt on pin 4
bitOffset: 4
bitWidth: 1
access: read-write
PCINT5:
description: Enable pin change interrupt on pin 5
bitOffset: 5
bitWidth: 1
access: read-write Unfortunately that doesn't work and I don't get why:
I can modify |
It's looking for EXINT:
PCMSK:
_add:
PCINT0:
... |
Thanks, that worked :) Currently the PCMSK has a write constraint: <register>
<name>PCMSK</name>
…
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>255</maximum>
</range>
</writeConstraint> Since the two most significant bits are reserved, I'd like to change the write constraint to 63 max, but again, I fail: EXINT:
_modify:
PCMSK:
_write_constraint: [0, 63]
I think this should work, according to the svdtools docs. Can you please show me my mistake once more? Apart from that , the PR would be ready. |
Hmm, this might be because we're relying on an old version of this tool...
Please send it :) Let's continue there, it's easier for me if I have the code in front of me as well. |
Done: #131 |
@Rahix ping? |
Hello,
I'm only a rookie, but this seems strange for me: When I want to change the
PCMSK
register, there is no way to access single bits, like there is e.g. for theGIMSK
:There aren't even constants for the single bits…
I'd expect to be able to do this:
Am I right?
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