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bcm2835-sdhost.c
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bcm2835-sdhost.c
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/*
* BCM2835 SD host driver.
*
* Author: Phil Elwell <phil@raspberrypi.org>
* Copyright (C) 2015-2016 Raspberry Pi (Trading) Ltd.
*
* Based on
* mmc-bcm2835.c by Gellert Weisz
* which is, in turn, based on
* sdhci-bcm2708.c by Broadcom
* sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
* sdhci.c and sdhci-pci.c by Pierre Ossman
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#define FIFO_READ_THRESHOLD 4
#define FIFO_WRITE_THRESHOLD 4
#define ALLOW_CMD23_READ 1
#define ALLOW_CMD23_WRITE 0
#define ENABLE_LOG 1
#define SDDATA_FIFO_PIO_BURST 8
#define CMD_DALLY_US 1
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/mmc/mmc.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sd.h>
#include <linux/mmc/sdio.h>
#include <linux/scatterlist.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/blkdev.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/of_dma.h>
#include <linux/time.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/highmem.h>
#include <soc/bcm2835/raspberrypi-firmware.h>
/* For mmc_card_blockaddr */
#include "../core/card.h"
#define DRIVER_NAME "sdhost-bcm2835"
#define SDCMD 0x00 /* Command to SD card - 16 R/W */
#define SDARG 0x04 /* Argument to SD card - 32 R/W */
#define SDTOUT 0x08 /* Start value for timeout counter - 32 R/W */
#define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */
#define SDRSP0 0x10 /* SD card response (31:0) - 32 R */
#define SDRSP1 0x14 /* SD card response (63:32) - 32 R */
#define SDRSP2 0x18 /* SD card response (95:64) - 32 R */
#define SDRSP3 0x1c /* SD card response (127:96) - 32 R */
#define SDHSTS 0x20 /* SD host status - 11 R */
#define SDVDD 0x30 /* SD card power control - 1 R/W */
#define SDEDM 0x34 /* Emergency Debug Mode - 13 R/W */
#define SDHCFG 0x38 /* Host configuration - 2 R/W */
#define SDHBCT 0x3c /* Host byte count (debug) - 32 R/W */
#define SDDATA 0x40 /* Data to/from SD card - 32 R/W */
#define SDHBLC 0x50 /* Host block count (SDIO/SDHC) - 9 R/W */
#define SDCMD_NEW_FLAG 0x8000
#define SDCMD_FAIL_FLAG 0x4000
#define SDCMD_BUSYWAIT 0x800
#define SDCMD_NO_RESPONSE 0x400
#define SDCMD_LONG_RESPONSE 0x200
#define SDCMD_WRITE_CMD 0x80
#define SDCMD_READ_CMD 0x40
#define SDCMD_CMD_MASK 0x3f
#define SDCDIV_MAX_CDIV 0x7ff
#define SDHSTS_BUSY_IRPT 0x400
#define SDHSTS_BLOCK_IRPT 0x200
#define SDHSTS_SDIO_IRPT 0x100
#define SDHSTS_REW_TIME_OUT 0x80
#define SDHSTS_CMD_TIME_OUT 0x40
#define SDHSTS_CRC16_ERROR 0x20
#define SDHSTS_CRC7_ERROR 0x10
#define SDHSTS_FIFO_ERROR 0x08
/* Reserved */
/* Reserved */
#define SDHSTS_DATA_FLAG 0x01
#define SDHSTS_TRANSFER_ERROR_MASK (SDHSTS_CRC7_ERROR|SDHSTS_CRC16_ERROR|SDHSTS_REW_TIME_OUT|SDHSTS_FIFO_ERROR)
#define SDHSTS_ERROR_MASK (SDHSTS_CMD_TIME_OUT|SDHSTS_TRANSFER_ERROR_MASK)
#define SDHCFG_BUSY_IRPT_EN (1<<10)
#define SDHCFG_BLOCK_IRPT_EN (1<<8)
#define SDHCFG_SDIO_IRPT_EN (1<<5)
#define SDHCFG_DATA_IRPT_EN (1<<4)
#define SDHCFG_SLOW_CARD (1<<3)
#define SDHCFG_WIDE_EXT_BUS (1<<2)
#define SDHCFG_WIDE_INT_BUS (1<<1)
#define SDHCFG_REL_CMD_LINE (1<<0)
#define SDEDM_FORCE_DATA_MODE (1<<19)
#define SDEDM_CLOCK_PULSE (1<<20)
#define SDEDM_BYPASS (1<<21)
#define SDEDM_WRITE_THRESHOLD_SHIFT 9
#define SDEDM_READ_THRESHOLD_SHIFT 14
#define SDEDM_THRESHOLD_MASK 0x1f
#define SDEDM_FSM_MASK 0xf
#define SDEDM_FSM_IDENTMODE 0x0
#define SDEDM_FSM_DATAMODE 0x1
#define SDEDM_FSM_READDATA 0x2
#define SDEDM_FSM_WRITEDATA 0x3
#define SDEDM_FSM_READWAIT 0x4
#define SDEDM_FSM_READCRC 0x5
#define SDEDM_FSM_WRITECRC 0x6
#define SDEDM_FSM_WRITEWAIT1 0x7
#define SDEDM_FSM_POWERDOWN 0x8
#define SDEDM_FSM_POWERUP 0x9
#define SDEDM_FSM_WRITESTART1 0xa
#define SDEDM_FSM_WRITESTART2 0xb
#define SDEDM_FSM_GENPULSES 0xc
#define SDEDM_FSM_WRITEWAIT2 0xd
#define SDEDM_FSM_STARTPOWDOWN 0xf
#define SDDATA_FIFO_WORDS 16
#define USE_CMD23_FLAGS ((ALLOW_CMD23_READ * MMC_DATA_READ) | \
(ALLOW_CMD23_WRITE * MMC_DATA_WRITE))
#define MHZ 1000000
struct bcm2835_host {
spinlock_t lock;
void __iomem *ioaddr;
phys_addr_t bus_addr;
struct mmc_host *mmc;
u32 pio_timeout; /* In jiffies */
int clock; /* Current clock speed */
bool slow_card; /* Force 11-bit divisor */
unsigned int max_clk; /* Max possible freq */
struct tasklet_struct finish_tasklet; /* Tasklet structures */
struct work_struct cmd_wait_wq; /* Workqueue function */
struct timer_list timer; /* Timer for timeouts */
struct sg_mapping_iter sg_miter; /* SG state for PIO */
unsigned int blocks; /* remaining PIO blocks */
int irq; /* Device IRQ */
u32 cmd_quick_poll_retries;
u32 ns_per_fifo_word;
/* cached registers */
u32 hcfg;
u32 cdiv;
struct mmc_request *mrq; /* Current request */
struct mmc_command *cmd; /* Current command */
struct mmc_data *data; /* Current data request */
unsigned int data_complete:1; /* Data finished before cmd */
unsigned int flush_fifo:1; /* Drain the fifo when finishing */
unsigned int use_busy:1; /* Wait for busy interrupt */
unsigned int use_sbc:1; /* Send CMD23 */
unsigned int debug:1; /* Enable debug output */
unsigned int firmware_sets_cdiv:1; /* Let the firmware manage the clock */
unsigned int reset_clock:1; /* Reset the clock fore the next request */
/*DMA part*/
struct dma_chan *dma_chan_rxtx; /* DMA channel for reads and writes */
struct dma_chan *dma_chan; /* Channel in use */
struct dma_slave_config dma_cfg_rx;
struct dma_slave_config dma_cfg_tx;
struct dma_async_tx_descriptor *dma_desc;
u32 dma_dir;
u32 drain_words;
struct page *drain_page;
u32 drain_offset;
bool allow_dma;
bool use_dma;
/*end of DMA part*/
int max_delay; /* maximum length of time spent waiting */
struct timespec64 stop_time; /* when the last stop was issued */
u32 delay_after_stop; /* minimum time between stop and subsequent data transfer */
u32 delay_after_this_stop; /* minimum time between this stop and subsequent data transfer */
u32 user_overclock_50; /* User's preferred frequency to use when 50MHz is requested (in MHz) */
u32 overclock_50; /* frequency to use when 50MHz is requested (in MHz) */
u32 overclock; /* Current frequency if overclocked, else zero */
u32 pio_limit; /* Maximum block count for PIO (0 = always DMA) */
u32 sectors; /* Cached card size in sectors */
};
#if ENABLE_LOG
struct log_entry_struct {
char event[4];
u32 timestamp;
u32 param1;
u32 param2;
};
typedef struct log_entry_struct LOG_ENTRY_T;
LOG_ENTRY_T *sdhost_log_buf;
dma_addr_t sdhost_log_addr;
static u32 sdhost_log_idx;
static spinlock_t log_lock;
static void __iomem *timer_base;
#define LOG_ENTRIES (256*1)
#define LOG_SIZE (sizeof(LOG_ENTRY_T)*LOG_ENTRIES)
static void log_init(struct device *dev, u32 bus_to_phys)
{
spin_lock_init(&log_lock);
sdhost_log_buf = dma_alloc_coherent(dev, LOG_SIZE, &sdhost_log_addr,
GFP_KERNEL);
if (sdhost_log_buf) {
pr_info("sdhost: log_buf @ %p (%llx)\n",
sdhost_log_buf, (u64)sdhost_log_addr);
timer_base = ioremap(bus_to_phys + 0x7e003000, SZ_4K);
if (!timer_base)
pr_err("sdhost: failed to remap timer\n");
}
else
pr_err("sdhost: failed to allocate log buf\n");
}
static void log_event_impl(const char *event, u32 param1, u32 param2)
{
if (sdhost_log_buf) {
LOG_ENTRY_T *entry;
unsigned long flags;
spin_lock_irqsave(&log_lock, flags);
entry = sdhost_log_buf + sdhost_log_idx;
memcpy(entry->event, event, 4);
entry->timestamp = (readl(timer_base + 4) & 0x3fffffff) +
(smp_processor_id()<<30);
entry->param1 = param1;
entry->param2 = param2;
sdhost_log_idx = (sdhost_log_idx + 1) % LOG_ENTRIES;
spin_unlock_irqrestore(&log_lock, flags);
}
}
static void log_dump(void)
{
if (sdhost_log_buf) {
LOG_ENTRY_T *entry;
unsigned long flags;
int idx;
spin_lock_irqsave(&log_lock, flags);
idx = sdhost_log_idx;
do {
entry = sdhost_log_buf + idx;
if (entry->event[0] != '\0')
pr_info("[%08x] %.4s %x %x\n",
entry->timestamp,
entry->event,
entry->param1,
entry->param2);
idx = (idx + 1) % LOG_ENTRIES;
} while (idx != sdhost_log_idx);
spin_unlock_irqrestore(&log_lock, flags);
}
}
#define log_event(event, param1, param2) log_event_impl(event, (u32)(uintptr_t)param1, (u32)(uintptr_t)param2)
#else
#define log_init(x) (void)0
#define log_event(event, param1, param2) (void)0
#define log_dump() (void)0
#endif
static inline void bcm2835_sdhost_write(struct bcm2835_host *host, u32 val, int reg)
{
writel(val, host->ioaddr + reg);
}
static inline u32 bcm2835_sdhost_read(struct bcm2835_host *host, int reg)
{
return readl(host->ioaddr + reg);
}
static inline u32 bcm2835_sdhost_read_relaxed(struct bcm2835_host *host, int reg)
{
return readl_relaxed(host->ioaddr + reg);
}
static void bcm2835_sdhost_dumpcmd(struct bcm2835_host *host,
struct mmc_command *cmd,
const char *label)
{
if (cmd)
pr_info("%s:%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n",
mmc_hostname(host->mmc),
(cmd == host->cmd) ? '>' : ' ',
label, cmd->opcode, cmd->arg, cmd->flags,
cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3],
cmd->error);
}
static void bcm2835_sdhost_dumpregs(struct bcm2835_host *host)
{
if (host->mrq)
{
bcm2835_sdhost_dumpcmd(host, host->mrq->sbc, "sbc");
bcm2835_sdhost_dumpcmd(host, host->mrq->cmd, "cmd");
if (host->mrq->data)
pr_info("%s: data blocks %x blksz %x - err %d\n",
mmc_hostname(host->mmc),
host->mrq->data->blocks,
host->mrq->data->blksz,
host->mrq->data->error);
bcm2835_sdhost_dumpcmd(host, host->mrq->stop, "stop");
}
pr_info("%s: =========== REGISTER DUMP ===========\n",
mmc_hostname(host->mmc));
pr_info("%s: SDCMD 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDCMD));
pr_info("%s: SDARG 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDARG));
pr_info("%s: SDTOUT 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDTOUT));
pr_info("%s: SDCDIV 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDCDIV));
pr_info("%s: SDRSP0 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDRSP0));
pr_info("%s: SDRSP1 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDRSP1));
pr_info("%s: SDRSP2 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDRSP2));
pr_info("%s: SDRSP3 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDRSP3));
pr_info("%s: SDHSTS 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDHSTS));
pr_info("%s: SDVDD 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDVDD));
pr_info("%s: SDEDM 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDEDM));
pr_info("%s: SDHCFG 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDHCFG));
pr_info("%s: SDHBCT 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDHBCT));
pr_info("%s: SDHBLC 0x%08x\n",
mmc_hostname(host->mmc),
bcm2835_sdhost_read(host, SDHBLC));
pr_info("%s: ===========================================\n",
mmc_hostname(host->mmc));
}
static void bcm2835_sdhost_set_power(struct bcm2835_host *host, bool on)
{
bcm2835_sdhost_write(host, on ? 1 : 0, SDVDD);
}
static void bcm2835_sdhost_reset_internal(struct bcm2835_host *host)
{
u32 temp;
if (host->debug)
pr_info("%s: reset\n", mmc_hostname(host->mmc));
bcm2835_sdhost_set_power(host, false);
bcm2835_sdhost_write(host, 0, SDCMD);
bcm2835_sdhost_write(host, 0, SDARG);
bcm2835_sdhost_write(host, 0xf00000, SDTOUT);
bcm2835_sdhost_write(host, 0, SDCDIV);
bcm2835_sdhost_write(host, 0x7f8, SDHSTS); /* Write 1s to clear */
bcm2835_sdhost_write(host, 0, SDHCFG);
bcm2835_sdhost_write(host, 0, SDHBCT);
bcm2835_sdhost_write(host, 0, SDHBLC);
/* Limit fifo usage due to silicon bug */
temp = bcm2835_sdhost_read(host, SDEDM);
temp &= ~((SDEDM_THRESHOLD_MASK<<SDEDM_READ_THRESHOLD_SHIFT) |
(SDEDM_THRESHOLD_MASK<<SDEDM_WRITE_THRESHOLD_SHIFT));
temp |= (FIFO_READ_THRESHOLD << SDEDM_READ_THRESHOLD_SHIFT) |
(FIFO_WRITE_THRESHOLD << SDEDM_WRITE_THRESHOLD_SHIFT);
bcm2835_sdhost_write(host, temp, SDEDM);
mdelay(10);
bcm2835_sdhost_set_power(host, true);
mdelay(10);
host->clock = 0;
host->sectors = 0;
bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
bcm2835_sdhost_write(host, SDCDIV_MAX_CDIV, SDCDIV);
}
static void bcm2835_sdhost_reset(struct mmc_host *mmc)
{
struct bcm2835_host *host = mmc_priv(mmc);
unsigned long flags;
spin_lock_irqsave(&host->lock, flags);
log_event("RST<", 0, 0);
bcm2835_sdhost_reset_internal(host);
spin_unlock_irqrestore(&host->lock, flags);
}
static void bcm2835_sdhost_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
static void bcm2835_sdhost_init(struct bcm2835_host *host, int soft)
{
pr_debug("bcm2835_sdhost_init(%d)\n", soft);
/* Set interrupt enables */
host->hcfg = SDHCFG_BUSY_IRPT_EN;
bcm2835_sdhost_reset_internal(host);
if (soft) {
/* force clock reconfiguration */
host->clock = 0;
bcm2835_sdhost_set_ios(host->mmc, &host->mmc->ios);
}
}
static void bcm2835_sdhost_wait_transfer_complete(struct bcm2835_host *host)
{
int timediff;
u32 alternate_idle;
u32 edm;
alternate_idle = (host->mrq->data->flags & MMC_DATA_READ) ?
SDEDM_FSM_READWAIT : SDEDM_FSM_WRITESTART1;
edm = bcm2835_sdhost_read(host, SDEDM);
log_event("WTC<", edm, 0);
timediff = 0;
while (1) {
u32 fsm = edm & SDEDM_FSM_MASK;
if ((fsm == SDEDM_FSM_IDENTMODE) ||
(fsm == SDEDM_FSM_DATAMODE))
break;
if (fsm == alternate_idle) {
bcm2835_sdhost_write(host,
edm | SDEDM_FORCE_DATA_MODE,
SDEDM);
break;
}
timediff++;
if (timediff == 100000) {
pr_err("%s: wait_transfer_complete - still waiting after %d retries\n",
mmc_hostname(host->mmc),
timediff);
log_dump();
bcm2835_sdhost_dumpregs(host);
host->mrq->data->error = -ETIMEDOUT;
log_event("WTC!", edm, 0);
return;
}
cpu_relax();
edm = bcm2835_sdhost_read(host, SDEDM);
}
log_event("WTC>", edm, 0);
}
static void bcm2835_sdhost_finish_data(struct bcm2835_host *host);
static void bcm2835_sdhost_dma_complete(void *param)
{
struct bcm2835_host *host = param;
struct mmc_data *data = host->data;
unsigned long flags;
spin_lock_irqsave(&host->lock, flags);
log_event("DMA<", host->data, bcm2835_sdhost_read(host, SDHSTS));
log_event("DMA ", bcm2835_sdhost_read(host, SDCMD),
bcm2835_sdhost_read(host, SDEDM));
if (host->dma_chan) {
dma_unmap_sg(host->dma_chan->device->dev,
data->sg, data->sg_len,
host->dma_dir);
host->dma_chan = NULL;
}
if (host->drain_words) {
void *page;
u32 *buf;
if (host->drain_offset & PAGE_MASK) {
host->drain_page += host->drain_offset >> PAGE_SHIFT;
host->drain_offset &= ~PAGE_MASK;
}
page = kmap_atomic(host->drain_page);
buf = page + host->drain_offset;
while (host->drain_words) {
u32 edm = bcm2835_sdhost_read(host, SDEDM);
if ((edm >> 4) & 0x1f)
*(buf++) = bcm2835_sdhost_read(host,
SDDATA);
host->drain_words--;
}
kunmap_atomic(page);
}
bcm2835_sdhost_finish_data(host);
log_event("DMA>", host->data, 0);
spin_unlock_irqrestore(&host->lock, flags);
}
static void bcm2835_sdhost_read_block_pio(struct bcm2835_host *host)
{
unsigned long flags;
size_t blksize, len;
u32 *buf;
unsigned long wait_max;
blksize = host->data->blksz;
wait_max = jiffies + msecs_to_jiffies(host->pio_timeout);
local_irq_save(flags);
while (blksize) {
int copy_words;
u32 hsts = 0;
if (!sg_miter_next(&host->sg_miter)) {
host->data->error = -EINVAL;
break;
}
len = min(host->sg_miter.length, blksize);
if (len % 4) {
host->data->error = -EINVAL;
break;
}
blksize -= len;
host->sg_miter.consumed = len;
buf = (u32 *)host->sg_miter.addr;
copy_words = len/4;
while (copy_words) {
int burst_words, words;
u32 edm;
burst_words = SDDATA_FIFO_PIO_BURST;
if (burst_words > copy_words)
burst_words = copy_words;
edm = bcm2835_sdhost_read(host, SDEDM);
words = ((edm >> 4) & 0x1f);
if (words < burst_words) {
int fsm_state = (edm & SDEDM_FSM_MASK);
if ((fsm_state != SDEDM_FSM_READDATA) &&
(fsm_state != SDEDM_FSM_READWAIT) &&
(fsm_state != SDEDM_FSM_READCRC)) {
hsts = bcm2835_sdhost_read(host,
SDHSTS);
pr_info("%s: fsm %x, hsts %x\n",
mmc_hostname(host->mmc),
fsm_state, hsts);
if (hsts & SDHSTS_ERROR_MASK)
break;
}
if (time_after(jiffies, wait_max)) {
pr_err("%s: PIO read timeout - EDM %x\n",
mmc_hostname(host->mmc),
edm);
hsts = SDHSTS_REW_TIME_OUT;
break;
}
ndelay((burst_words - words) *
host->ns_per_fifo_word);
continue;
} else if (words > copy_words) {
words = copy_words;
}
copy_words -= words;
while (words) {
*(buf++) = bcm2835_sdhost_read(host, SDDATA);
words--;
}
}
if (hsts & SDHSTS_ERROR_MASK)
break;
}
sg_miter_stop(&host->sg_miter);
local_irq_restore(flags);
}
static void bcm2835_sdhost_write_block_pio(struct bcm2835_host *host)
{
unsigned long flags;
size_t blksize, len;
u32 *buf;
unsigned long wait_max;
blksize = host->data->blksz;
wait_max = jiffies + msecs_to_jiffies(host->pio_timeout);
local_irq_save(flags);
while (blksize) {
int copy_words;
u32 hsts = 0;
if (!sg_miter_next(&host->sg_miter)) {
host->data->error = -EINVAL;
break;
}
len = min(host->sg_miter.length, blksize);
if (len % 4) {
host->data->error = -EINVAL;
break;
}
blksize -= len;
host->sg_miter.consumed = len;
buf = (u32 *)host->sg_miter.addr;
copy_words = len/4;
while (copy_words) {
int burst_words, words;
u32 edm;
burst_words = SDDATA_FIFO_PIO_BURST;
if (burst_words > copy_words)
burst_words = copy_words;
edm = bcm2835_sdhost_read(host, SDEDM);
words = SDDATA_FIFO_WORDS - ((edm >> 4) & 0x1f);
if (words < burst_words) {
int fsm_state = (edm & SDEDM_FSM_MASK);
if ((fsm_state != SDEDM_FSM_WRITEDATA) &&
(fsm_state != SDEDM_FSM_WRITESTART1) &&
(fsm_state != SDEDM_FSM_WRITESTART2)) {
hsts = bcm2835_sdhost_read(host,
SDHSTS);
pr_info("%s: fsm %x, hsts %x\n",
mmc_hostname(host->mmc),
fsm_state, hsts);
if (hsts & SDHSTS_ERROR_MASK)
break;
}
if (time_after(jiffies, wait_max)) {
pr_err("%s: PIO write timeout - EDM %x\n",
mmc_hostname(host->mmc),
edm);
hsts = SDHSTS_REW_TIME_OUT;
break;
}
ndelay((burst_words - words) *
host->ns_per_fifo_word);
continue;
} else if (words > copy_words) {
words = copy_words;
}
copy_words -= words;
while (words) {
bcm2835_sdhost_write(host, *(buf++), SDDATA);
words--;
}
}
if (hsts & SDHSTS_ERROR_MASK)
break;
}
sg_miter_stop(&host->sg_miter);
local_irq_restore(flags);
}
static void bcm2835_sdhost_transfer_pio(struct bcm2835_host *host)
{
u32 sdhsts;
bool is_read;
BUG_ON(!host->data);
log_event("XFP<", host->data, host->blocks);
is_read = (host->data->flags & MMC_DATA_READ) != 0;
if (is_read)
bcm2835_sdhost_read_block_pio(host);
else
bcm2835_sdhost_write_block_pio(host);
sdhsts = bcm2835_sdhost_read(host, SDHSTS);
if (sdhsts & (SDHSTS_CRC16_ERROR |
SDHSTS_CRC7_ERROR |
SDHSTS_FIFO_ERROR)) {
pr_err("%s: %s transfer error - HSTS %x\n",
mmc_hostname(host->mmc),
is_read ? "read" : "write",
sdhsts);
host->data->error = -EILSEQ;
} else if ((sdhsts & (SDHSTS_CMD_TIME_OUT |
SDHSTS_REW_TIME_OUT))) {
pr_err("%s: %s timeout error - HSTS %x\n",
mmc_hostname(host->mmc),
is_read ? "read" : "write",
sdhsts);
host->data->error = -ETIMEDOUT;
}
log_event("XFP>", host->data, host->blocks);
}
static void bcm2835_sdhost_prepare_dma(struct bcm2835_host *host,
struct mmc_data *data)
{
int len, dir_data, dir_slave;
struct dma_async_tx_descriptor *desc = NULL;
struct dma_chan *dma_chan;
log_event("PRD<", data, 0);
pr_debug("bcm2835_sdhost_prepare_dma()\n");
dma_chan = host->dma_chan_rxtx;
if (data->flags & MMC_DATA_READ) {
dir_data = DMA_FROM_DEVICE;
dir_slave = DMA_DEV_TO_MEM;
} else {
dir_data = DMA_TO_DEVICE;
dir_slave = DMA_MEM_TO_DEV;
}
log_event("PRD1", dma_chan, 0);
BUG_ON(!dma_chan->device);
BUG_ON(!dma_chan->device->dev);
BUG_ON(!data->sg);
/* The block doesn't manage the FIFO DREQs properly for multi-block
transfers, so don't attempt to DMA the final few words.
Unfortunately this requires the final sg entry to be trimmed.
N.B. This code demands that the overspill is contained in
a single sg entry.
*/
host->drain_words = 0;
if ((data->blocks > 1) && (dir_data == DMA_FROM_DEVICE)) {
struct scatterlist *sg;
u32 len;
int i;
len = min((u32)(FIFO_READ_THRESHOLD - 1) * 4,
(u32)data->blocks * data->blksz);
for_each_sg(data->sg, sg, data->sg_len, i) {
if (sg_is_last(sg)) {
BUG_ON(sg->length < len);
sg->length -= len;
host->drain_page = sg_page(sg);
host->drain_offset = sg->offset + sg->length;
}
}
host->drain_words = len/4;
}
/* The parameters have already been validated, so this will not fail */
(void)dmaengine_slave_config(dma_chan,
(dir_data == DMA_FROM_DEVICE) ?
&host->dma_cfg_rx :
&host->dma_cfg_tx);
len = dma_map_sg(dma_chan->device->dev, data->sg, data->sg_len,
dir_data);
log_event("PRD2", len, 0);
if (len > 0)
desc = dmaengine_prep_slave_sg(dma_chan, data->sg,
len, dir_slave,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
log_event("PRD3", desc, 0);
if (desc) {
desc->callback = bcm2835_sdhost_dma_complete;
desc->callback_param = host;
host->dma_desc = desc;
host->dma_chan = dma_chan;
host->dma_dir = dir_data;
}
log_event("PDM>", data, 0);
}
static void bcm2835_sdhost_start_dma(struct bcm2835_host *host)
{
log_event("SDMA", host->data, host->dma_chan);
dmaengine_submit(host->dma_desc);
dma_async_issue_pending(host->dma_chan);
}
static void bcm2835_sdhost_set_transfer_irqs(struct bcm2835_host *host)
{
u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN |
SDHCFG_BUSY_IRPT_EN;
if (host->dma_desc)
host->hcfg = (host->hcfg & ~all_irqs) |
SDHCFG_BUSY_IRPT_EN;
else
host->hcfg = (host->hcfg & ~all_irqs) |
SDHCFG_DATA_IRPT_EN |
SDHCFG_BUSY_IRPT_EN;
bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
}
static void bcm2835_sdhost_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
{
struct mmc_data *data = cmd->data;
WARN_ON(host->data);
host->data = data;
if (!data)
return;
/* Sanity checks */
BUG_ON(data->blksz * data->blocks > 524288);
BUG_ON(data->blksz > host->mmc->max_blk_size);
BUG_ON(data->blocks > 65535);
host->data_complete = 0;
host->flush_fifo = 0;
host->data->bytes_xfered = 0;
if (!host->sectors && host->mmc->card) {
struct mmc_card *card = host->mmc->card;
if (!mmc_card_sd(card) && mmc_card_blockaddr(card)) {
/*
* The EXT_CSD sector count is in number of 512 byte
* sectors.
*/
host->sectors = card->ext_csd.sectors;
} else {
/*
* The CSD capacity field is in units of read_blkbits.
* set_capacity takes units of 512 bytes.
*/
host->sectors = card->csd.capacity <<
(card->csd.read_blkbits - 9);
}
}
if (!host->dma_desc) {
/* Use PIO */
int flags = SG_MITER_ATOMIC;
if (data->flags & MMC_DATA_READ)
flags |= SG_MITER_TO_SG;
else
flags |= SG_MITER_FROM_SG;
sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
host->blocks = data->blocks;
}
bcm2835_sdhost_set_transfer_irqs(host);
bcm2835_sdhost_write(host, data->blksz, SDHBCT);
bcm2835_sdhost_write(host, data->blocks, SDHBLC);
BUG_ON(!host->data);
}
bool bcm2835_sdhost_send_command(struct bcm2835_host *host,
struct mmc_command *cmd)
{
u32 sdcmd, sdhsts;
unsigned long timeout;
int delay;
WARN_ON(host->cmd);
log_event("CMD<", cmd->opcode, cmd->arg);
if (cmd->data)
pr_debug("%s: send_command %d 0x%x "
"(flags 0x%x) - %s %d*%d\n",
mmc_hostname(host->mmc),
cmd->opcode, cmd->arg, cmd->flags,
(cmd->data->flags & MMC_DATA_READ) ?
"read" : "write", cmd->data->blocks,
cmd->data->blksz);
else
pr_debug("%s: send_command %d 0x%x (flags 0x%x)\n",
mmc_hostname(host->mmc),
cmd->opcode, cmd->arg, cmd->flags);
/* Wait max 100 ms */
timeout = 10000;
while (bcm2835_sdhost_read(host, SDCMD) & SDCMD_NEW_FLAG) {
if (timeout == 0) {
pr_warn("%s: previous command never completed.\n",
mmc_hostname(host->mmc));
if (host->debug)
bcm2835_sdhost_dumpregs(host);
cmd->error = -EILSEQ;
tasklet_schedule(&host->finish_tasklet);
return false;
}
timeout--;
udelay(10);
}
delay = (10000 - timeout)/100;
if (delay > host->max_delay) {
host->max_delay = delay;
pr_warn("%s: controller hung for %d ms\n",
mmc_hostname(host->mmc),
host->max_delay);
}
timeout = jiffies;
if (!cmd->data && cmd->busy_timeout > 9000)
timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
else
timeout += 10 * HZ;
mod_timer(&host->timer, timeout);
host->cmd = cmd;
/* Clear any error flags */
sdhsts = bcm2835_sdhost_read(host, SDHSTS);
if (sdhsts & SDHSTS_ERROR_MASK)
bcm2835_sdhost_write(host, sdhsts, SDHSTS);