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bcm2835-unicam.c
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bcm2835-unicam.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* BCM283x / BCM271x Unicam Capture Driver
*
* Copyright (C) 2017-2020 - Raspberry Pi (Trading) Ltd.
*
* Dave Stevenson <dave.stevenson@raspberrypi.com>
*
* Based on TI am437x driver by
* Benoit Parrot <bparrot@ti.com>
* Lad, Prabhakar <prabhakar.csengg@gmail.com>
*
* and TI CAL camera interface driver by
* Benoit Parrot <bparrot@ti.com>
*
*
* There are two camera drivers in the kernel for BCM283x - this one
* and bcm2835-camera (currently in staging).
*
* This driver directly controls the Unicam peripheral - there is no
* involvement with the VideoCore firmware. Unicam receives CSI-2 or
* CCP2 data and writes it into SDRAM.
* The only potential processing options are to repack Bayer data into an
* alternate format, and applying windowing.
* The repacking does not shift the data, so can repack V4L2_PIX_FMT_Sxxxx10P
* to V4L2_PIX_FMT_Sxxxx10, or V4L2_PIX_FMT_Sxxxx12P to V4L2_PIX_FMT_Sxxxx12,
* but not generically up to V4L2_PIX_FMT_Sxxxx16. The driver will add both
* formats where the relevant formats are defined, and will automatically
* configure the repacking as required.
* Support for windowing may be added later.
*
* It should be possible to connect this driver to any sensor with a
* suitable output interface and V4L2 subdevice driver.
*
* bcm2835-camera uses the VideoCore firmware to control the sensor,
* Unicam, ISP, and all tuner control loops. Fully processed frames are
* delivered to the driver by the firmware. It only has sensor drivers
* for Omnivision OV5647, and Sony IMX219 sensors.
*
* The two drivers are mutually exclusive for the same Unicam instance.
* The VideoCore firmware checks the device tree configuration during boot.
* If it finds device tree nodes called csi0 or csi1 it will block the
* firmware from accessing the peripheral, and bcm2835-camera will
* not be able to stream data.
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/gpio/consumer.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/videodev2.h>
#include <media/mipi-csi2.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-device.h>
#include <media/v4l2-dv-timings.h>
#include <media/v4l2-event.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-fwnode.h>
#include <media/videobuf2-dma-contig.h>
#include <media/v4l2-async.h>
#include "vc4-regs-unicam.h"
#define UNICAM_MODULE_NAME "unicam"
#define UNICAM_VERSION "0.1.0"
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Debug level 0-3");
static int media_controller;
module_param(media_controller, int, 0644);
MODULE_PARM_DESC(media_controller, "Use media controller API");
#define unicam_dbg(level, dev, fmt, arg...) \
v4l2_dbg(level, debug, &(dev)->v4l2_dev, fmt, ##arg)
#define unicam_info(dev, fmt, arg...) \
v4l2_info(&(dev)->v4l2_dev, fmt, ##arg)
#define unicam_err(dev, fmt, arg...) \
v4l2_err(&(dev)->v4l2_dev, fmt, ##arg)
/*
* Unicam must request a minimum of 250Mhz from the VPU clock.
* Otherwise the input FIFOs overrun and cause image corruption.
*/
#define MIN_VPU_CLOCK_RATE (250 * 1000 * 1000)
/*
* To protect against a dodgy sensor driver never returning an error from
* enum_mbus_code, set a maximum index value to be used.
*/
#define MAX_ENUM_MBUS_CODE 128
/*
* Stride is a 16 bit register, but also has to be a multiple of 32.
*/
#define BPL_ALIGNMENT 32
#define MAX_BYTESPERLINE ((1 << 16) - BPL_ALIGNMENT)
/*
* Max width is therefore determined by the max stride divided by
* the number of bits per pixel. Take 32bpp as a
* worst case.
* No imposed limit on the height, so adopt a square image for want
* of anything better.
*/
#define MAX_WIDTH (MAX_BYTESPERLINE / 4)
#define MAX_HEIGHT MAX_WIDTH
/* Define a nominal minimum image size */
#define MIN_WIDTH 16
#define MIN_HEIGHT 16
/* Default size of the embedded buffer */
#define UNICAM_EMBEDDED_SIZE 16384
/*
* Size of the dummy buffer allocation.
*
* Due to a HW bug causing buffer overruns in circular buffer mode under certain
* (not yet fully known) conditions, the dummy buffer allocation is set to a
* a single page size, but the hardware gets programmed with a buffer size of 0.
*/
#define DUMMY_BUF_SIZE (PAGE_SIZE)
enum pad_types {
IMAGE_PAD,
METADATA_PAD,
MAX_NODES
};
#define MASK_CS_DEFAULT BIT(V4L2_COLORSPACE_DEFAULT)
#define MASK_CS_SMPTE170M BIT(V4L2_COLORSPACE_SMPTE170M)
#define MASK_CS_SMPTE240M BIT(V4L2_COLORSPACE_SMPTE240M)
#define MASK_CS_REC709 BIT(V4L2_COLORSPACE_REC709)
#define MASK_CS_BT878 BIT(V4L2_COLORSPACE_BT878)
#define MASK_CS_470_M BIT(V4L2_COLORSPACE_470_SYSTEM_M)
#define MASK_CS_470_BG BIT(V4L2_COLORSPACE_470_SYSTEM_BG)
#define MASK_CS_JPEG BIT(V4L2_COLORSPACE_JPEG)
#define MASK_CS_SRGB BIT(V4L2_COLORSPACE_SRGB)
#define MASK_CS_OPRGB BIT(V4L2_COLORSPACE_OPRGB)
#define MASK_CS_BT2020 BIT(V4L2_COLORSPACE_BT2020)
#define MASK_CS_RAW BIT(V4L2_COLORSPACE_RAW)
#define MASK_CS_DCI_P3 BIT(V4L2_COLORSPACE_DCI_P3)
#define MAX_COLORSPACE 32
/*
* struct unicam_fmt - Unicam media bus format information
* @pixelformat: V4L2 pixel format FCC identifier. 0 if n/a.
* @repacked_fourcc: V4L2 pixel format FCC identifier if the data is expanded
* out to 16bpp. 0 if n/a.
* @code: V4L2 media bus format code.
* @depth: Bits per pixel as delivered from the source.
* @csi_dt: CSI data type.
* @valid_colorspaces: Bitmask of valid colorspaces so that the Media Controller
* centric try_fmt can validate the colorspace and pass
* v4l2-compliance.
* @check_variants: Flag to denote that there are multiple mediabus formats
* still in the list that could match this V4L2 format.
* @mc_skip: Media Controller shouldn't list this format via ENUM_FMT as it is
* a duplicate of an earlier format.
* @metadata_fmt: This format only applies to the metadata pad.
*/
struct unicam_fmt {
u32 fourcc;
u32 repacked_fourcc;
u32 code;
u8 depth;
u8 csi_dt;
u32 valid_colorspaces;
u8 check_variants:1;
u8 mc_skip:1;
u8 metadata_fmt:1;
};
static const struct unicam_fmt formats[] = {
/* YUV Formats */
{
.fourcc = V4L2_PIX_FMT_YUYV,
.code = MEDIA_BUS_FMT_YUYV8_2X8,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.check_variants = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_UYVY,
.code = MEDIA_BUS_FMT_UYVY8_2X8,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.check_variants = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_YVYU,
.code = MEDIA_BUS_FMT_YVYU8_2X8,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.check_variants = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_VYUY,
.code = MEDIA_BUS_FMT_VYUY8_2X8,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.check_variants = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_YUYV,
.code = MEDIA_BUS_FMT_YUYV8_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.mc_skip = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_UYVY,
.code = MEDIA_BUS_FMT_UYVY8_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.mc_skip = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_YVYU,
.code = MEDIA_BUS_FMT_YVYU8_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.mc_skip = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_VYUY,
.code = MEDIA_BUS_FMT_VYUY8_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.mc_skip = 1,
.valid_colorspaces = MASK_CS_SMPTE170M | MASK_CS_REC709 |
MASK_CS_JPEG,
}, {
/* RGB Formats */
.fourcc = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */
.code = MEDIA_BUS_FMT_RGB565_2X8_LE,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RGB565,
.valid_colorspaces = MASK_CS_SRGB,
}, {
.fourcc = V4L2_PIX_FMT_RGB565X, /* rrrrrggg gggbbbbb */
.code = MEDIA_BUS_FMT_RGB565_2X8_BE,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RGB565,
.valid_colorspaces = MASK_CS_SRGB,
}, {
.fourcc = V4L2_PIX_FMT_RGB555, /* gggbbbbb arrrrrgg */
.code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RGB555,
.valid_colorspaces = MASK_CS_SRGB,
}, {
.fourcc = V4L2_PIX_FMT_RGB555X, /* arrrrrgg gggbbbbb */
.code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RGB555,
.valid_colorspaces = MASK_CS_SRGB,
}, {
.fourcc = V4L2_PIX_FMT_RGB24, /* rgb */
.code = MEDIA_BUS_FMT_RGB888_1X24,
.depth = 24,
.csi_dt = MIPI_CSI2_DT_RGB888,
.valid_colorspaces = MASK_CS_SRGB,
}, {
.fourcc = V4L2_PIX_FMT_BGR24, /* bgr */
.code = MEDIA_BUS_FMT_BGR888_1X24,
.depth = 24,
.csi_dt = MIPI_CSI2_DT_RGB888,
.valid_colorspaces = MASK_CS_SRGB,
}, {
.fourcc = V4L2_PIX_FMT_RGB32, /* argb */
.code = MEDIA_BUS_FMT_ARGB8888_1X32,
.depth = 32,
.csi_dt = 0x0,
.valid_colorspaces = MASK_CS_SRGB,
}, {
/* Bayer Formats */
.fourcc = V4L2_PIX_FMT_SBGGR8,
.code = MEDIA_BUS_FMT_SBGGR8_1X8,
.depth = 8,
.csi_dt = MIPI_CSI2_DT_RAW8,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGBRG8,
.code = MEDIA_BUS_FMT_SGBRG8_1X8,
.depth = 8,
.csi_dt = MIPI_CSI2_DT_RAW8,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGRBG8,
.code = MEDIA_BUS_FMT_SGRBG8_1X8,
.depth = 8,
.csi_dt = MIPI_CSI2_DT_RAW8,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SRGGB8,
.code = MEDIA_BUS_FMT_SRGGB8_1X8,
.depth = 8,
.csi_dt = MIPI_CSI2_DT_RAW8,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SBGGR10P,
.repacked_fourcc = V4L2_PIX_FMT_SBGGR10,
.code = MEDIA_BUS_FMT_SBGGR10_1X10,
.depth = 10,
.csi_dt = MIPI_CSI2_DT_RAW10,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGBRG10P,
.repacked_fourcc = V4L2_PIX_FMT_SGBRG10,
.code = MEDIA_BUS_FMT_SGBRG10_1X10,
.depth = 10,
.csi_dt = MIPI_CSI2_DT_RAW10,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGRBG10P,
.repacked_fourcc = V4L2_PIX_FMT_SGRBG10,
.code = MEDIA_BUS_FMT_SGRBG10_1X10,
.depth = 10,
.csi_dt = MIPI_CSI2_DT_RAW10,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SRGGB10P,
.repacked_fourcc = V4L2_PIX_FMT_SRGGB10,
.code = MEDIA_BUS_FMT_SRGGB10_1X10,
.depth = 10,
.csi_dt = MIPI_CSI2_DT_RAW10,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SBGGR12P,
.repacked_fourcc = V4L2_PIX_FMT_SBGGR12,
.code = MEDIA_BUS_FMT_SBGGR12_1X12,
.depth = 12,
.csi_dt = MIPI_CSI2_DT_RAW12,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGBRG12P,
.repacked_fourcc = V4L2_PIX_FMT_SGBRG12,
.code = MEDIA_BUS_FMT_SGBRG12_1X12,
.depth = 12,
.csi_dt = MIPI_CSI2_DT_RAW12,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGRBG12P,
.repacked_fourcc = V4L2_PIX_FMT_SGRBG12,
.code = MEDIA_BUS_FMT_SGRBG12_1X12,
.depth = 12,
.csi_dt = MIPI_CSI2_DT_RAW12,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SRGGB12P,
.repacked_fourcc = V4L2_PIX_FMT_SRGGB12,
.code = MEDIA_BUS_FMT_SRGGB12_1X12,
.depth = 12,
.csi_dt = MIPI_CSI2_DT_RAW12,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SBGGR14P,
.repacked_fourcc = V4L2_PIX_FMT_SBGGR14,
.code = MEDIA_BUS_FMT_SBGGR14_1X14,
.depth = 14,
.csi_dt = MIPI_CSI2_DT_RAW14,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGBRG14P,
.repacked_fourcc = V4L2_PIX_FMT_SGBRG14,
.code = MEDIA_BUS_FMT_SGBRG14_1X14,
.depth = 14,
.csi_dt = MIPI_CSI2_DT_RAW14,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGRBG14P,
.repacked_fourcc = V4L2_PIX_FMT_SGRBG14,
.code = MEDIA_BUS_FMT_SGRBG14_1X14,
.depth = 14,
.csi_dt = MIPI_CSI2_DT_RAW14,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SRGGB14P,
.repacked_fourcc = V4L2_PIX_FMT_SRGGB14,
.code = MEDIA_BUS_FMT_SRGGB14_1X14,
.depth = 14,
.csi_dt = MIPI_CSI2_DT_RAW14,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SBGGR16,
.code = MEDIA_BUS_FMT_SBGGR16_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RAW16,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGBRG16,
.code = MEDIA_BUS_FMT_SGBRG16_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RAW16,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SGRBG16,
.code = MEDIA_BUS_FMT_SGRBG16_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RAW16,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_SRGGB16,
.code = MEDIA_BUS_FMT_SRGGB16_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RAW16,
.valid_colorspaces = MASK_CS_RAW,
}, {
/* Greyscale formats */
.fourcc = V4L2_PIX_FMT_GREY,
.code = MEDIA_BUS_FMT_Y8_1X8,
.depth = 8,
.csi_dt = MIPI_CSI2_DT_RAW8,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_Y10P,
.repacked_fourcc = V4L2_PIX_FMT_Y10,
.code = MEDIA_BUS_FMT_Y10_1X10,
.depth = 10,
.csi_dt = MIPI_CSI2_DT_RAW10,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_Y12P,
.repacked_fourcc = V4L2_PIX_FMT_Y12,
.code = MEDIA_BUS_FMT_Y12_1X12,
.depth = 12,
.csi_dt = MIPI_CSI2_DT_RAW12,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_Y14P,
.repacked_fourcc = V4L2_PIX_FMT_Y14,
.code = MEDIA_BUS_FMT_Y14_1X14,
.depth = 14,
.csi_dt = MIPI_CSI2_DT_RAW14,
.valid_colorspaces = MASK_CS_RAW,
}, {
.fourcc = V4L2_PIX_FMT_Y16,
.code = MEDIA_BUS_FMT_Y16_1X16,
.depth = 16,
.csi_dt = MIPI_CSI2_DT_RAW16,
.valid_colorspaces = MASK_CS_RAW,
},
/* Embedded data format */
{
.fourcc = V4L2_META_FMT_SENSOR_DATA,
.code = MEDIA_BUS_FMT_SENSOR_DATA,
.depth = 8,
.metadata_fmt = 1,
}
};
struct unicam_buffer {
struct vb2_v4l2_buffer vb;
struct list_head list;
};
static inline struct unicam_buffer *to_unicam_buffer(struct vb2_buffer *vb)
{
return container_of(vb, struct unicam_buffer, vb.vb2_buf);
}
struct unicam_node {
bool registered;
int open;
bool streaming;
unsigned int pad_id;
/* Source pad id on the sensor for this node */
unsigned int src_pad_id;
/* Pointer pointing to current v4l2_buffer */
struct unicam_buffer *cur_frm;
/* Pointer pointing to next v4l2_buffer */
struct unicam_buffer *next_frm;
/* video capture */
const struct unicam_fmt *fmt;
/* Used to store current pixel format */
struct v4l2_format v_fmt;
/* Used to store current mbus frame format */
struct v4l2_mbus_framefmt m_fmt;
/* Buffer queue used in video-buf */
struct vb2_queue buffer_queue;
/* Queue of filled frames */
struct list_head dma_queue;
/* IRQ lock for DMA queue */
spinlock_t dma_queue_lock;
/* lock used to access this structure */
struct mutex lock;
/* Identifies video device for this channel */
struct video_device video_dev;
/* Pointer to the parent handle */
struct unicam_device *dev;
struct media_pad pad;
unsigned int embedded_lines;
struct media_pipeline pipe;
/*
* Dummy buffer intended to be used by unicam
* if we have no other queued buffers to swap to.
*/
void *dummy_buf_cpu_addr;
dma_addr_t dummy_buf_dma_addr;
};
struct unicam_device {
struct kref kref;
/* V4l2 specific parameters */
struct v4l2_async_connection *asd;
/* peripheral base address */
void __iomem *base;
/* clock gating base address */
void __iomem *clk_gate_base;
/* lp clock handle */
struct clk *clock;
/* vpu clock handle */
struct clk *vpu_clock;
/* clock status for error handling */
bool clocks_enabled;
/* V4l2 device */
struct v4l2_device v4l2_dev;
struct media_device mdev;
struct gpio_desc *sync_gpio;
/* parent device */
struct platform_device *pdev;
/* subdevice async Notifier */
struct v4l2_async_notifier notifier;
unsigned int sequence;
bool frame_started;
/* ptr to sub device */
struct v4l2_subdev *sensor;
/* Pad config for the sensor */
struct v4l2_subdev_state *sensor_state;
enum v4l2_mbus_type bus_type;
/*
* Stores bus.mipi_csi2.flags for CSI2 sensors, or
* bus.mipi_csi1.strobe for CCP2.
*/
unsigned int bus_flags;
unsigned int max_data_lanes;
unsigned int active_data_lanes;
bool sensor_embedded_data;
struct unicam_node node[MAX_NODES];
struct v4l2_ctrl_handler ctrl_handler;
bool mc_api;
};
static inline struct unicam_device *
to_unicam_device(struct v4l2_device *v4l2_dev)
{
return container_of(v4l2_dev, struct unicam_device, v4l2_dev);
}
/* Hardware access */
static inline void clk_write(struct unicam_device *dev, u32 val)
{
writel(val | 0x5a000000, dev->clk_gate_base);
}
static inline u32 reg_read(struct unicam_device *dev, u32 offset)
{
return readl(dev->base + offset);
}
static inline void reg_write(struct unicam_device *dev, u32 offset, u32 val)
{
writel(val, dev->base + offset);
}
static inline int get_field(u32 value, u32 mask)
{
return (value & mask) >> __ffs(mask);
}
static inline void set_field(u32 *valp, u32 field, u32 mask)
{
u32 val = *valp;
val &= ~mask;
val |= (field << __ffs(mask)) & mask;
*valp = val;
}
static inline u32 reg_read_field(struct unicam_device *dev, u32 offset,
u32 mask)
{
return get_field(reg_read(dev, offset), mask);
}
static inline void reg_write_field(struct unicam_device *dev, u32 offset,
u32 field, u32 mask)
{
u32 val = reg_read(dev, offset);
set_field(&val, field, mask);
reg_write(dev, offset, val);
}
/* Power management functions */
static inline int unicam_runtime_get(struct unicam_device *dev)
{
return pm_runtime_get_sync(&dev->pdev->dev);
}
static inline void unicam_runtime_put(struct unicam_device *dev)
{
pm_runtime_put_sync(&dev->pdev->dev);
}
/* Format setup functions */
static const struct unicam_fmt *find_format_by_code(u32 code)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE(formats); i++) {
if (formats[i].code == code)
return &formats[i];
}
return NULL;
}
static int check_mbus_format(struct unicam_device *dev,
const struct unicam_fmt *format)
{
unsigned int i;
int ret = 0;
for (i = 0; !ret && i < MAX_ENUM_MBUS_CODE; i++) {
struct v4l2_subdev_mbus_code_enum mbus_code = {
.index = i,
.pad = IMAGE_PAD,
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
};
ret = v4l2_subdev_call(dev->sensor, pad, enum_mbus_code,
NULL, &mbus_code);
if (!ret && mbus_code.code == format->code)
return 1;
}
return 0;
}
static const struct unicam_fmt *find_format_by_pix(struct unicam_device *dev,
u32 pixelformat)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE(formats); i++) {
if (formats[i].fourcc == pixelformat ||
formats[i].repacked_fourcc == pixelformat) {
if (formats[i].check_variants &&
!check_mbus_format(dev, &formats[i]))
continue;
return &formats[i];
}
}
return NULL;
}
static unsigned int bytes_per_line(u32 width, const struct unicam_fmt *fmt,
u32 v4l2_fourcc)
{
if (v4l2_fourcc == fmt->repacked_fourcc)
/* Repacking always goes to 16bpp */
return ALIGN(width << 1, BPL_ALIGNMENT);
else
return ALIGN((width * fmt->depth) >> 3, BPL_ALIGNMENT);
}
static int __subdev_get_format(struct unicam_device *dev,
struct v4l2_mbus_framefmt *fmt, int pad_id)
{
struct v4l2_subdev_format sd_fmt = {
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
.pad = dev->node[pad_id].src_pad_id,
};
int ret;
ret = v4l2_subdev_call(dev->sensor, pad, get_fmt, dev->sensor_state,
&sd_fmt);
if (ret < 0)
return ret;
*fmt = sd_fmt.format;
unicam_dbg(1, dev, "%s %dx%d code:%04x\n", __func__,
fmt->width, fmt->height, fmt->code);
return 0;
}
static int __subdev_set_format(struct unicam_device *dev,
struct v4l2_mbus_framefmt *fmt, int pad_id)
{
struct v4l2_subdev_format sd_fmt = {
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
.pad = dev->node[pad_id].src_pad_id,
};
int ret;
sd_fmt.format = *fmt;
ret = v4l2_subdev_call(dev->sensor, pad, set_fmt, dev->sensor_state,
&sd_fmt);
if (ret < 0)
return ret;
*fmt = sd_fmt.format;
if (pad_id == IMAGE_PAD)
unicam_dbg(1, dev, "%s %dx%d code:%04x\n", __func__, fmt->width,
fmt->height, fmt->code);
else
unicam_dbg(1, dev, "%s Embedded data code:%04x\n", __func__,
sd_fmt.format.code);
return 0;
}
static int unicam_calc_format_size_bpl(struct unicam_device *dev,
const struct unicam_fmt *fmt,
struct v4l2_format *f)
{
unsigned int min_bytesperline;
v4l_bound_align_image(&f->fmt.pix.width, MIN_WIDTH, MAX_WIDTH, 2,
&f->fmt.pix.height, MIN_HEIGHT, MAX_HEIGHT, 0,
0);
min_bytesperline = bytes_per_line(f->fmt.pix.width, fmt,
f->fmt.pix.pixelformat);
if (f->fmt.pix.bytesperline > min_bytesperline &&
f->fmt.pix.bytesperline <= MAX_BYTESPERLINE)
f->fmt.pix.bytesperline = ALIGN(f->fmt.pix.bytesperline,
BPL_ALIGNMENT);
else
f->fmt.pix.bytesperline = min_bytesperline;
f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
unicam_dbg(3, dev, "%s: fourcc: %08X size: %dx%d bpl:%d img_size:%d\n",
__func__,
f->fmt.pix.pixelformat,
f->fmt.pix.width, f->fmt.pix.height,
f->fmt.pix.bytesperline, f->fmt.pix.sizeimage);
return 0;
}
static int unicam_reset_format(struct unicam_node *node)
{
struct unicam_device *dev = node->dev;
struct v4l2_mbus_framefmt mbus_fmt;
int ret;
if (dev->sensor_embedded_data || node->pad_id != METADATA_PAD) {
ret = __subdev_get_format(dev, &mbus_fmt, node->pad_id);
if (ret) {
unicam_err(dev, "Failed to get_format - ret %d\n", ret);
return ret;
}
if (mbus_fmt.code != node->fmt->code) {
unicam_err(dev, "code mismatch - fmt->code %08x, mbus_fmt.code %08x\n",
node->fmt->code, mbus_fmt.code);
return ret;
}
}
if (node->pad_id == IMAGE_PAD) {
v4l2_fill_pix_format(&node->v_fmt.fmt.pix, &mbus_fmt);
node->v_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
unicam_calc_format_size_bpl(dev, node->fmt, &node->v_fmt);
} else {
node->v_fmt.type = V4L2_BUF_TYPE_META_CAPTURE;
node->v_fmt.fmt.meta.dataformat = V4L2_META_FMT_SENSOR_DATA;
if (dev->sensor_embedded_data) {
node->v_fmt.fmt.meta.buffersize =
mbus_fmt.width * mbus_fmt.height;
node->embedded_lines = mbus_fmt.height;
} else {
node->v_fmt.fmt.meta.buffersize = UNICAM_EMBEDDED_SIZE;
node->embedded_lines = 1;
}
}
node->m_fmt = mbus_fmt;
return 0;
}
static void unicam_wr_dma_addr(struct unicam_device *dev, dma_addr_t dmaaddr,
unsigned int buffer_size, int pad_id)
{
dma_addr_t endaddr = dmaaddr + buffer_size;
if (pad_id == IMAGE_PAD) {
reg_write(dev, UNICAM_IBSA0, dmaaddr);
reg_write(dev, UNICAM_IBEA0, endaddr);
} else {
reg_write(dev, UNICAM_DBSA0, dmaaddr);
reg_write(dev, UNICAM_DBEA0, endaddr);
}
}
static unsigned int unicam_get_lines_done(struct unicam_device *dev)
{
dma_addr_t start_addr, cur_addr;
unsigned int stride = dev->node[IMAGE_PAD].v_fmt.fmt.pix.bytesperline;
struct unicam_buffer *frm = dev->node[IMAGE_PAD].cur_frm;
if (!frm)
return 0;
start_addr = vb2_dma_contig_plane_dma_addr(&frm->vb.vb2_buf, 0);
cur_addr = reg_read(dev, UNICAM_IBWP);
return (unsigned int)(cur_addr - start_addr) / stride;
}
static void unicam_schedule_next_buffer(struct unicam_node *node)
{
struct unicam_device *dev = node->dev;
struct unicam_buffer *buf;
unsigned int size;
dma_addr_t addr;
buf = list_first_entry(&node->dma_queue, struct unicam_buffer, list);
node->next_frm = buf;
list_del(&buf->list);
addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
size = (node->pad_id == IMAGE_PAD) ?
node->v_fmt.fmt.pix.sizeimage :
node->v_fmt.fmt.meta.buffersize;
unicam_wr_dma_addr(dev, addr, size, node->pad_id);
}
static void unicam_schedule_dummy_buffer(struct unicam_node *node)
{
struct unicam_device *dev = node->dev;
unicam_dbg(3, dev, "Scheduling dummy buffer for node %d\n",
node->pad_id);
unicam_wr_dma_addr(dev, node->dummy_buf_dma_addr, 0, node->pad_id);
node->next_frm = NULL;
}
static void unicam_process_buffer_complete(struct unicam_node *node,
unsigned int sequence)
{
node->cur_frm->vb.field = node->m_fmt.field;
node->cur_frm->vb.sequence = sequence;
vb2_buffer_done(&node->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE);
}
static void unicam_queue_event_sof(struct unicam_device *unicam)
{
struct v4l2_event event = {
.type = V4L2_EVENT_FRAME_SYNC,
.u.frame_sync.frame_sequence = unicam->sequence,
};
v4l2_event_queue(&unicam->node[IMAGE_PAD].video_dev, &event);
}
/*
* unicam_isr : ISR handler for unicam capture
* @irq: irq number
* @dev_id: dev_id ptr
*
* It changes status of the captured buffer, takes next buffer from the queue
* and sets its address in unicam registers
*/
static irqreturn_t unicam_isr(int irq, void *dev)
{
struct unicam_device *unicam = dev;
unsigned int lines_done = unicam_get_lines_done(dev);
unsigned int sequence = unicam->sequence;
unsigned int i;
u32 ista, sta;
bool fe;
u64 ts;
sta = reg_read(unicam, UNICAM_STA);
/* Write value back to clear the interrupts */
reg_write(unicam, UNICAM_STA, sta);
ista = reg_read(unicam, UNICAM_ISTA);
/* Write value back to clear the interrupts */
reg_write(unicam, UNICAM_ISTA, ista);
unicam_dbg(3, unicam, "ISR: ISTA: 0x%X, STA: 0x%X, sequence %d, lines done %d",
ista, sta, sequence, lines_done);
if (!(sta & (UNICAM_IS | UNICAM_PI0)))
return IRQ_HANDLED;
/*
* Look for either the Frame End interrupt or the Packet Capture status
* to signal a frame end.
*/
fe = (ista & UNICAM_FEI || sta & UNICAM_PI0);
/*
* We must run the frame end handler first. If we have a valid next_frm
* and we get a simultaneout FE + FS interrupt, running the FS handler
* first would null out the next_frm ptr and we would have lost the
* buffer forever.
*/
if (fe) {
bool inc_seq = unicam->frame_started;
if (unicam->sync_gpio)
gpiod_set_value(unicam->sync_gpio, 0);
/*
* Ensure we have swapped buffers already as we can't
* stop the peripheral. If no buffer is available, use a
* dummy buffer to dump out frames until we get a new buffer
* to use.
*/
for (i = 0; i < ARRAY_SIZE(unicam->node); i++) {
struct unicam_node *node = &unicam->node[i];
if (!node->streaming)
continue;
/*
* If cur_frm == next_frm, it means we have not had
* a chance to swap buffers, likely due to having
* multiple interrupts occurring simultaneously (like FE
* + FS + LS). In this case, we cannot signal the buffer
* as complete, as the HW will reuse that buffer.
*/
if (node->cur_frm && node->cur_frm != node->next_frm) {
/*
* This condition checks if FE + FS for the same
* frame has occurred. In such cases, we cannot
* return out the frame, as no buffer handling
* or timestamping has yet been done as part of
* the FS handler.
*/
if (!node->cur_frm->vb.vb2_buf.timestamp) {
unicam_dbg(2, unicam, "ISR: FE without FS, dropping frame\n");
continue;
}
unicam_process_buffer_complete(node, sequence);
node->cur_frm = node->next_frm;
node->next_frm = NULL;
inc_seq = true;
} else {
node->cur_frm = node->next_frm;
}
}
/*
* Increment the sequence number conditionally on either a FS
* having already occurred, or in the FE + FS condition as
* caught in the FE handler above. This ensures the sequence
* number corresponds to the frames generated by the sensor, not
* the frames dequeued to userland.
*/
if (inc_seq) {
unicam->sequence++;