KA10: Rubin 10-11 interface

[larsbrinkhoff]

Allowed attaching 8 PDP-11s for I/O. It's probably not well documented.

Used for:

• Chaosnet (see KA10: Chaosnet support #17)
• Knight TV system (see Knight TV emulator PDP-10/its#279)
• XGP printer

[aap]

Also for the CONS, Chess machine, some LOGO thing and various other things.
From SYSEN2; STUFF.92

        ;1ST DIGIT IS # 2K WORD PAGES OF 11 CORE
        [ 6
        ASCIZ \ TV 11/10 \
        -1]     ;HAS TTY AND LINE CLOCK.
        [ 14
        ASCIZ \ XGP 11/20 \
        -1]
        [ 4
        ASCIZ \ LISP MACHINE \
        1]      ;CLOCK BUT NO TTY
        [ 0
        ASCIZ \ CHESS MACHINE \
        0]
        [ 16
        ASCIZ \ LOGO 11/45 \
        -1]
        [ 16
        ASCIZ \ MICRO AUTOMATION 11/45 \
        -1]
        [ 14
        ASCIZ \ VISION 11/40 \
        -1 ]
        [ 4
        ASCIZ \ CHAOS-11 \
        -1 ]

[larsbrinkhoff]

AIKA memory map:

• 0,,000000 - 0,,777777 First moby.
• 1,,000000 - 1,,777777 Second moby.
• 2,,000000 - 2,,777777 Third moby.
• 3,,000000 - 3,,037777 PDP-6 memory, 16K.
• 3,,776000 - 3,,777777 10-11 control page.

[larsbrinkhoff]

I'm thinking we could do a shim like for IMX. At least as a first step.

This would allow some programs to at least start. And we could see what they're trying to do.

CC @aap

[larsbrinkhoff]

More complete list:

• TV-11 - Knight TV
• XGP - Printer
• CONS - First Lisp machine. Maybe it had a PDP-11 front end in the beginning? Or just a Unibus interface?
• Chess machine = CHEOPS.
• Logo PDP-11/45 - Runs 11LOGO.
• Micro Automation - robot arm.
• Vision - Computer vision research, cameras etc.
• CHAOS-11 - PDP-11 running IOELEV for Chaosnet.

[larsbrinkhoff]

@rcornwell,

@aap and I are kind of gearing up to get started on this. My part would be to add the PDP-10 side of the 10-11 interface, and some kind of Unibus interface for an outside PDP-11 to plug into.

Since this is a shared memory device, we'd need to intercept accesses to a range of the memory address space. I suppose adding this to Mem_read/write wouldn't be too hard.

[larsbrinkhoff]

I have no idea how TXMR works, but maybe it should be involved.

[rcornwell]

I would not go through the mem_read/write routines since these go through the pager and the DL10 interfaces went directly to memory.

[larsbrinkhoff]

Just for fun, I tried enabling TEN11P in ITS. When run, it hits the HALT instruction here:

UFL6:   MOVE U,AC17S(U) ;FOR CLUSAV TO STORE
        SETOM UFLSF
        CONO PI,CLKRQ   ;CAUSE INTERRUPT TRANSFERING TO CLOCK ROUTINE PI IN
                        ; PROGRESS
IFE KA10P, JRST .       ;ON KL AND KS SEEMS TO TAKE A WHILE TO GO OFF ("I
                        ; CAN WAIT FOREVER, YOU KNOW")
IFN KA10P, JRST 4,.     ;ON KA SHOULD GO OFF RIGHT AWAY

[larsbrinkhoff]

For some reason, this happens:

Breakpoint, PC: 007122 (CONO PI,6201)
sim> s

Step expired, PC: 007123 (HALT 7123)

[larsbrinkhoff]

Apparently location 56 has been cleared, so when CONO PI,6201 requests an interrupt, there is just an UUO there. It seems it's just ignored, and the interrupt is dismissed?

All other interrupt locations are zeroed too. Maybe ITS tried to write something to the 10-11 interface, but since it doesn't work it ended up in the wrong place.

[larsbrinkhoff]

Aside from the main ITS file, CORE, SYSJOB, and ITSDEV also make use of the TEN11P switch.

[larsbrinkhoff]

Ah, forgot to set T11CPA. It's the 10-11 control page. Setting it to zero (which is what happens when it's undefined) is sure to conflict with important addresses in low core!

[larsbrinkhoff]

For now, I'll have to use 1024K core setting. I suppose there should be something like set cpu rubin so allow physical memory accesses in the 3,,0-3,,777777 range.

[larsbrinkhoff]

Cool, now ITS boots. It asks MEM OFF 177-177 IS THIS OK? I said Y.

But when it's time to login, there's an NXM error. I'm not surprised. Still, it's some kind of progress.

[larsbrinkhoff]

Curiously, 512K core works slightly better. I could login and run PEEK for a few seconds. Then NXM.

In both cases, ITS was configured to only use 512K. Just like before.

[larsbrinkhoff]

@rcornwell, accesses from the processor to the Rubin 10-11 address space first go through virtual memory. So I need to intercept accesses after virtual to physical translation.

Note, the 10-11 doesn't access PDP-10 core memory.

[larsbrinkhoff]

#74 adds a stub, or roughly one half of the complete job.

[larsbrinkhoff]

One PDP-10 words maps to two PDP-11 words, left aligned. The four rightmost PDP-10 bits are read as zeroes. When written, adding in 10 or 4 means to not change the leftmost or rightmost word.

[larsbrinkhoff]

Done.