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mmc: tmio: rcar_gen3: Add DMA transfer address alignment check at wri…
…ting In R-Car Gen 3, there is a DMA controller restriction of SDHI. When the transfer exceeding the 4 kByte boundary is performed while the DRAM address is not 128 byte aligned, the bus is occupied. This patch avoids this. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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