Question - AXI Bus

[ydnatag]

Hello, I'm trying to test software which uses fpga as coprocessing unit. This development is based in a ZynqMP+ which shares the RAM between the FPGA and multiple CPUs in a common axi bus.

So, the question is: Is posible in Renode to share devices like RAM between the FPGA and CPU during the simulation for testing coprocessing cores with production cores?

Currently i'm using cocotb for this stuff but i need to rewrite a lot of code between simulations and production code.

Thanks you
Andres

[mateusz-holenko]

Renode can be used in co-simulation scenarios, e.g. when part of the system is simulated by Verilator. For more details see the documentation: https://renode.readthedocs.io/en/latest/tutorials/verilator-cosimulation.html. The integration currently supports AXI4, AXILite and Wishbone buses.

There is also an example of connecting Renode directly with FPGA: https://github.com/renode/renode/tree/master/scripts/complex/fomu

Other custom integrations are also possible since it’s very easy to extend Renode with new models/functionalities (both in C# or python).