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sigrok.pio
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sigrok.pio
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/*
* The MIT License (MIT)
*
* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
// here a frequency 7x higher than the sampling rate is required, so that
// no samples are missed at the trigger point.
// Note that timing of the first three samples is still not correct.
// My main concern was, that no transitions are missed.
// Anyway due to the frequency division
.program sigrok_d4_triggered
public entry_d4:
in pins, 4 [31] ; small start delay to get everything settled
mov isr, null [31]
in pins, 4 ; get start state and save it to X
mov x, isr
mov isr, null
wait_loop:
in pins, 4 ; get current state and save it to Y
mov y, isr
mov isr, null
jmp x != y, triggered
jmp wait_loop
triggered: ; -> triggered
in x, 4 ; store values of X and Y as first samples into ISR
in y, 4
.wrap_target
in pins, 4 [6] ; sample
.wrap
.program sigrok_1b_triggered
public entry_1b:
in pins, 8 [31] ; small start delay to get everything settled
mov isr, null [31]
in pins, 8 ; get start state and save it to X
mov x, isr
mov isr, null
wait_loop:
in pins, 8 ; get current state and save it to Y
mov y, isr
mov isr, null
jmp x != y, triggered
jmp wait_loop
triggered: ; -> triggered
in x, 8 ; store values of X and Y as first samples into ISR
in y, 8
.wrap_target
in pins, 8 [6] ; sample
.wrap
.program sigrok_2b_triggered
public entry_2b:
in pins, 16 [31] ; small start delay to get everything settled
mov isr, null [31]
in pins, 16 ; get start state and save it to X
mov x, isr
mov isr, null
wait_loop:
in pins, 16 ; get current state and save it to Y
mov y, isr
mov isr, null
jmp x != y, triggered
jmp wait_loop
triggered: ; -> triggered
in x, 16 ; store values of X and Y as first samples into ISR
in y, 16
.wrap_target
in pins, 16 [6] ; sample
.wrap