forked from illumos/gcc
/
regclass.c
2698 lines (2208 loc) · 78 KB
/
regclass.c
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/* Compute register class preferences for pseudo-registers.
Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
/* This file contains two passes of the compiler: reg_scan and reg_class.
It also defines some tables of information about the hardware registers
and a function init_reg_sets to initialize the tables. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "hard-reg-set.h"
#include "rtl.h"
#include "expr.h"
#include "tm_p.h"
#include "flags.h"
#include "basic-block.h"
#include "regs.h"
#include "function.h"
#include "insn-config.h"
#include "recog.h"
#include "reload.h"
#include "real.h"
#include "toplev.h"
#include "output.h"
#include "ggc.h"
#include "timevar.h"
#include "hashtab.h"
static void init_reg_sets_1 (void);
static void init_reg_autoinc (void);
/* If we have auto-increment or auto-decrement and we can have secondary
reloads, we are not allowed to use classes requiring secondary
reloads for pseudos auto-incremented since reload can't handle it. */
#ifdef AUTO_INC_DEC
#if defined(SECONDARY_INPUT_RELOAD_CLASS) || defined(SECONDARY_OUTPUT_RELOAD_CLASS)
#define FORBIDDEN_INC_DEC_CLASSES
#endif
#endif
/* Register tables used by many passes. */
/* Indexed by hard register number, contains 1 for registers
that are fixed use (stack pointer, pc, frame pointer, etc.).
These are the registers that cannot be used to allocate
a pseudo reg for general use. */
char fixed_regs[FIRST_PSEUDO_REGISTER];
/* Same info as a HARD_REG_SET. */
HARD_REG_SET fixed_reg_set;
/* Data for initializing the above. */
static const char initial_fixed_regs[] = FIXED_REGISTERS;
/* Indexed by hard register number, contains 1 for registers
that are fixed use or are clobbered by function calls.
These are the registers that cannot be used to allocate
a pseudo reg whose life crosses calls unless we are able
to save/restore them across the calls. */
char call_used_regs[FIRST_PSEUDO_REGISTER];
/* Same info as a HARD_REG_SET. */
HARD_REG_SET call_used_reg_set;
/* HARD_REG_SET of registers we want to avoid caller saving. */
HARD_REG_SET losing_caller_save_reg_set;
/* Data for initializing the above. */
static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
/* This is much like call_used_regs, except it doesn't have to
be a superset of FIXED_REGISTERS. This vector indicates
what is really call clobbered, and is used when defining
regs_invalidated_by_call. */
#ifdef CALL_REALLY_USED_REGISTERS
char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
#endif
#ifdef CALL_REALLY_USED_REGISTERS
#define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
#else
#define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
#endif
/* Indexed by hard register number, contains 1 for registers that are
fixed use or call used registers that cannot hold quantities across
calls even if we are willing to save and restore them. call fixed
registers are a subset of call used registers. */
char call_fixed_regs[FIRST_PSEUDO_REGISTER];
/* The same info as a HARD_REG_SET. */
HARD_REG_SET call_fixed_reg_set;
/* Number of non-fixed registers. */
int n_non_fixed_regs;
/* Indexed by hard register number, contains 1 for registers
that are being used for global register decls.
These must be exempt from ordinary flow analysis
and are also considered fixed. */
char global_regs[FIRST_PSEUDO_REGISTER];
/* Contains 1 for registers that are set or clobbered by calls. */
/* ??? Ideally, this would be just call_used_regs plus global_regs, but
for someone's bright idea to have call_used_regs strictly include
fixed_regs. Which leaves us guessing as to the set of fixed_regs
that are actually preserved. We know for sure that those associated
with the local stack frame are safe, but scant others. */
HARD_REG_SET regs_invalidated_by_call;
/* Table of register numbers in the order in which to try to use them. */
#ifdef REG_ALLOC_ORDER
int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
/* The inverse of reg_alloc_order. */
int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
#endif
/* For each reg class, a HARD_REG_SET saying which registers are in it. */
HARD_REG_SET reg_class_contents[N_REG_CLASSES];
/* The same information, but as an array of unsigned ints. We copy from
these unsigned ints to the table above. We do this so the tm.h files
do not have to be aware of the wordsize for machines with <= 64 regs.
Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
#define N_REG_INTS \
((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
= REG_CLASS_CONTENTS;
/* For each reg class, number of regs it contains. */
unsigned int reg_class_size[N_REG_CLASSES];
/* For each reg class, table listing all the containing classes. */
enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
/* For each reg class, table listing all the classes contained in it. */
enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
/* For each pair of reg classes,
a largest reg class contained in their union. */
enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
/* For each pair of reg classes,
the smallest reg class containing their union. */
enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
/* Array containing all of the register names. */
const char * reg_names[] = REGISTER_NAMES;
/* Array containing all of the register class names. */
const char * reg_class_names[] = REG_CLASS_NAMES;
/* For each hard register, the widest mode object that it can contain.
This will be a MODE_INT mode if the register can hold integers. Otherwise
it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
register. */
enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
/* 1 if there is a register of given mode. */
bool have_regs_of_mode [MAX_MACHINE_MODE];
/* 1 if class does contain register of given mode. */
static char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
/* Maximum cost of moving from a register in one class to a register in
another class. Based on REGISTER_MOVE_COST. */
static int move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
/* Similar, but here we don't have to move if the first index is a subset
of the second so in that case the cost is zero. */
static int may_move_in_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
/* Similar, but here we don't have to move if the first index is a superset
of the second so in that case the cost is zero. */
static int may_move_out_cost[MAX_MACHINE_MODE][N_REG_CLASSES][N_REG_CLASSES];
#ifdef FORBIDDEN_INC_DEC_CLASSES
/* These are the classes that regs which are auto-incremented or decremented
cannot be put in. */
static int forbidden_inc_dec_class[N_REG_CLASSES];
/* Indexed by n, is nonzero if (REG n) is used in an auto-inc or auto-dec
context. */
static char *in_inc_dec;
#endif /* FORBIDDEN_INC_DEC_CLASSES */
/* Sample MEM values for use by memory_move_secondary_cost. */
static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
/* Linked list of reg_info structures allocated for reg_n_info array.
Grouping all of the allocated structures together in one lump
means only one call to bzero to clear them, rather than n smaller
calls. */
struct reg_info_data {
struct reg_info_data *next; /* next set of reg_info structures */
size_t min_index; /* minimum index # */
size_t max_index; /* maximum index # */
char used_p; /* nonzero if this has been used previously */
reg_info data[1]; /* beginning of the reg_info data */
};
static struct reg_info_data *reg_info_head;
/* No more global register variables may be declared; true once
regclass has been initialized. */
static int no_global_reg_vars = 0;
/* Specify number of hard registers given machine mode occupy. */
unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
/* Function called only once to initialize the above data on reg usage.
Once this is done, various switches may override. */
void
init_reg_sets (void)
{
int i, j;
/* First copy the register information from the initial int form into
the regsets. */
for (i = 0; i < N_REG_CLASSES; i++)
{
CLEAR_HARD_REG_SET (reg_class_contents[i]);
/* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (int_reg_class_contents[i][j / 32]
& ((unsigned) 1 << (j % 32)))
SET_HARD_REG_BIT (reg_class_contents[i], j);
}
/* Sanity check: make sure the target macros FIXED_REGISTERS and
CALL_USED_REGISTERS had the right number of initializers. */
gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
memset (global_regs, 0, sizeof global_regs);
#ifdef REG_ALLOC_ORDER
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
inv_reg_alloc_order[reg_alloc_order[i]] = i;
#endif
}
/* After switches have been processed, which perhaps alter
`fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
static void
init_reg_sets_1 (void)
{
unsigned int i, j;
unsigned int /* enum machine_mode */ m;
/* This macro allows the fixed or call-used registers
and the register classes to depend on target flags. */
#ifdef CONDITIONAL_REGISTER_USAGE
CONDITIONAL_REGISTER_USAGE;
#endif
/* Compute number of hard regs in each class. */
memset (reg_class_size, 0, sizeof reg_class_size);
for (i = 0; i < N_REG_CLASSES; i++)
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
reg_class_size[i]++;
/* Initialize the table of subunions.
reg_class_subunion[I][J] gets the largest-numbered reg-class
that is contained in the union of classes I and J. */
for (i = 0; i < N_REG_CLASSES; i++)
{
for (j = 0; j < N_REG_CLASSES; j++)
{
HARD_REG_SET c;
int k;
COPY_HARD_REG_SET (c, reg_class_contents[i]);
IOR_HARD_REG_SET (c, reg_class_contents[j]);
for (k = 0; k < N_REG_CLASSES; k++)
{
GO_IF_HARD_REG_SUBSET (reg_class_contents[k], c,
subclass1);
continue;
subclass1:
/* Keep the largest subclass. */ /* SPEE 900308 */
GO_IF_HARD_REG_SUBSET (reg_class_contents[k],
reg_class_contents[(int) reg_class_subunion[i][j]],
subclass2);
reg_class_subunion[i][j] = (enum reg_class) k;
subclass2:
;
}
}
}
/* Initialize the table of superunions.
reg_class_superunion[I][J] gets the smallest-numbered reg-class
containing the union of classes I and J. */
for (i = 0; i < N_REG_CLASSES; i++)
{
for (j = 0; j < N_REG_CLASSES; j++)
{
HARD_REG_SET c;
int k;
COPY_HARD_REG_SET (c, reg_class_contents[i]);
IOR_HARD_REG_SET (c, reg_class_contents[j]);
for (k = 0; k < N_REG_CLASSES; k++)
GO_IF_HARD_REG_SUBSET (c, reg_class_contents[k], superclass);
superclass:
reg_class_superunion[i][j] = (enum reg_class) k;
}
}
/* Initialize the tables of subclasses and superclasses of each reg class.
First clear the whole table, then add the elements as they are found. */
for (i = 0; i < N_REG_CLASSES; i++)
{
for (j = 0; j < N_REG_CLASSES; j++)
{
reg_class_superclasses[i][j] = LIM_REG_CLASSES;
reg_class_subclasses[i][j] = LIM_REG_CLASSES;
}
}
for (i = 0; i < N_REG_CLASSES; i++)
{
if (i == (int) NO_REGS)
continue;
for (j = i + 1; j < N_REG_CLASSES; j++)
{
enum reg_class *p;
GO_IF_HARD_REG_SUBSET (reg_class_contents[i], reg_class_contents[j],
subclass);
continue;
subclass:
/* Reg class I is a subclass of J.
Add J to the table of superclasses of I. */
p = ®_class_superclasses[i][0];
while (*p != LIM_REG_CLASSES) p++;
*p = (enum reg_class) j;
/* Add I to the table of superclasses of J. */
p = ®_class_subclasses[j][0];
while (*p != LIM_REG_CLASSES) p++;
*p = (enum reg_class) i;
}
}
/* Initialize "constant" tables. */
CLEAR_HARD_REG_SET (fixed_reg_set);
CLEAR_HARD_REG_SET (call_used_reg_set);
CLEAR_HARD_REG_SET (call_fixed_reg_set);
CLEAR_HARD_REG_SET (regs_invalidated_by_call);
memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
n_non_fixed_regs = 0;
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
/* call_used_regs must include fixed_regs. */
gcc_assert (!fixed_regs[i] || call_used_regs[i]);
#ifdef CALL_REALLY_USED_REGISTERS
/* call_used_regs must include call_really_used_regs. */
gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
#endif
if (fixed_regs[i])
SET_HARD_REG_BIT (fixed_reg_set, i);
else
n_non_fixed_regs++;
if (call_used_regs[i])
SET_HARD_REG_BIT (call_used_reg_set, i);
if (call_fixed_regs[i])
SET_HARD_REG_BIT (call_fixed_reg_set, i);
if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (i)))
SET_HARD_REG_BIT (losing_caller_save_reg_set, i);
/* There are a couple of fixed registers that we know are safe to
exclude from being clobbered by calls:
The frame pointer is always preserved across calls. The arg pointer
is if it is fixed. The stack pointer usually is, unless
RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
If we are generating PIC code, the PIC offset table register is
preserved across calls, though the target can override that. */
if (i == STACK_POINTER_REGNUM)
;
else if (global_regs[i])
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
else if (i == FRAME_POINTER_REGNUM)
;
#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
else if (i == HARD_FRAME_POINTER_REGNUM)
;
#endif
#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
;
#endif
#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
;
#endif
else if (CALL_REALLY_USED_REGNO_P (i))
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
}
memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
for (i = 0; i < N_REG_CLASSES; i++)
if ((unsigned) CLASS_MAX_NREGS (i, m) <= reg_class_size[i])
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (!fixed_regs [j] && TEST_HARD_REG_BIT (reg_class_contents[i], j)
&& HARD_REGNO_MODE_OK (j, m))
{
contains_reg_of_mode [i][m] = 1;
have_regs_of_mode [m] = 1;
break;
}
/* Initialize the move cost table. Find every subset of each class
and take the maximum cost of moving any subset to any other. */
for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
if (have_regs_of_mode [m])
{
for (i = 0; i < N_REG_CLASSES; i++)
if (contains_reg_of_mode [i][m])
for (j = 0; j < N_REG_CLASSES; j++)
{
int cost;
enum reg_class *p1, *p2;
if (!contains_reg_of_mode [j][m])
{
move_cost[m][i][j] = 65536;
may_move_in_cost[m][i][j] = 65536;
may_move_out_cost[m][i][j] = 65536;
}
else
{
cost = REGISTER_MOVE_COST (m, i, j);
for (p2 = ®_class_subclasses[j][0];
*p2 != LIM_REG_CLASSES;
p2++)
if (*p2 != i && contains_reg_of_mode [*p2][m])
cost = MAX (cost, move_cost [m][i][*p2]);
for (p1 = ®_class_subclasses[i][0];
*p1 != LIM_REG_CLASSES;
p1++)
if (*p1 != j && contains_reg_of_mode [*p1][m])
cost = MAX (cost, move_cost [m][*p1][j]);
move_cost[m][i][j] = cost;
if (reg_class_subset_p (i, j))
may_move_in_cost[m][i][j] = 0;
else
may_move_in_cost[m][i][j] = cost;
if (reg_class_subset_p (j, i))
may_move_out_cost[m][i][j] = 0;
else
may_move_out_cost[m][i][j] = cost;
}
}
else
for (j = 0; j < N_REG_CLASSES; j++)
{
move_cost[m][i][j] = 65536;
may_move_in_cost[m][i][j] = 65536;
may_move_out_cost[m][i][j] = 65536;
}
}
}
/* Compute the table of register modes.
These values are used to record death information for individual registers
(as opposed to a multi-register mode). */
void
init_reg_modes_once (void)
{
int i, j;
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
for (j = 0; j < MAX_MACHINE_MODE; j++)
hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
/* If we couldn't find a valid mode, just use the previous mode.
??? One situation in which we need to do this is on the mips where
HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
to use DF mode for the even registers and VOIDmode for the odd
(for the cpu models where the odd ones are inaccessible). */
if (reg_raw_mode[i] == VOIDmode)
reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
}
}
/* Finish initializing the register sets and
initialize the register modes. */
void
init_regs (void)
{
/* This finishes what was started by init_reg_sets, but couldn't be done
until after register usage was specified. */
init_reg_sets_1 ();
init_reg_autoinc ();
}
/* Initialize some fake stack-frame MEM references for use in
memory_move_secondary_cost. */
void
init_fake_stack_mems (void)
{
#ifdef HAVE_SECONDARY_RELOADS
{
int i;
for (i = 0; i < MAX_MACHINE_MODE; i++)
top_of_stack[i] = gen_rtx_MEM (i, stack_pointer_rtx);
}
#endif
}
#ifdef HAVE_SECONDARY_RELOADS
/* Compute extra cost of moving registers to/from memory due to reloads.
Only needed if secondary reloads are required for memory moves. */
int
memory_move_secondary_cost (enum machine_mode mode, enum reg_class class, int in)
{
enum reg_class altclass;
int partial_cost = 0;
/* We need a memory reference to feed to SECONDARY... macros. */
/* mem may be unused even if the SECONDARY_ macros are defined. */
rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
if (in)
{
#ifdef SECONDARY_INPUT_RELOAD_CLASS
altclass = SECONDARY_INPUT_RELOAD_CLASS (class, mode, mem);
#else
altclass = NO_REGS;
#endif
}
else
{
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
altclass = SECONDARY_OUTPUT_RELOAD_CLASS (class, mode, mem);
#else
altclass = NO_REGS;
#endif
}
if (altclass == NO_REGS)
return 0;
if (in)
partial_cost = REGISTER_MOVE_COST (mode, altclass, class);
else
partial_cost = REGISTER_MOVE_COST (mode, class, altclass);
if (class == altclass)
/* This isn't simply a copy-to-temporary situation. Can't guess
what it is, so MEMORY_MOVE_COST really ought not to be calling
here in that case.
I'm tempted to put in an assert here, but returning this will
probably only give poor estimates, which is what we would've
had before this code anyways. */
return partial_cost;
/* Check if the secondary reload register will also need a
secondary reload. */
return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
}
#endif
/* Return a machine mode that is legitimate for hard reg REGNO and large
enough to save nregs. If we can't find one, return VOIDmode.
If CALL_SAVED is true, only consider modes that are call saved. */
enum machine_mode
choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
unsigned int nregs, bool call_saved)
{
unsigned int /* enum machine_mode */ m;
enum machine_mode found_mode = VOIDmode, mode;
/* We first look for the largest integer mode that can be validly
held in REGNO. If none, we look for the largest floating-point mode.
If we still didn't find a valid mode, try CCmode. */
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
&& HARD_REGNO_MODE_OK (regno, mode)
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
found_mode = mode;
if (found_mode != VOIDmode)
return found_mode;
for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
&& HARD_REGNO_MODE_OK (regno, mode)
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
found_mode = mode;
if (found_mode != VOIDmode)
return found_mode;
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
&& HARD_REGNO_MODE_OK (regno, mode)
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
found_mode = mode;
if (found_mode != VOIDmode)
return found_mode;
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
&& HARD_REGNO_MODE_OK (regno, mode)
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
found_mode = mode;
if (found_mode != VOIDmode)
return found_mode;
/* Iterate over all of the CCmodes. */
for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
{
mode = (enum machine_mode) m;
if ((unsigned) hard_regno_nregs[regno][mode] == nregs
&& HARD_REGNO_MODE_OK (regno, mode)
&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
return mode;
}
/* We can't find a mode valid for this register. */
return VOIDmode;
}
/* Specify the usage characteristics of the register named NAME.
It should be a fixed register if FIXED and a
call-used register if CALL_USED. */
void
fix_register (const char *name, int fixed, int call_used)
{
int i;
/* Decode the name and update the primary form of
the register info. */
if ((i = decode_reg_name (name)) >= 0)
{
if ((i == STACK_POINTER_REGNUM
#ifdef HARD_FRAME_POINTER_REGNUM
|| i == HARD_FRAME_POINTER_REGNUM
#else
|| i == FRAME_POINTER_REGNUM
#endif
)
&& (fixed == 0 || call_used == 0))
{
static const char * const what_option[2][2] = {
{ "call-saved", "call-used" },
{ "no-such-option", "fixed" }};
error ("can't use '%s' as a %s register", name,
what_option[fixed][call_used]);
}
else
{
fixed_regs[i] = fixed;
call_used_regs[i] = call_used;
#ifdef CALL_REALLY_USED_REGISTERS
if (fixed == 0)
call_really_used_regs[i] = call_used;
#endif
}
}
else
{
warning ("unknown register name: %s", name);
}
}
/* Mark register number I as global. */
void
globalize_reg (int i)
{
if (fixed_regs[i] == 0 && no_global_reg_vars)
error ("global register variable follows a function definition");
if (global_regs[i])
{
warning ("register used for two global register variables");
return;
}
if (call_used_regs[i] && ! fixed_regs[i])
warning ("call-clobbered register used for global register variable");
global_regs[i] = 1;
/* If we're globalizing the frame pointer, we need to set the
appropriate regs_invalidated_by_call bit, even if it's already
set in fixed_regs. */
if (i != STACK_POINTER_REGNUM)
SET_HARD_REG_BIT (regs_invalidated_by_call, i);
/* If already fixed, nothing else to do. */
if (fixed_regs[i])
return;
fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
#ifdef CALL_REALLY_USED_REGISTERS
call_really_used_regs[i] = 1;
#endif
n_non_fixed_regs--;
SET_HARD_REG_BIT (fixed_reg_set, i);
SET_HARD_REG_BIT (call_used_reg_set, i);
SET_HARD_REG_BIT (call_fixed_reg_set, i);
}
/* Now the data and code for the `regclass' pass, which happens
just before local-alloc. */
/* The `costs' struct records the cost of using a hard register of each class
and of using memory for each pseudo. We use this data to set up
register class preferences. */
struct costs
{
int cost[N_REG_CLASSES];
int mem_cost;
};
/* Structure used to record preferences of given pseudo. */
struct reg_pref
{
/* (enum reg_class) prefclass is the preferred class. */
char prefclass;
/* altclass is a register class that we should use for allocating
pseudo if no register in the preferred class is available.
If no register in this class is available, memory is preferred.
It might appear to be more general to have a bitmask of classes here,
but since it is recommended that there be a class corresponding to the
union of most major pair of classes, that generality is not required. */
char altclass;
};
/* Record the cost of each class for each pseudo. */
static struct costs *costs;
/* Initialized once, and used to initialize cost values for each insn. */
static struct costs init_cost;
/* Record preferences of each pseudo.
This is available after `regclass' is run. */
static struct reg_pref *reg_pref;
/* Allocated buffers for reg_pref. */
static struct reg_pref *reg_pref_buffer;
/* Frequency of executions of current insn. */
static int frequency;
static rtx scan_one_insn (rtx, int);
static void record_operand_costs (rtx, struct costs *, struct reg_pref *);
static void dump_regclass (FILE *);
static void record_reg_classes (int, int, rtx *, enum machine_mode *,
const char **, rtx, struct costs *,
struct reg_pref *);
static int copy_cost (rtx, enum machine_mode, enum reg_class, int);
static void record_address_regs (rtx, enum reg_class, int);
#ifdef FORBIDDEN_INC_DEC_CLASSES
static int auto_inc_dec_reg_p (rtx, enum machine_mode);
#endif
static void reg_scan_mark_refs (rtx, rtx, int, unsigned int);
/* Return the reg_class in which pseudo reg number REGNO is best allocated.
This function is sometimes called before the info has been computed.
When that happens, just return GENERAL_REGS, which is innocuous. */
enum reg_class
reg_preferred_class (int regno)
{
if (reg_pref == 0)
return GENERAL_REGS;
return (enum reg_class) reg_pref[regno].prefclass;
}
enum reg_class
reg_alternate_class (int regno)
{
if (reg_pref == 0)
return ALL_REGS;
return (enum reg_class) reg_pref[regno].altclass;
}
/* Initialize some global data for this pass. */
void
regclass_init (void)
{
int i;
init_cost.mem_cost = 10000;
for (i = 0; i < N_REG_CLASSES; i++)
init_cost.cost[i] = 10000;
/* This prevents dump_flow_info from losing if called
before regclass is run. */
reg_pref = NULL;
/* No more global register variables may be declared. */
no_global_reg_vars = 1;
}
/* Dump register costs. */
static void
dump_regclass (FILE *dump)
{
int i;
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
{
int /* enum reg_class */ class;
if (REG_N_REFS (i))
{
fprintf (dump, " Register %i costs:", i);
for (class = 0; class < (int) N_REG_CLASSES; class++)
if (contains_reg_of_mode [(enum reg_class) class][PSEUDO_REGNO_MODE (i)]
#ifdef FORBIDDEN_INC_DEC_CLASSES
&& (!in_inc_dec[i]
|| !forbidden_inc_dec_class[(enum reg_class) class])
#endif
#ifdef CANNOT_CHANGE_MODE_CLASS
&& ! invalid_mode_change_p (i, (enum reg_class) class,
PSEUDO_REGNO_MODE (i))
#endif
)
fprintf (dump, " %s:%i", reg_class_names[class],
costs[i].cost[(enum reg_class) class]);
fprintf (dump, " MEM:%i\n", costs[i].mem_cost);
}
}
}
/* Calculate the costs of insn operands. */
static void
record_operand_costs (rtx insn, struct costs *op_costs,
struct reg_pref *reg_pref)
{
const char *constraints[MAX_RECOG_OPERANDS];
enum machine_mode modes[MAX_RECOG_OPERANDS];
int i;
for (i = 0; i < recog_data.n_operands; i++)
{
constraints[i] = recog_data.constraints[i];
modes[i] = recog_data.operand_mode[i];
}
/* If we get here, we are set up to record the costs of all the
operands for this insn. Start by initializing the costs.
Then handle any address registers. Finally record the desired
classes for any pseudos, doing it twice if some pair of
operands are commutative. */
for (i = 0; i < recog_data.n_operands; i++)
{
op_costs[i] = init_cost;
if (GET_CODE (recog_data.operand[i]) == SUBREG)
recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
if (MEM_P (recog_data.operand[i]))
record_address_regs (XEXP (recog_data.operand[i], 0),
MODE_BASE_REG_CLASS (modes[i]), frequency * 2);
else if (constraints[i][0] == 'p'
|| EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
record_address_regs (recog_data.operand[i],
MODE_BASE_REG_CLASS (modes[i]), frequency * 2);
}
/* Check for commutative in a separate loop so everything will
have been initialized. We must do this even if one operand
is a constant--see addsi3 in m68k.md. */
for (i = 0; i < (int) recog_data.n_operands - 1; i++)