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one question about nanf process #1092
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hello, who can help answer this, thanks. |
Hi, I met the same issue when testing glibc. The full analysis is recorded in felixonmars/archriscv-packages#1704. TLDR, I think the root cause can be found in chapter 11.3 of riscv-spec-20191213, Except when otherwise stated, if the result of a floating-point operation is NaN, it is the canonical NaN. The canonical NaN has a positive sign and all significand bits clear except the MSB, a.k.a. the quiet bit. For single-precision floating-point, this corresponds to the pattern 0x7fc00000. which means that conversion I think this case wrong as well. Other architecture does keep the signbit when converting. As for solution, I don't know how to deal with it :( |
@FantasqueX I have found the rootcause of case A is due to gcc implements nanf by builtin function and this will convert the calling of That's why I have not close this issue and am looking for more input from professional person. |
No activity in over a year and if the issue is valid then it should probably be logged in the relevant upstream project (GCC, Glibc, Newlib?) rather than here on |
Case A:
Case B:
When I compile these two code segments with riscv64-gcc(11.0 and 13.0 both), I find different behavior and result.
For case A, gcc will use a constant value of -NaN, but not call nanf(), equal to "snprintf(buf, sizeof(buf), "[%a]", -NAN);" and we can get "-nan" in buf[].
For case B, gcc will call
nanf()
but this makes thesnprintf()
print buf[] as "nan". It's not expected. I disassemble the code and find the problem is caused by an instruction offcvt.d.s
fa0 stores return value from nanf() and it is 0xfffff7fc00000, I think it is correct, it is NAN in single float.
in line 10604, fa5 is given 0xfffffffc00000, it is -NAN in single float, I think it is no problem.
but in line 10608,
fcvt.d.s
convert 0xfffffffc00000 to 0x7ff8000000000000, and the sign bit is zero and lost the negative. Note I am running this on QEMU(tried 6.2 and 7.0 both the same result)I wonder
Thanks a lot.
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