Add an example DTS for the HiFive Unleashed #8
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This is the device tree that's shipped on the HiFive Unleashed, where it lives inside the FSBL (which is in a SPI flash). As that's the only currently availiable RISC-V Linux board it should serve as a good reference for people who want to poke around in device tree land. This device tree contains entries that coorespond to devices on the MicroSemi expansion board. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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Looks good overall. (But note that I'm not a real devicetree expert — those are on the devicetree@vger.kernel.org mailing list)
| sifive,fsbl = "YYYY-MM-DD"; | ||
| }; | ||
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| L3: cpus { |
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The labels are a bit meaningless (but still better than explicit phandles :)
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Ya, I agree. They're auto-generated, though, and I'm afraid I won't have time to make something prettier.
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Who adds the phandles then ? Especially for interrupt-controller.
bbl expects a phandle in during query hart.
| L2: soc { | ||
| #address-cells = <2>; | ||
| #size-cells = <2>; | ||
| compatible = "SiFive,FU540G-soc", "fu500-soc", "sifive-soc", "simple-bus"; |
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s/SiFive,/sifive,/ perhaps; it's spelled lowercase elsewhere
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It looks like we mix these all over the place. We should clean it up when these actually land as a spec.
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@neuschaefer Thanks. This is more of a way to answer the common question of "what is the HiFive Unleashed's device tree" than a stamp of approval. We'll still get every binding properly reviewed and then update this accordingly. |
This is the device tree that's shipped on the HiFive Unleashed, where it
lives inside the FSBL (which is in a SPI flash). As that's the only
currently availiable RISC-V Linux board it should serve as a good
reference for people who want to poke around in device tree land.
This device tree contains entries that coorespond to devices on the
MicroSemi expansion board.
Signed-off-by: Palmer Dabbelt palmer@sifive.com