c_mul.adoc

c.mul

Synopsis

Multiply, 16-bit encoding

Mnemonic

c.mul rsd', rs2'

Encoding (RV32, RV64)

{reg:[
    { bits:  2, name: 0x1, attr: ['C1'] },
    { bits:  3, name: 'rs2\'', attr: ['SRC2']  },
    { bits:  2, name: 0x2, attr: ['FUNCT2'] },
    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
    { bits:  3, name: 0x7 },
    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
],config:{bits:16}}

Description

This instruction multiplies XLEN bits of the source operands from rsd' and rs2' and writes the lowest XLEN bits of the result to rsd'.

Note	rd'/rs1' and rs2' are from the standard 8-register set x8-x15.

Prerequisites

M or Zmmul must be configured.

32-bit equivalent

[insns-mul]

Note	The SAIL module variable for rd'/rs1' is called rsdc, and for rs2' is called rs2c.

Operation

let result_wide = to_bits(2 * sizeof(xlen), signed(X(rsdc)) * signed(X(rs2c)));
X(rsdc) = result_wide[(sizeof(xlen) - 1) .. 0];

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