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I’m doing some bare metal coding on the Rock960 and would like to use the PERILPM0 core on the Cortex-M0. To do that I would need to remap its memory. The Rockchip TRM for the RK3399 (Rev 1.3, Dec. 2016), in section 7 has some tables describing how to remap memory. The problem is the tables reference GRF registers for which there is no documentation. For example, in Table 7.2 it calls out [31:28]: sgrf_perilp_m0_con7[3:0] and [27:12]: sgrf_perilp_m0_con3[15:0] to remap memory starting at 0x0. But nowhere in either part 1 or part 2 of the TRM are the registers sgrf_perilp_m0_con3 or sgrf_perilp_mo_con7 locations defined.
The text was updated successfully, but these errors were encountered:
I’m doing some bare metal coding on the Rock960 and would like to use the PERILPM0 core on the Cortex-M0. To do that I would need to remap its memory. The Rockchip TRM for the RK3399 (Rev 1.3, Dec. 2016), in section 7 has some tables describing how to remap memory. The problem is the tables reference GRF registers for which there is no documentation. For example, in Table 7.2 it calls out [31:28]: sgrf_perilp_m0_con7[3:0] and [27:12]: sgrf_perilp_m0_con3[15:0] to remap memory starting at 0x0. But nowhere in either part 1 or part 2 of the TRM are the registers sgrf_perilp_m0_con3 or sgrf_perilp_mo_con7 locations defined.
The text was updated successfully, but these errors were encountered: