FPGA_Clock

A Multi-function digital clock just download the zip file if you need this project

Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
Lab3.qsf		Lab3.qsf
Lab3.qws		Lab3.qws
Lab4.dpf		Lab4.dpf
Lab4.qsf		Lab4.qsf
Lab4.qws		Lab4.qws
Lab4_nativelink_simulation.rpt		Lab4_nativelink_simulation.rpt
Lab_final.zip		Lab_final.zip
README.md		README.md
Waveform.vwf		Waveform.vwf
Waveform1.vwf		Waveform1.vwf
Waveform2.vwf		Waveform2.vwf
Waveform3.vwf		Waveform3.vwf
Waveform4.vwf		Waveform4.vwf
alarm_04.bdf		alarm_04.bdf
alarm_04.bsf		alarm_04.bsf
anti_vib_04.bdf		anti_vib_04.bdf
anti_vib_04.bsf		anti_vib_04.bsf
cal_divnum.bsf		cal_divnum.bsf
cal_divnum_04.bsf		cal_divnum_04.bsf
cal_divnum_04.v		cal_divnum_04.v
cal_divnum_04.v.bak		cal_divnum_04.v.bak
clock_time_04.bdf		clock_time_04.bdf
clock_time_04.bsf		clock_time_04.bsf
code_select_04.bdf		code_select_04.bdf
code_select_04.bsf		code_select_04.bsf
code_select_04.vwf		code_select_04.vwf
counter100_04.bsf		counter100_04.bsf
counter100_04.v		counter100_04.v
counter100_04.v.bak		counter100_04.v.bak
counter24.bsf		counter24.bsf
counter24.inc		counter24.inc
counter24.v.bak		counter24.v.bak
counter24_04.bsf		counter24_04.bsf
counter24_04.v		counter24_04.v
counter24_04.v.bak		counter24_04.v.bak
counter24_04.vwf		counter24_04.vwf
counter3_04.bsf		counter3_04.bsf
counter3_04.v		counter3_04.v
counter3_04.v.bak		counter3_04.v.bak
counter60_04.bsf		counter60_04.bsf
counter60_04.v		counter60_04.v
counter60_04.v.bak		counter60_04.v.bak
counter60_04.vwf		counter60_04.vwf
counter6_04.bdf		counter6_04.bdf
counter6_04.bsf		counter6_04.bsf
counter8_04.bsf		counter8_04.bsf
counter8_04.qip		counter8_04.qip
counter8_04.v		counter8_04.v
counter8_04.v.bak		counter8_04.v.bak
counter8_04.vwf		counter8_04.vwf
counter8_04_bb.v		counter8_04_bb.v
counter_output_04.bdf		counter_output_04.bdf
counter_output_04.bsf		counter_output_04.bsf
decoder_04.bdf		decoder_04.bdf
decoder_04.bsf		decoder_04.bsf
decoder_04.vwf		decoder_04.vwf
demux8_04.v.bak		demux8_04.v.bak
demuxer1_04.bsf		demuxer1_04.bsf
demuxer1_04.v		demuxer1_04.v
demuxer1_04.v.bak		demuxer1_04.v.bak
demuxer8_04.bsf		demuxer8_04.bsf
demuxer8_04.v		demuxer8_04.v
demuxer8_04.v.bak		demuxer8_04.v.bak
dig_select_04.bdf		dig_select_04.bdf
dig_select_04.bsf		dig_select_04.bsf
dig_select_04.vwf		dig_select_04.vwf
display_04.bdf		display_04.bdf
display_04.bsf		display_04.bsf
dynamic_04.bdf		dynamic_04.bdf
fre_div_04.bdf		fre_div_04.bdf
fre_div_04.bsf		fre_div_04.bsf
fre_sel_04.bsf		fre_sel_04.bsf
fre_sel_04.qip		fre_sel_04.qip
fre_sel_04.v		fre_sel_04.v
fre_sel_04_bb.v		fre_sel_04_bb.v
fre_sw_04.bsf		fre_sw_04.bsf
fre_sw_04.qip		fre_sw_04.qip
fre_sw_04.v		fre_sw_04.v
fre_sw_04_bb.v		fre_sw_04_bb.v
hour_tell_04.bsf		hour_tell_04.bsf
hour_tell_04.qip		hour_tell_04.qip
hour_tell_04.v		hour_tell_04.v
hour_tell_04_bb.v		hour_tell_04_bb.v
keyboard_04.bdf		keyboard_04.bdf
keyboard_04.bsf		keyboard_04.bsf
lab_final.qpf		lab_final.qpf
loader_04.bsf		loader_04.bsf
loader_04.v		loader_04.v
loader_04.v.bak		loader_04.v.bak
lpm_decode_04.bsf		lpm_decode_04.bsf
lpm_decode_04.qip		lpm_decode_04.qip
lpm_decode_04.v		lpm_decode_04.v
lpm_decode_04_bb.v		lpm_decode_04_bb.v
mux8_2_04.v		mux8_2_04.v
mux8_2_04_bb.v		mux8_2_04_bb.v
skyland_04.mif		skyland_04.mif
speed_ctrl_04.bsf		speed_ctrl_04.bsf
speed_ctrl_04.v		speed_ctrl_04.v
speed_ctrl_04.v.bak		speed_ctrl_04.v.bak
time_compare_04.bsf		time_compare_04.bsf

spinsirr/FPGA_Clock

Folders and files

Latest commit

History