Meeting 2024-04-23

[adamgreig]

Welcome to the Discussions page for our weekly meetings!

For this meeting we'll be trying out our new idea of focusing on doing some implementation/writing/closing issues/etc rather than just discussing. In that vein please add anything you'd like to nominate for the upcoming meeting. The topics from the minutes of the previous meeting are:

• SPI trait documentation: how and when to share the SpiBus
• Better Delay provider in cortex-m (can be cloned, using either asm::nop or SysTick?)
• c-m-interrupt-number/c-m-pac-interface
• update discovery and/or book tooling pages to mention probe-rs instead of openocd
• deprecate and archive mutex-trait
• perhaps swap cortex-m back to 0.7 by reverting the 0.8 breaking change and get a 0.7 release out
• cortex-m-rt release
• Is nomem a correct option for isb, dsb and dmb? cortex-m#502
• Incorrect implementation of cortex_m::peripheral::scb::VectActive::from() in stable release 0.7.7 cortex-m#499
• "Extra Sections" example is potentially unsound cortex-m#498
• cargo-binutils CI broken preventing a new release
• remove bors from wg/ops documents

As always, the meeting will be at 8pm Europe/Berlin time and takes place over text in the Rust Embedded Matrix channel (#rust-embedded:matrix.org).

[jamesmunns]

Re: rust-embedded/cortex-m#498, I'd be interested in working on improving https://github.com/jamesmunns/grounded to cover more common examples.

If anyone would like to review or assist I'd appreciate it!

Edit: I can't do this this week, but will re-nominate it in a future impl meeting!

[bugadani]

There's a question about embedded-hal-bus::spi::ExclusiveDevice: almindor/mipidsi#129 (comment) Should ExclusiveDevice documentation be clarified that CS must be set to a correct initial level, or should the implementation be changed for constructor to set the level itself?

[ryan-summers]

I'd be interested in working on rust-embedded/embedded-hal#579 to update the new embedded-hal-bus to support more design patterns, such as sharing communication buses across interrupt contexts (i.e. in multiple RTIC tasks).