Rename bmi to bmi1

In accordance with rust-lang/rust#48565
rust-lang · Mar 2, 2018 · 678cbd3 · 678cbd3
1 parent 78dd56a
commit 678cbd3
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Showing 6 changed files with 33 additions and 41 deletions.
diff --git a/coresimd/x86/bmi.rs b/coresimd/x86/bmi.rs
@@ -15,7 +15,7 @@ use stdsimd_test::assert_instr;
 /// Extracts bits in range [`start`, `start` + `length`) from `a` into
 /// the least significant bits of the result.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(bextr))]
 pub unsafe fn _bextr_u32(a: u32, start: u32, len: u32) -> u32 {
     _bextr2_u32(a, (start & 0xff_u32) | ((len & 0xff_u32) << 8_u32))
@@ -27,31 +27,31 @@ pub unsafe fn _bextr_u32(a: u32, start: u32, len: u32) -> u32 {
 /// Bits [7,0] of `control` specify the index to the first bit in the range to
 /// be extracted, and bits [15,8] specify the length of the range.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(bextr))]
 pub unsafe fn _bextr2_u32(a: u32, control: u32) -> u32 {
     x86_bmi_bextr_32(a, control)
 }
 
 /// Bitwise logical `AND` of inverted `a` with `b`.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(andn))]
 pub unsafe fn _andn_u32(a: u32, b: u32) -> u32 {
     !a & b
 }
 
 /// Extract lowest set isolated bit.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsi))]
 pub unsafe fn _blsi_u32(x: u32) -> u32 {
     x & x.wrapping_neg()
 }
 
 /// Get mask up to lowest set bit.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsmsk))]
 pub unsafe fn _blsmsk_u32(x: u32) -> u32 {
     x ^ (x.wrapping_sub(1_u32))
@@ -61,7 +61,7 @@ pub unsafe fn _blsmsk_u32(x: u32) -> u32 {
 ///
 /// If `x` is sets CF.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsr))]
 pub unsafe fn _blsr_u32(x: u32) -> u32 {
     x & (x.wrapping_sub(1))
@@ -71,7 +71,7 @@ pub unsafe fn _blsr_u32(x: u32) -> u32 {
 ///
 /// When the source operand is 0, it returns its size in bits.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 pub unsafe fn _tzcnt_u32(x: u32) -> u32 {
     x.trailing_zeros()
@@ -81,7 +81,7 @@ pub unsafe fn _tzcnt_u32(x: u32) -> u32 {
 ///
 /// When the source operand is 0, it returns its size in bits.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 pub unsafe fn _mm_tzcnt_32(x: u32) -> i32 {
     x.trailing_zeros() as i32
@@ -98,13 +98,13 @@ mod tests {
 
     use coresimd::x86::*;
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_bextr_u32() {
         let r = _bextr_u32(0b0101_0000u32, 4, 4);
         assert_eq!(r, 0b0000_0101u32);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_andn_u32() {
         assert_eq!(_andn_u32(0, 0), 0);
         assert_eq!(_andn_u32(0, 1), 1);
@@ -127,25 +127,25 @@ mod tests {
         assert_eq!(r, 0b0001_1101u32);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_blsi_u32() {
         assert_eq!(_blsi_u32(0b1101_0000u32), 0b0001_0000u32);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_blsmsk_u32() {
         let r = _blsmsk_u32(0b0011_0000u32);
         assert_eq!(r, 0b0001_1111u32);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_blsr_u32() {
         // TODO: test the behavior when the input is 0
         let r = _blsr_u32(0b0011_0000u32);
         assert_eq!(r, 0b0010_0000u32);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_tzcnt_u32() {
         assert_eq!(_tzcnt_u32(0b0000_0001u32), 0u32);
         assert_eq!(_tzcnt_u32(0b0000_0000u32), 32u32);

diff --git a/coresimd/x86_64/bmi.rs b/coresimd/x86_64/bmi.rs
@@ -15,7 +15,7 @@ use stdsimd_test::assert_instr;
 /// Extracts bits in range [`start`, `start` + `length`) from `a` into
 /// the least significant bits of the result.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(bextr))]
 #[cfg(not(target_arch = "x86"))]
 pub unsafe fn _bextr_u64(a: u64, start: u32, len: u32) -> u64 {
@@ -28,7 +28,7 @@ pub unsafe fn _bextr_u64(a: u64, start: u32, len: u32) -> u64 {
 /// Bits [7,0] of `control` specify the index to the first bit in the range to
 /// be extracted, and bits [15,8] specify the length of the range.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(bextr))]
 #[cfg(not(target_arch = "x86"))]
 pub unsafe fn _bextr2_u64(a: u64, control: u64) -> u64 {
@@ -37,15 +37,15 @@ pub unsafe fn _bextr2_u64(a: u64, control: u64) -> u64 {
 
 /// Bitwise logical `AND` of inverted `a` with `b`.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(andn))]
 pub unsafe fn _andn_u64(a: u64, b: u64) -> u64 {
     !a & b
 }
 
 /// Extract lowest set isolated bit.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsi))]
 #[cfg(not(target_arch = "x86"))] // generates lots of instructions
 pub unsafe fn _blsi_u64(x: u64) -> u64 {
@@ -54,7 +54,7 @@ pub unsafe fn _blsi_u64(x: u64) -> u64 {
 
 /// Get mask up to lowest set bit.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsmsk))]
 #[cfg(not(target_arch = "x86"))] // generates lots of instructions
 pub unsafe fn _blsmsk_u64(x: u64) -> u64 {
@@ -65,7 +65,7 @@ pub unsafe fn _blsmsk_u64(x: u64) -> u64 {
 ///
 /// If `x` is sets CF.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsr))]
 #[cfg(not(target_arch = "x86"))] // generates lots of instructions
 pub unsafe fn _blsr_u64(x: u64) -> u64 {
@@ -76,7 +76,7 @@ pub unsafe fn _blsr_u64(x: u64) -> u64 {
 ///
 /// When the source operand is 0, it returns its size in bits.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 pub unsafe fn _tzcnt_u64(x: u64) -> u64 {
     x.trailing_zeros() as u64
@@ -86,7 +86,7 @@ pub unsafe fn _tzcnt_u64(x: u64) -> u64 {
 ///
 /// When the source operand is 0, it returns its size in bits.
 #[inline]
-#[target_feature(enable = "bmi")]
+#[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 pub unsafe fn _mm_tzcnt_64(x: u64) -> i64 {
     x.trailing_zeros() as i64
@@ -104,13 +104,13 @@ mod tests {
     use coresimd::x86::*;
     use coresimd::x86_64::*;
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_bextr_u64() {
         let r = _bextr_u64(0b0101_0000u64, 4, 4);
         assert_eq!(r, 0b0000_0101u64);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_andn_u64() {
         assert_eq!(_andn_u64(0, 0), 0);
         assert_eq!(_andn_u64(0, 1), 1);
@@ -133,25 +133,25 @@ mod tests {
         assert_eq!(r, 0b0001_1101u64);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_blsi_u64() {
         assert_eq!(_blsi_u64(0b1101_0000u64), 0b0001_0000u64);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_blsmsk_u64() {
         let r = _blsmsk_u64(0b0011_0000u64);
         assert_eq!(r, 0b0001_1111u64);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_blsr_u64() {
         // TODO: test the behavior when the input is 0
         let r = _blsr_u64(0b0011_0000u64);
         assert_eq!(r, 0b0010_0000u64);
     }
 
-    #[simd_test = "bmi"]
+    #[simd_test = "bmi1"]
     unsafe fn test_tzcnt_u64() {
         assert_eq!(_tzcnt_u64(0b0000_0001u64), 0u64);
         assert_eq!(_tzcnt_u64(0b0000_0000u64), 64u64);

diff --git a/crates/coresimd/tests/cpu-detection.rs b/crates/coresimd/tests/cpu-detection.rs
@@ -34,7 +34,7 @@ fn x86_all() {
     );
     println!("fma: {:?}", is_target_feature_detected!("fma"));
     println!("abm: {:?}", is_target_feature_detected!("abm"));
-    println!("bmi: {:?}", is_target_feature_detected!("bmi"));
+    println!("bmi: {:?}", is_target_feature_detected!("bmi1"));
     println!("bmi2: {:?}", is_target_feature_detected!("bmi2"));
     println!("tbm: {:?}", is_target_feature_detected!("tbm"));
     println!("popcnt: {:?}", is_target_feature_detected!("popcnt"));

diff --git a/crates/stdsimd-verify/tests/x86-intel.rs b/crates/stdsimd-verify/tests/x86-intel.rs
@@ -249,14 +249,6 @@ fn matches(rust: &Function, intel: &Intrinsic) -> Result<(), String> {
             .flat_map(|c| c.to_lowercase())
             .collect::<String>();
 
-        // Normalize `bmi1` to `bmi` as apparently that's what we're
-        // calling it.
-        let cpuid = if cpuid == "bmi1" {
-            String::from("bmi")
-        } else {
-            cpuid
-        };
-
         let rust_feature = rust.target_feature
             .expect(&format!("no target feature listed for {}", rust.name));
         if rust_feature.contains(&cpuid) {

diff --git a/crates/stdsimd/tests/cpu-detection.rs b/crates/stdsimd/tests/cpu-detection.rs
@@ -59,7 +59,7 @@ fn x86_all() {
     );
     println!("fma: {:?}", is_target_feature_detected!("fma"));
     println!("abm: {:?}", is_target_feature_detected!("abm"));
-    println!("bmi: {:?}", is_target_feature_detected!("bmi"));
+    println!("bmi: {:?}", is_target_feature_detected!("bmi1"));
     println!("bmi2: {:?}", is_target_feature_detected!("bmi2"));
     println!("tbm: {:?}", is_target_feature_detected!("tbm"));
     println!("popcnt: {:?}", is_target_feature_detected!("popcnt"));

diff --git a/stdsimd/arch/detect/x86.rs b/stdsimd/arch/detect/x86.rs
@@ -125,7 +125,7 @@ macro_rules! is_target_feature_detected {
         $crate::arch::detect::check_for(
             $crate::arch::detect::Feature::fma)
     };
-    ("bmi") => {
+    ("bmi1") => {
         $crate::arch::detect::check_for(
             $crate::arch::detect::Feature::bmi)
     };
@@ -504,7 +504,7 @@ mod tests {
         );
         println!("fma: {:?}", is_target_feature_detected!("fma"));
         println!("abm: {:?}", is_target_feature_detected!("abm"));
-        println!("bmi: {:?}", is_target_feature_detected!("bmi"));
+        println!("bmi: {:?}", is_target_feature_detected!("bmi1"));
         println!("bmi2: {:?}", is_target_feature_detected!("bmi2"));
         println!("tbm: {:?}", is_target_feature_detected!("tbm"));
         println!("popcnt: {:?}", is_target_feature_detected!("popcnt"));
@@ -553,7 +553,7 @@ mod tests {
             information.avx512_vpopcntdq()
         );
         assert_eq!(is_target_feature_detected!("fma"), information.fma());
-        assert_eq!(is_target_feature_detected!("bmi"), information.bmi1());
+        assert_eq!(is_target_feature_detected!("bmi1"), information.bmi1());
         assert_eq!(is_target_feature_detected!("bmi2"), information.bmi2());
         assert_eq!(is_target_feature_detected!("popcnt"), information.popcnt());
         assert_eq!(is_target_feature_detected!("abm"), information.lzcnt());