Verilisp is a collection of common lisp macros which spit out verilog HDL code, effectively turning common lisp into a prettier frontend to verilog.
Original Code is in google code, but it seems it's no longer maintained.
Detecting syntax errors is missing because of just a translator not a compiler. Execution also depends on an exit simulator e.g. iverilog.
n= operator is introduced for non blocking assignment to avoid conflict with less than or equal operator in original verilisp. Now you can use '<=#' lisp function for non blocking assignment with transport-delay.
<= is a less than operator not assignment operator. Also you can use '%<=' or '=<' as less than or equal operator, but it's experimental.