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There are three different CPU implementations. The SMP one I think is not really stable (gets more unstable when the numbers of core increase)
Is the FastCPU actually unsafe? i.e. is there a scenario where it fails? (a certain browser environment for example). If so, would it be possible to detect that failure and switch to the safe cpu?
My feeling so far: the FastCPU is stable and safe.
The text was updated successfully, but these errors were encountered:
Yes, the SMP one is not really stable yet. I don't know why, but have some ideas to find the error.
The slow CPU is the reference, in which the CPU is implemented like in the specification. I don't care about speed.
The fast CPU is optimized for the code it executes.
flags are never used and therefore omitted
timing might not be exact (Check for an interrupt for example)
use my own implementation of the MMU
use of hardware TLB refill. (This is the biggest change, because it needs a kernel patch)
So let's say, as long as you don't program anything in assembler or change significant parts in the kernel code, you will never see an error.
I should rename the file, that it is clear, that this is the reference CPU.
There are three different CPU implementations. The SMP one I think is not really stable (gets more unstable when the numbers of core increase)
Is the FastCPU actually unsafe? i.e. is there a scenario where it fails? (a certain browser environment for example). If so, would it be possible to detect that failure and switch to the safe cpu?
My feeling so far: the FastCPU is stable and safe.
The text was updated successfully, but these errors were encountered: