forked from LineageOS/android_kernel_samsung_gta4xl
/
decon_core.c
4291 lines (3649 loc) · 116 KB
/
decon_core.c
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/*
* Copyright (c) 2016 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Core file for Samsung EXYNOS DECON driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/pm_runtime.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/fb.h>
#include <linux/delay.h>
#include <linux/clk-provider.h>
#include <linux/console.h>
#include <linux/dma-buf.h>
#if defined(CONFIG_SUPPORT_LEGACY_ION)
#include <linux/exynos_ion.h>
#include <linux/ion.h>
#include <linux/exynos_iovmm.h>
#else
#include <linux/ion_exynos.h>
#endif
#if defined(CONFIG_SUPPORT_KERNEL_4_9)
#include <linux/sched.h>
#else
#include <linux/sched/types.h>
#endif
#include <linux/highmem.h>
#include <linux/memblock.h>
#include <linux/bug.h>
#include <linux/of_address.h>
#include <linux/debugfs.h>
#include <linux/pinctrl/consumer.h>
#include <video/mipi_display.h>
#include <media/v4l2-subdev.h>
#if defined(CONFIG_CAL_IF)
#include <soc/samsung/cal-if.h>
#endif
#if defined(CONFIG_SOC_EXYNOS9610)
#include <dt-bindings/clock/exynos9610.h>
#endif
#include "decon.h"
#include "dsim.h"
#include "decon_notify.h"
#include "./panels/lcd_ctrl.h"
#include "../../../../dma-buf/sync_debug.h"
#include "dpp.h"
#if defined(CONFIG_EXYNOS_DISPLAYPORT)
#include "displayport.h"
#endif
int decon_log_level = 6;
module_param(decon_log_level, int, 0644);
int dpu_bts_log_level = 6;
module_param(dpu_bts_log_level, int, 0644);
int win_update_log_level = 6;
module_param(win_update_log_level, int, 0644);
int dpu_mres_log_level = 6;
module_param(dpu_mres_log_level, int, 0644);
int decon_systrace_enable;
void decon_wait_for_vstatus(struct decon_device *decon, u32 timeout);
struct decon_device *decon_drvdata[MAX_DECON_CNT];
EXPORT_SYMBOL(decon_drvdata);
static char *decon_state_names[] = {
"INIT",
"ON",
"DOZE",
"HIBER",
"DOZE_SUSPEND",
"OFF",
"TUI",
};
void tracing_mark_write(struct decon_device *decon, char id, char *str1, int value)
{
char buf[DECON_TRACE_BUF_SIZE] = {0,};
if (!decon->systrace.pid)
return;
switch (id) {
case 'B': /* B : Begin */
snprintf(buf, DECON_TRACE_BUF_SIZE, "B|%d|%s",
decon->systrace.pid, str1);
break;
case 'E': /* E : End */
strcpy(buf, "E");
break;
case 'C': /* C : Category */
snprintf(buf, DECON_TRACE_BUF_SIZE,
"C|%d|%s|%d", decon->systrace.pid, str1, value);
break;
default:
decon_err("%s:argument fail\n", __func__);
return;
}
trace_puts(buf);
}
static void decon_dump_using_dpp(struct decon_device *decon)
{
int i;
for (i = 0; i < decon->dt.dpp_cnt; i++) {
if (test_bit(i, &decon->prev_used_dpp)) {
struct v4l2_subdev *sd = NULL;
sd = decon->dpp_sd[i];
BUG_ON(!sd);
v4l2_subdev_call(sd, core, ioctl, DPP_DUMP, NULL);
}
}
}
static void decon_up_list_saved(void)
{
int i;
struct decon_device *decon;
int decon_cnt;
decon_cnt = get_decon_drvdata(0)->dt.decon_cnt;
for (i = 0; i < decon_cnt; i++) {
decon = get_decon_drvdata(i);
if (decon) {
if (!list_empty(&decon->up.list) || !list_empty(&decon->up.saved_list)) {
decon->up_list_saved = true;
#if defined(CONFIG_SUPPORT_LEGACY_FENCE)
decon_info("\n=== DECON%d TIMELINE %d MAX %d ===\n",
decon->id, decon->timeline->value,
decon->timeline_max);
#else
decon_info("\n=== DECON%d TIMELINE %d ===\n",
decon->id, atomic_read(&decon->fence.timeline));
#endif
} else {
decon->up_list_saved = false;
}
}
}
}
void decon_dump(struct decon_device *decon)
{
int acquired = console_trylock();
void __iomem *base_regs = get_decon_drvdata(0)->res.regs;
if (IS_DECON_OFF_STATE(decon)) {
decon_info("%s: DECON%d is disabled, state(%d)\n",
__func__, decon->id, decon->state);
return;
}
__decon_dump(decon->id, decon->res.regs, base_regs,
decon->lcd_info->dsc_enabled);
if (decon->dt.out_type == DECON_OUT_DSI)
v4l2_subdev_call(decon->out_sd[0], core, ioctl,
DSIM_IOC_DUMP, NULL);
decon_dump_using_dpp(decon);
if (acquired)
console_unlock();
}
/* ---------- CHECK FUNCTIONS ----------- */
static void decon_win_config_to_regs_param
(int transp_length, struct decon_win_config *win_config,
struct decon_window_regs *win_regs, enum decon_idma_type idma_type,
int idx)
{
u8 alpha0 = 0, alpha1 = 0;
win_regs->wincon = wincon(transp_length, alpha0, alpha1,
win_config->plane_alpha, win_config->blending, idx);
win_regs->start_pos = win_start_pos(win_config->dst.x, win_config->dst.y);
win_regs->end_pos = win_end_pos(win_config->dst.x, win_config->dst.y,
win_config->dst.w, win_config->dst.h);
win_regs->pixel_count = (win_config->dst.w * win_config->dst.h);
win_regs->whole_w = win_config->dst.f_w;
win_regs->whole_h = win_config->dst.f_h;
win_regs->offset_x = win_config->dst.x;
win_regs->offset_y = win_config->dst.y;
win_regs->type = idma_type;
win_regs->plane_alpha = win_config->plane_alpha;
win_regs->format = win_config->format;
win_regs->blend = win_config->blending;
decon_dbg("DMATYPE_%d@ SRC:(%d,%d) %dx%d DST:(%d,%d) %dx%d\n",
idma_type,
win_config->src.x, win_config->src.y,
win_config->src.f_w, win_config->src.f_h,
win_config->dst.x, win_config->dst.y,
win_config->dst.w, win_config->dst.h);
}
u32 wincon(u32 transp_len, u32 a0, u32 a1,
int plane_alpha, enum decon_blending blending, int idx)
{
u32 data = 0;
data |= WIN_EN_F(idx);
return data;
}
bool decon_validate_x_alignment(struct decon_device *decon, int x, u32 w,
u32 bits_per_pixel)
{
uint8_t pixel_alignment = 32 / bits_per_pixel;
if (x % pixel_alignment) {
decon_err("left x not aligned to %u-pixel(bpp = %u, x = %u)\n",
pixel_alignment, bits_per_pixel, x);
return 0;
}
if ((x + w) % pixel_alignment) {
decon_err("right X not aligned to %u-pixel(bpp = %u, x = %u, w = %u)\n",
pixel_alignment, bits_per_pixel, x, w);
return 0;
}
return 1;
}
void decon_dpp_stop(struct decon_device *decon, bool do_reset)
{
int i;
bool rst = false;
struct v4l2_subdev *sd;
for (i = 0; i < decon->dt.dpp_cnt; i++) {
if (test_bit(i, &decon->prev_used_dpp) &&
!test_bit(i, &decon->cur_using_dpp)) {
sd = decon->dpp_sd[i];
BUG_ON(!sd);
if (test_bit(i, &decon->dpp_err_stat) || do_reset)
rst = true;
v4l2_subdev_call(sd, core, ioctl, DPP_STOP, (bool *)rst);
clear_bit(i, &decon->prev_used_dpp);
clear_bit(i, &decon->dpp_err_stat);
}
}
}
static void decon_free_unused_buf(struct decon_device *decon,
struct decon_reg_data *regs, int win, int plane)
{
struct decon_dma_buf_data *dma = ®s->dma_buf_data[win][plane];
decon_info("%s, win[%d]plane[%d]\n", __func__, win, plane);
if (dma->attachment && dma->dma_addr)
ion_iovmm_unmap(dma->attachment, dma->dma_addr);
if (dma->attachment && dma->sg_table)
dma_buf_unmap_attachment(dma->attachment,
dma->sg_table, DMA_TO_DEVICE);
if (dma->dma_buf && dma->attachment)
dma_buf_detach(dma->dma_buf, dma->attachment);
if (dma->dma_buf)
dma_buf_put(dma->dma_buf);
memset(dma, 0, sizeof(struct decon_dma_buf_data));
}
static void decon_free_dma_buf(struct decon_device *decon,
struct decon_dma_buf_data *dma)
{
if (!dma->dma_addr)
return;
if (dma->fence) {
#if defined(CONFIG_SUPPORT_LEGACY_FENCE)
fput(dma->fence->file);
#else
dma_fence_put(dma->fence);
dma->fence = NULL;
#endif
}
ion_iovmm_unmap(dma->attachment, dma->dma_addr);
dma_buf_unmap_attachment(dma->attachment, dma->sg_table,
DMA_TO_DEVICE);
dma_buf_detach(dma->dma_buf, dma->attachment);
dma_buf_put(dma->dma_buf);
#if defined(CONFIG_SUPPORT_LEGACY_ION)
ion_free(decon->ion_client, dma->ion_handle);
#endif
memset(dma, 0, sizeof(struct decon_dma_buf_data));
}
static void decon_set_black_window(struct decon_device *decon)
{
struct decon_window_regs win_regs;
struct decon_lcd *lcd = decon->lcd_info;
memset(&win_regs, 0, sizeof(struct decon_window_regs));
win_regs.wincon = wincon(0x8, 0xFF, 0xFF, 0xFF, DECON_BLENDING_NONE,
decon->dt.dft_win);
win_regs.start_pos = win_start_pos(0, 0);
win_regs.end_pos = win_end_pos(0, 0, lcd->xres, lcd->yres);
decon_info("xres %d yres %d win_start_pos %x win_end_pos %x\n",
lcd->xres, lcd->yres, win_regs.start_pos,
win_regs.end_pos);
win_regs.colormap = 0x000000;
win_regs.pixel_count = lcd->xres * lcd->yres;
win_regs.whole_w = lcd->xres;
win_regs.whole_h = lcd->yres;
win_regs.offset_x = 0;
win_regs.offset_y = 0;
decon_info("pixel_count(%d), whole_w(%d), whole_h(%d), x(%d), y(%d)\n",
win_regs.pixel_count, win_regs.whole_w,
win_regs.whole_h, win_regs.offset_x,
win_regs.offset_y);
decon_reg_set_window_control(decon->id, decon->dt.dft_win,
&win_regs, true);
decon_reg_all_win_shadow_update_req(decon->id);
}
int decon_tui_protection(bool tui_en)
{
int ret = 0;
int win_idx;
int i = 0;
struct decon_mode_info psr;
struct decon_device *decon = decon_drvdata[0];
unsigned long aclk_khz = 0;
decon_info("%s:state %d: out_type %d:+\n", __func__,
tui_en, decon->dt.out_type);
mutex_lock(&decon->lock);
if (decon->state == DECON_STATE_OFF) {
decon_warn("%s: decon is already disabled(tui=%d)\n", __func__, tui_en);
mutex_unlock(&decon->lock);
return -EBUSY;
}
mutex_unlock(&decon->lock);
if (tui_en) {
/* 1.Blocking LPD */
mutex_lock(&decon->lock);
decon_hiber_block_exit(decon);
/* 2.Finish frmame update of normal OS */
kthread_flush_worker(&decon->up.worker);
if (decon->dt.psr_mode == DECON_VIDEO_MODE) {
struct decon_window_regs win_regs = {0, };
struct decon_lcd *lcd = decon->lcd_info;
/* 3.Disable all the windows except max window */
for (i = 0; i < decon->dt.max_win; i++) {
/* Make the decon registers a reset value for each window
* win_regs.wincon = 0;
* win_regs->type = IDMA_VG0;
* global data and winamp are not set,
* if win_en is 0 (wincon = 0)
*/
win_regs.type = IDMA_VG0;
decon_reg_set_window_control(decon->id, i, &win_regs, 0);
}
/* CH MAP TEST
* decon->dt.dft_win = 3;
* decon->dt.dft_idma = IDMA_G0;
*/
/* 4.Set the window white */
win_regs.wincon = wincon(0x8, 0xFF, 0xFF, 0xFF, DECON_BLENDING_NONE,
decon->dt.dft_win);
win_regs.start_pos = win_start_pos(0, 0);
win_regs.end_pos = win_end_pos(0, 0, lcd->xres, lcd->yres);
decon_info("xres %d yres %d win_start_pos %x win_end_pos %x\n",
lcd->xres, lcd->yres, win_regs.start_pos,
win_regs.end_pos);
win_regs.colormap = 0xffffff;/* 0xffffff is white color */
win_regs.pixel_count = lcd->xres * lcd->yres;
win_regs.whole_w = lcd->xres;
win_regs.whole_h = lcd->yres;
win_regs.offset_x = 0;
win_regs.offset_y = 0;
win_regs.type = decon->dt.dft_idma;
decon_info("pixel_count(%d), whole_w(%d), whole_h(%d), x(%d), y(%d)\n",
win_regs.pixel_count, win_regs.whole_w,
win_regs.whole_h, win_regs.offset_x,
win_regs.offset_y);
decon_reg_set_window_control(decon->id, decon->dt.dft_win,
&win_regs, true);
decon_reg_all_win_shadow_update_req(decon->id);
/* 5.decon start */
decon_to_psr_info(decon, &psr);
decon_reg_start(decon->id, &psr);
/* 6.wait vstatus and shadow update */
decon_wait_for_vstatus(decon, 50);
if (decon_reg_wait_update_done_and_mask(decon->id, &psr, SHADOW_UPDATE_TIMEOUT) > 0) {
decon_dump(decon);
BUG();
}
decon->cur_using_dpp = 0;
decon_dpp_stop(decon, false);
} else {
dpu_set_win_update_config(decon, NULL);
decon_to_psr_info(decon, &psr);
decon_reg_stop(decon->id, decon->dt.out_idx[0], &psr, false,
decon->lcd_info->fps);
decon->cur_using_dpp = 0;
decon_dpp_stop(decon, false);
/* after stopping decon, we can now update registers
* without considering per frame condition (8895) */
for (win_idx = 0; win_idx < decon->dt.max_win; win_idx++)
decon_reg_set_win_enable(decon->id, win_idx, false);
decon_reg_all_win_shadow_update_req(decon->id);
decon_reg_update_req_global(decon->id);
decon_wait_for_vsync(decon, VSYNC_TIMEOUT_MSEC);
}
decon->state = DECON_STATE_TUI;
aclk_khz = v4l2_subdev_call(decon->out_sd[0], core, ioctl,
EXYNOS_DPU_GET_ACLK, NULL) / 1000U;
decon_info("%s:DPU_ACLK(%ld khz)\n", __func__, aclk_khz);
#if defined(CONFIG_EXYNOS_BTS)
decon_info("MIF(%lu), INT(%lu), DISP(%lu), total bw(%u, %u)\n",
cal_dfs_get_rate(ACPM_DVFS_MIF),
cal_dfs_get_rate(ACPM_DVFS_INT),
cal_dfs_get_rate(ACPM_DVFS_DISP),
decon->bts.prev_total_bw,
decon->bts.total_bw);
#endif
mutex_unlock(&decon->lock);
} else {
mutex_lock(&decon->lock);
aclk_khz = v4l2_subdev_call(decon->out_sd[0], core, ioctl,
EXYNOS_DPU_GET_ACLK, NULL) / 1000U;
decon_info("%s:DPU_ACLK(%ld khz)\n", __func__, aclk_khz);
#if defined(CONFIG_EXYNOS_BTS)
decon_info("MIF(%lu), INT(%lu), DISP(%lu), total bw(%u, %u)\n",
cal_dfs_get_rate(ACPM_DVFS_MIF),
cal_dfs_get_rate(ACPM_DVFS_INT),
cal_dfs_get_rate(ACPM_DVFS_DISP),
decon->bts.prev_total_bw,
decon->bts.total_bw);
#endif
decon->state = DECON_STATE_ON;
decon_hiber_unblock(decon);
mutex_unlock(&decon->lock);
}
decon_info("%s:state %d: out_type %d:-\n", __func__,
tui_en, decon->dt.out_type);
return ret;
}
int decon_set_out_sd_state(struct decon_device *decon, enum decon_state state)
{
int i, ret = 0;
int num_dsi = (decon->dt.dsi_mode == DSI_MODE_DUAL_DSI) ? 2 : 1;
enum decon_state prev_state = decon->state;
for (i = 0; i < num_dsi; i++) {
decon_dbg("decon-%d state:%s -> %s, set dsi-%d\n", decon->id,
decon_state_names[prev_state],
decon_state_names[state], i);
if (state == DECON_STATE_OFF) {
ret = v4l2_subdev_call(decon->out_sd[i], video, s_stream, 0);
if (ret) {
decon_err("stopping stream failed for %s\n",
decon->out_sd[i]->name);
goto err;
}
} else if (state == DECON_STATE_DOZE) {
ret = v4l2_subdev_call(decon->out_sd[i], core, ioctl,
DSIM_IOC_DOZE, NULL);
if (ret < 0) {
decon_err("decon-%d failed to set %s (ret %d)\n",
decon->id,
decon_state_names[state], ret);
goto err;
}
} else if (state == DECON_STATE_ON) {
if (prev_state == DECON_STATE_HIBER) {
ret = v4l2_subdev_call(decon->out_sd[i], core, ioctl,
DSIM_IOC_ENTER_ULPS, (unsigned long *)0);
if (ret) {
decon_warn("starting(ulps) stream failed for %s\n",
decon->out_sd[i]->name);
goto err;
}
} else {
ret = v4l2_subdev_call(decon->out_sd[i], video, s_stream, 1);
if (ret) {
decon_err("starting stream failed for %s\n",
decon->out_sd[i]->name);
goto err;
}
}
} else if (state == DECON_STATE_DOZE_SUSPEND) {
ret = v4l2_subdev_call(decon->out_sd[i], core, ioctl,
DSIM_IOC_DOZE_SUSPEND, NULL);
if (ret < 0) {
decon_err("decon-%d failed to set %s (ret %d)\n",
decon->id,
decon_state_names[state], ret);
goto err;
}
} else if (state == DECON_STATE_HIBER) {
ret = v4l2_subdev_call(decon->out_sd[i], core, ioctl,
DSIM_IOC_ENTER_ULPS, (unsigned long *)1);
if (ret) {
decon_warn("stopping(ulps) stream failed for %s\n",
decon->out_sd[i]->name);
goto err;
}
}
}
err:
return ret;
}
/* ---------- FB_BLANK INTERFACE ----------- */
static int _decon_enable(struct decon_device *decon, enum decon_state state)
{
struct decon_mode_info psr;
struct decon_param p;
int ret = 0;
if (IS_DECON_ON_STATE(decon)) {
decon_warn("%s decon-%d already on(%s) state\n", __func__,
decon->id, decon_state_names[decon->state]);
ret = decon_set_out_sd_state(decon, state);
if (ret < 0) {
decon_err("%s decon-%d failed to set subdev %s state\n",
__func__, decon->id, decon_state_names[state]);
return ret;
}
decon->state = state;
return 0;
}
pm_stay_awake(decon->dev);
dev_warn(decon->dev, "pm_stay_awake");
#if defined(CONFIG_EXYNOS_BTS)
decon->bts.ops->bts_acquire_bw(decon);
#endif
if (decon->dt.psr_mode != DECON_VIDEO_MODE) {
if (decon->res.pinctrl && decon->res.hw_te_on) {
if (pinctrl_select_state(decon->res.pinctrl,
decon->res.hw_te_on)) {
decon_err("failed to turn on Decon_TE\n");
}
}
}
ret = decon_set_out_sd_state(decon, state);
if (ret < 0) {
decon_err("%s decon-%d failed to set subdev %s state\n",
__func__, decon->id, decon_state_names[state]);
goto err;
}
decon_to_init_param(decon, &p);
decon_reg_init(decon->id, decon->dt.out_idx[0], &p);
decon_to_psr_info(decon, &psr);
#if 0
if ((decon->dt.out_type == DECON_OUT_DSI) && (state != DECON_STATE_DOZE)) {
if (psr.trig_mode == DECON_HW_TRIG) {
decon_set_black_window(decon);
/*
* Blender configuration must be set before DECON start.
* If DECON goes to start without window and
* blender configuration,
* DECON will go into abnormal state.
* DECON2(for DISPLAYPORT) start in winconfig
*/
decon_reg_start(decon->id, &psr);
}
}
/*
* After turned on LCD, previous update region must be set as FULL size.
* DECON, DSIM and Panel are initialized as FULL size during UNBLANK
*/
DPU_FULL_RECT(&decon->win_up.prev_up_region, decon->lcd_info);
#else
if (decon->dt.out_type == DECON_OUT_DSI && decon->state == DECON_STATE_OFF) {
decon_set_black_window(decon);
decon_reg_start(decon->id, &psr);
decon_reg_wait_update_done_timeout(decon->id, SHADOW_UPDATE_TIMEOUT);
/*
* After turned on LCD, previous update region must be set as FULL size.
* DECON, DSIM and Panel are initialized as FULL size during UNBLANK
*/
DPU_FULL_RECT(&decon->win_up.prev_up_region, decon->lcd_info);
}
#endif
if (!decon->id && !decon->eint_status) {
enable_irq(decon->res.irq);
decon->eint_status = 1;
}
decon->state = state;
decon_reg_set_int(decon->id, &psr, 1);
err:
return ret;
}
static int decon_enable(struct decon_device *decon)
{
int ret = 0;
enum decon_state prev_state = decon->state;
enum decon_state next_state = DECON_STATE_ON;
mutex_lock(&decon->lock);
if (decon->state == next_state) {
decon_warn("decon-%d %s already %s state\n", decon->id,
__func__, decon_state_names[decon->state]);
goto out;
}
kthread_flush_worker(&decon->up.worker);
DPU_EVENT_LOG(DPU_EVT_UNBLANK, &decon->sd, ktime_set(0, 0));
decon_info("decon-%d %s +\n", decon->id, __func__);
ret = _decon_enable(decon, next_state);
if (ret < 0) {
decon_err("decon-%d failed to set %s (ret %d)\n",
decon->id, decon_state_names[next_state], ret);
goto out;
}
decon_info("decon-%d %s - (state:%s -> %s)\n", decon->id, __func__,
decon_state_names[prev_state],
decon_state_names[decon->state]);
out:
mutex_unlock(&decon->lock);
return ret;
};
static int decon_doze(struct decon_device *decon)
{
int ret = 0;
enum decon_state prev_state = decon->state;
enum decon_state next_state = DECON_STATE_DOZE;
mutex_lock(&decon->lock);
if (decon->state == next_state) {
decon_warn("decon-%d %s already %s state\n", decon->id,
__func__, decon_state_names[decon->state]);
goto out;
}
DPU_EVENT_LOG(DPU_EVT_DOZE, &decon->sd, ktime_set(0, 0));
decon_info("decon-%d %s +\n", decon->id, __func__);
ret = _decon_enable(decon, next_state);
if (ret < 0) {
decon_err("decon-%d failed to set %s (ret %d)\n",
decon->id, decon_state_names[next_state], ret);
goto out;
}
decon_info("decon-%d %s - (state:%s -> %s)\n", decon->id, __func__,
decon_state_names[prev_state],
decon_state_names[decon->state]);
out:
mutex_unlock(&decon->lock);
return ret;
}
int cmu_dpu_dump(void)
{
void __iomem *cmu_regs;
void __iomem *pmu_regs;
decon_info("\n=== CMU_DPU0 SFR DUMP 0x12800100 ===\n");
cmu_regs = ioremap(0x12800100, 0x10);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x0C, false);
decon_info("\n=== CMU_DPU0 SFR DUMP 0x12800800 ===\n");
cmu_regs = ioremap(0x12800800, 0x08);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x04, false);
cmu_regs = ioremap(0x12800810, 0x10);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x08, false);
decon_info("\n=== CMUdd_DPU0 SFR DUMP 0x12801800 ===\n");
cmu_regs = ioremap(0x12801808, 0x08);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x04, false);
decon_info("\n=== CMU_DPU0 SFR DUMP 0x12802000 ===\n");
cmu_regs = ioremap(0x12802000, 0x74);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x70, false);
cmu_regs = ioremap(0x1280207c, 0x100);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x94, false);
decon_info("\n=== CMU_DPU0 SFR DUMP 0x12803000 ===\n");
cmu_regs = ioremap(0x12803004, 0x10);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x0c, false);
cmu_regs = ioremap(0x12803014, 0x2C);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x28, false);
cmu_regs = ioremap(0x1280304c, 0x20);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
cmu_regs, 0x18, false);
decon_info("\n=== PMU_DPU0 SFR DUMP 0x16484064 ===\n");
pmu_regs = ioremap(0x16484064, 0x08);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
pmu_regs, 0x04, false);
decon_info("\n=== PMU_DPU1 SFR DUMP 0x16484084 ===\n");
pmu_regs = ioremap(0x16484084, 0x08);
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4,
pmu_regs, 0x04, false);
return 0;
}
static int _decon_disable(struct decon_device *decon, enum decon_state state)
{
struct decon_mode_info psr;
int ret = 0;
if (decon->state == DECON_STATE_TUI)
decon_tui_protection(false);
if (IS_DECON_OFF_STATE(decon)) {
decon_warn("%s decon-%d already off (%s)\n", __func__,
decon->id, decon_state_names[decon->state]);
ret = decon_set_out_sd_state(decon, state);
if (ret < 0) {
decon_err("%s decon-%d failed to set subdev %s state\n",
__func__, decon->id,
decon_state_names[state]);
return ret;
}
decon->state = state;
return 0;
}
kthread_flush_worker(&decon->up.worker);
decon_to_psr_info(decon, &psr);
decon_reg_set_int(decon->id, &psr, 0);
if (!decon->id && (decon->vsync.irq_refcount <= 0) &&
decon->eint_status) {
disable_irq(decon->res.irq);
decon->eint_status = 0;
}
if (decon->dt.out_type == DECON_OUT_DSI && decon->dt.psr_mode == DECON_VIDEO_MODE) {
struct dsim_device *dsim;
dsim = v4l2_get_subdevdata(decon->out_sd[0]);
call_panel_ops(dsim, suspend, dsim);
}
ret = decon_reg_stop(decon->id, decon->dt.out_idx[0], &psr, true,
decon->lcd_info->fps);
if (ret < 0)
decon_dump(decon);
/* DMA protection disable must be happen on dpp domain is alive */
#if defined(CONFIG_EXYNOS_CONTENT_PATH_PROTECTION)
decon_set_protected_content(decon, NULL);
#endif
decon->cur_using_dpp = 0;
decon_dpp_stop(decon, false);
#if defined(CONFIG_EXYNOS_BTS)
decon->bts.ops->bts_release_bw(decon);
#endif
ret = decon_set_out_sd_state(decon, state);
if (ret < 0) {
decon_err("%s decon-%d failed to set subdev %s state\n",
__func__, decon->id, decon_state_names[state]);
goto err;
}
pm_relax(decon->dev);
dev_warn(decon->dev, "pm_relax");
if (decon->dt.psr_mode != DECON_VIDEO_MODE) {
if (decon->res.pinctrl && decon->res.hw_te_off) {
if (pinctrl_select_state(decon->res.pinctrl,
decon->res.hw_te_off)) {
decon_err("failed to turn off Decon_TE\n");
}
}
}
decon->state = state;
#if defined(CONFIG_EXYNOS_PD)
if (decon->pm_domain) {
if (dpu_pm_domain_check_status(decon->pm_domain)) {
decon_info("decon%d %s still on\n", decon->id,
decon->dt.pd_name);
/* TODO : saimple dma/decon logging in cal code */
} else
decon_info("decon%d %s off\n", decon->id,
decon->dt.pd_name);
}
#endif
err:
return ret;
}
static int decon_disable(struct decon_device *decon)
{
int ret = 0;
enum decon_state prev_state = decon->state;
enum decon_state next_state = DECON_STATE_OFF;
mutex_lock(&decon->lock);
if (decon->state == next_state) {
decon_warn("decon-%d %s already %s state\n", decon->id,
__func__, decon_state_names[decon->state]);
goto out;
}
DPU_EVENT_LOG(DPU_EVT_BLANK, &decon->sd, ktime_set(0, 0));
decon_info("decon-%d %s +\n", decon->id, __func__);
ret = _decon_disable(decon, next_state);
if (ret < 0) {
decon_err("decon-%d failed to set %s (ret %d)\n",
decon->id, decon_state_names[next_state], ret);
goto out;
}
decon_info("decon-%d %s - (state:%s -> %s)\n", decon->id, __func__,
decon_state_names[prev_state],
decon_state_names[decon->state]);
out:
mutex_unlock(&decon->lock);
return ret;
}
static int decon_doze_suspend(struct decon_device *decon)
{
int ret = 0;
enum decon_state prev_state = decon->state;
enum decon_state next_state = DECON_STATE_DOZE_SUSPEND;
mutex_lock(&decon->lock);
if (decon->state == next_state) {
decon_warn("decon-%d %s already %s state\n", decon->id,
__func__, decon_state_names[decon->state]);
goto out;
}
DPU_EVENT_LOG(DPU_EVT_DOZE_SUSPEND, &decon->sd, ktime_set(0, 0));
decon_info("decon-%d %s +\n", decon->id, __func__);
ret = _decon_disable(decon, next_state);
if (ret < 0) {
decon_err("decon-%d failed to set %s (ret %d)\n",
decon->id, decon_state_names[next_state], ret);
goto out;
}
decon_info("decon-%d %s - (state:%s -> %s)\n", decon->id, __func__,
decon_state_names[prev_state],
decon_state_names[decon->state]);
out:
mutex_unlock(&decon->lock);
return ret;
}
struct disp_pwr_state decon_pwr_state[] = {
[DISP_PWR_OFF] = {
.state = DECON_STATE_OFF,
.set_pwr_state = (set_pwr_state_t)decon_disable,
},
[DISP_PWR_DOZE] = {
.state = DECON_STATE_DOZE,
.set_pwr_state = (set_pwr_state_t)decon_doze,
},
[DISP_PWR_NORMAL] = {
.state = DECON_STATE_ON,
.set_pwr_state = (set_pwr_state_t)decon_enable,
},
[DISP_PWR_DOZE_SUSPEND] = {
.state = DECON_STATE_DOZE_SUSPEND,
.set_pwr_state = (set_pwr_state_t)decon_doze_suspend,
},
};
int decon_update_pwr_state(struct decon_device *decon, u32 mode)
{
int ret = 0;
if (mode >= DISP_PWR_MAX) {
decon_err("DECON:ERR:%s:invalid mode : %d\n", __func__, mode);
return -EINVAL;
}
if (decon_pwr_state[mode].state == decon->state) {
decon_warn("decon-%d already %s state\n",
decon->id, decon_state_names[decon->state]);
return 0;
}
if (IS_DECON_OFF_STATE(decon)) {
if (mode == DISP_PWR_OFF) {
ret = decon_enable(decon);
if (ret < 0) {
decon_err("DECON:ERR:%s: failed to set mode(%d)\n",
__func__, DISP_PWR_NORMAL);
return -EIO;
}
} else if (mode == DISP_PWR_DOZE_SUSPEND) {
ret = decon_doze(decon);
if (ret < 0) {
decon_err("DECON:ERR:%s: failed to set mode(%d)\n",
__func__, DISP_PWR_DOZE);
return -EIO;
}
}
}
ret = decon_pwr_state[mode].set_pwr_state((void *)decon);
if (ret < 0) {
decon_err("DECON:ERR:%s: failed to set mode(%d)\n",
__func__, mode);
return ret;
}
return 0;
}
static int decon_dp_disable(struct decon_device *decon)
{
struct decon_mode_info psr;
int ret = 0;
decon_info("disable decon displayport\n");
mutex_lock(&decon->lock);
if (IS_DECON_OFF_STATE(decon)) {
decon_info("decon%d already disabled\n", decon->id);
goto err;
}
kthread_flush_worker(&decon->up.worker);
decon_to_psr_info(decon, &psr);
decon_reg_set_int(decon->id, &psr, 0);
ret = decon_reg_stop(decon->id, decon->dt.out_idx[0], &psr, true,
decon->lcd_info->fps);
if (ret < 0)
decon_dump(decon);
/* DMA protection disable must be happen on dpp domain is alive */
if (decon->dt.out_type != DECON_OUT_WB) {
#if defined(CONFIG_EXYNOS_CONTENT_PATH_PROTECTION)
decon_set_protected_content(decon, NULL);
#endif
decon->cur_using_dpp = 0;
decon_dpp_stop(decon, false);
}
#if defined(CONFIG_EXYNOS_BTS)
decon->bts.ops->bts_release_bw(decon);
#endif