Makefiles in dsl-sample are updatd

PyHDI · Jun 9, 2015 · 865e594 · 865e594
1 parent dd9b88c
commit 865e594
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/Makefile b/Makefile
@@ -23,7 +23,7 @@ view:
 clean:
 	make clean -C ./pycoram
 	make clean -C ./sample
-	make clean -C ./lib-sample
+	make clean -C ./dsl-sample
 	rm -rf *.pyc __pycache__ pycoram.egg-info build dist
 
 .PHONY: release

diff --git a/dsl-sample/test/nologic/Makefile b/dsl-sample/test/nologic/Makefile
@@ -1,4 +1,4 @@
 SCRIPT=build.py
 TOPMODULE=userlogic
 ROOTDIR=../../../
-include $(ROOTDIR)/lib-sample/base.mk
+include $(ROOTDIR)/dsl-sample/base.mk
diff --git a/dsl-sample/test/single_memory/Makefile b/dsl-sample/test/single_memory/Makefile
@@ -1,4 +1,4 @@
 SCRIPT=build.py
 TOPMODULE=userlogic
 ROOTDIR=../../../
-include $(ROOTDIR)/lib-sample/base.mk
+include $(ROOTDIR)/dsl-sample/base.mk