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miiLib.c
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miiLib.c
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/* miiLib.c - Media Independent Interface library */
/* Copyright 1989-2004 Wind River Systems, Inc. */
#include "copyright_wrs.h"
/*
modification history
--------------------
01w,06nov08,wap Change delay counter index from 16 bit to 32 bit variable
(WIND00115919)
01v,31aug04,mdo Documentation fixes for apigen
01u,22apr04,kp corrected argument names for the macro MII_FROM_ANSR_TO_ANAR
01t,22apr04,kp teamF1, used the macro MII_SR_SPEED_SEL_MASK instead of
the macro MII_SR_ABIL_MASK for speed mask.
01s,10oct03,mcm Fixed syntax for string spanning multiple lines
01r,06aug03,slk modify to support phyFlags MII_PHY_ISO_UNAVAIL SPR# 90115
01q,13jan03,jln fix time looping logic (SPR# 85574)
01p,13may02,rcs set the phyAddr before calling pPhyOptRegsRtn also created
miiPhyOptFuncMultiSet() to facilitate multiple types of devices
spr# 76711
01o,14jun01,rcs protected calls to new PHY_INFO fields with test for
MII_PHY_GMII_TYPE (SPR# 68502)
01n,23feb01,jln add basic GMII support for 1000T auto-negotiation capability,
restored call to miiLibInit (). (SPR# 68502)
01m,12dec00,rcs removed global variables miiValue and miiFunc[]
01l,12dec00,rcs fix coding error (SPR# 62972)
01k,25oct00,ham doc: cleanup for vxWorks AE 1.0.
01j,19sep00,rcs in miiBasicCheck() changed MII_SYS_DELAY argument
and ix increment to sysClkRateGet(). (SPR# 33991)
01i,10jun00,dat restored funcBindP.h
01h,06may00,jgn SPR 31705, fixed wdog use, fixed link status change monitoring,
added more debug messages
01g,05jan00,stv removed private/funcBindP.h (SPR# 29875).
01f,23nov99,cn removed call to miiLibInit (), to make miiLib a component
(SPR #29542).
01e,28oct99,cn added miiLibInit (), miiLibUnInit (), miiPhyUnInit (),
miiPhyBusScan (), miiPhyMonitorStart (), miiPhyMonitor ().
Also updated documentation.
01d,28sep99,cn changed miiProbe to better detect PHYs.
01c,13sep99,cn fixed SPR# 28305. Also added show routines.
01b,16jun99,cn implemented changes after code review.
01a,16mar99,cn written from motFecEnd.c, 01c.
*/
/*
DESCRIPTION
This module implements a Media Independent Interface (MII) library.
The MII is an inexpensive and easy-to-implement interconnection between
the Carrier Sense Multiple Access with Collision Detection (CSMA/CD)
media access controllers and the Physical Layer Entities (PHYs).
The purpose of this library is to provide Ethernet drivers in VxWorks
with a standardized, MII-compliant, easy-to-use interface to various PHYs.
In other words, using the services of this library, network drivers
will be able to scan the existing PHYs, run diagnostics, electrically
isolate a subset of them, negotiate their technology abilities with other
link-partners on the network, and ultimately initialize and configure a
specific PHY in a proper, MII-compliant fashion.
In order to initialize and configure a PHY, its MII management interface
has to be used. This is made up of two lines: management data clock (MDC)
and management data input/output (MDIO). The former provides the timing
reference for transfer of information on the MDIO signal. The latter is
used to transfer control and status information between the PHY and the
MAC controller. For this transfer to be successful, the information itself
has to be encoded into a frame format, and both the MDIO and MDC signals have
to comply with certain requirements as described in the 802.3u IEEE Standard.
Since no assumption can be made as to the specific MAC-to-MII
interface, this library expects the driver's writer to provide it with
specialized read and write routines to access that interface. See EXTERNAL
SUPPORT REQUIREMENTS below.
miiPhyUnInit (), miiLibInit (), miiLibUnInit (), miiPhyOptFuncSet ().
STATUS miiLibInit (void);
STATUS miiLibUnInit (void);
EXTERNAL SUPPORT REQUIREMENTS
\is
\i phyReadRtn
\cs
STATUS phyReadRtn (DRV_CTRL * pDrvCtrl, UINT8 phyAddr,
UINT8 phyReg, UINT16 * value);
\ce
This routine is expected to perform any driver-specific functions required
to read a 16-bit word from the <phyReg> register of the MII-compliant PHY
whose address is specified by <phyAddr>. Reading is performed through the
MII management interface.
\i phyWriteRtn
\cs
STATUS phyWriteRtn (DRV_CTRL * pDrvCtrl, UINT8 phyAddr,
UINT8 phyReg, UINT16 value);
\ce
This routine is expected to perform any driver-specific functions required
to write a 16-bit word to the <phyReg> register of the MII-compliant PHY
whose address is specified by <phyAddr>. Writing is performed through the
MII management interface.
\i phyDelayRtn
\cs
STATUS phyDelayRtn (UINT32 phyDelayParm);
\ce
This routine is expected to cause a limited delay to the calling task,
no matter whether this is an active delay, or an inactive one.
miiPhyInit () calls this routine on several occasions throughout
the code with <phyDelayParm> as parameter. This represents the granularity
of the delay itself, whereas the field <phyMaxDelay> in PHY_INFO is the
maximum allowed delay, in <phyDelayParm> units. The minimum elapsed time
(<phyMaxDelay> * <phyDelayParm>) must be 5 seconds.
The user should be aware that some of these events may take as long as
2-3 seconds to be completed, and he should therefore tune this routine
and the parameter <phyMaxDelay> accordingly.
If the related field <phyDelayRtn> in the PHY_INFO structure is initialized
to NULL, no delay is performed.
\i phyLinkDownRtn
\cs
STATUS phyLinkDownRtn (DRV_CTRL *);
\ce
This routine is expected to take any action necessary to re-initialize the
media interface, including possibly stopping and restarting the driver itself.
It is called when a link down event is detected for any active PHY, with the
pointer to the relevant driver control structure as only parameter.
\ie
To use this feature, include the following component:
INCLUDE_MIILIB
SEE ALSO:
\tb IEEE 802.3.2000 Standard
\INTERNAL
This library contains conditional compilation switch MII_DBG.
If defined, adds debug output routines. Output is further
selectable at run-time via the miiDbg global variable.
*/
#include "vxWorks.h"
#include "errnoLib.h"
#include "stdio.h"
#include "stdlib.h"
#include "iosLib.h"
#include "net/mbuf.h"
#include "logLib.h"
#include "netLib.h"
#include "end.h"
#include "sysLib.h"
#include "taskLib.h"
#include "wdLib.h"
#include "lstLib.h"
#include "miiLib.h"
#include "private/funcBindP.h" /* for logMsg */
/* defines */
/* Driver debug control */
#define MII_DBG
/* Driver debug control */
#ifdef MII_DBG
#define MII_DBG_ANY 0xffff
UINT32 miiDbg = 0x0;
PHY_INFO * phyInfoDbg = NULL;
/*#define MII_LOG(FLG, X0, X1, X2, X3, X4, X5, X6) \
do { \
if ((miiDbg & FLG) && (_func_logMsg != NULL)) \
_func_logMsg ((X0), (int)(X1), (int)(X2),(int)(X3), \
(int)(X4),(int)(X5),(int)(X6)); \
} while (0)*/
#define MII_LOG(FLG, X0, X1, X2, X3, X4, X5, X6) \
_func_logMsg ((X0), (int)(X1), (int)(X2),(int)(X3), \
(int)(X4),(int)(X5),(int)(X6)); \
#else /* MII_DBG */
#define MII_LOG(FLG, X0, X1, X2, X3, X4, X5, X6)
#endif /* MII_DBG */
#define MII_PHY_CHECK_CABLE \
do { \
if (_func_logMsg != NULL) \
_func_logMsg ("miiPhyInit check cable connection \n", \
0, 0, 0, 0, 0, 0); \
} while (0)
/*
* the table below is used to translate user settings
* into MII-standard values for the control register.
*/
LOCAL UINT16 miiDefLookupTbl [] = {
MII_CR_NORM_EN,
MII_CR_FDX,
MII_CR_100,
(MII_CR_100 | MII_CR_FDX),
MII_CR_100,
MII_CR_RESTART | MII_CR_AUTO_EN
};
/*
* Macro to prepare PHY capabilities
* phyAds = <speed caps> | <flow ctrl caps> | < supported IEE std>
*/
#define MII_FROM_ANSR_TO_ANAR(phyStat, phyAds); \
{ \
(phyStat) &= MII_SR_SPEED_SEL_MASK; \
(phyStat) >>= 6; \
(phyAds) = (phyStat) | ((phyAds) & (0x7000)) | \
((phyAds) & (MII_ADS_SEL_MASK)); \
}
#define MII_SEM_TAKE(tmout) \
semTake (miiMutex, (int) (tmout))
#define MII_SEM_GIVE() \
semGive (miiMutex)
/* globals */
/* locals */
LOCAL SEM_ID miiMutex; /* mutex semaphore */
LOCAL LIST miiList; /* all PHYs in the system */
LOCAL BOOL miiLibInitialized = FALSE; /* have we been initialized? */
LOCAL WDOG_ID miiWd = NULL; /* monitor watchdog ID */
LOCAL FUNCPTR pPhyOptRegsRtn = NULL;
/* forward function declarations */
LOCAL STATUS miiDiag (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiPhyIsolate (PHY_INFO * pPhyInfo, UINT8 isoPhyAddr);
LOCAL STATUS miiPhyPwrDown (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiPhyBestModeSet (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiPhyDefModeSet (PHY_INFO * pPhyInfo);
LOCAL STATUS miiAutoNegotiate (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiAutoNegStart (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiModeForce (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiDefForce (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiPhyUpdate (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiFlagsHandle (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiProbe (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiAbilFlagSet (PHY_INFO * pPhyInfo, UINT8 phyAddr);
LOCAL STATUS miiPhyMonitor (void);
LOCAL STATUS miiPhyListAdd (PHY_INFO * pPhyInfo);
LOCAL STATUS miiPhyBusScan (PHY_INFO * pPhyInfo);
LOCAL STATUS miiPhyLinkSet (PHY_INFO * pPhyInfo);
LOCAL STATUS miiPhyMonitorStart (void);
/**************************************************************************
*
* miiPhyInit - initialize and configure the PHY devices
*
* This routine scans, initializes and configures the PHY device described
* in <phyInfo>. Space for <phyInfo> is to be provided by the calling
* task.
*
* This routine is called from the driver's Start routine to
* perform media initialization and configuration. To access the PHY
* device through the MII-management interface, it uses the read and
* write routines which are provided by the driver itself
* in the fields phyReadRtn(), phyWriteRtn() of the phyInfo structure.
* Before it attempts to use this routine, the driver has to properly
* initialize some of the fields in the <phyInfo> structure, and optionally
* fill in others, as below:
* \cs
*
* /@ fill in mandatory fields in phyInfo @/
*
* pDrvCtrl->phyInfo->pDrvCtrl = (void *) pDrvCtrl;
* pDrvCtrl->phyInfo->phyWriteRtn = (FUNCPTR) xxxMiiWrite;
* pDrvCtrl->phyInfo->phyReadRtn = (FUNCPTR) xxxMiiRead;
*
* /@ fill in some optional fields in phyInfo @/
*
* pDrvCtrl->phyInfo->phyFlags = 0;
* pDrvCtrl->phyInfo->phyAddr = (UINT8) MII_PHY_DEF_ADDR;
* pDrvCtrl->phyInfo->phyDefMode = (UINT8) PHY_10BASE_T;
* pDrvCtrl->phyInfo->phyAnOrderTbl = (MII_AN_ORDER_TBL *)
* &xxxPhyAnOrderTbl;
*
* /@
* @ fill in some more optional fields in phyInfo: the delay stuff
* @ we want this routine to use our xxxDelay () routine, with
* @ the constant one as an argument, and the max delay we may
* @ tolerate is the constant MII_PHY_DEF_DELAY, in xxxDelay units
* @/
*
* pDrvCtrl->phyInfo->phyDelayRtn = (FUNCPTR) xxxDelay;
* pDrvCtrl->phyInfo->phyMaxDelay = MII_PHY_DEF_DELAY;
* pDrvCtrl->phyInfo->phyDelayParm = 1;
*
* /@
* @ fill in some more optional fields in phyInfo: the PHY's callback
* @ to handle "link down" events. This routine is invoked whenever
* @ the link status in the PHY being used is detected to be low.
* @/
*
* pDrvCtrl->phyInfo->phyStatChngRtn = (FUNCPTR) xxxRestart;
*
* \ce
*
* Some of the above fields may be overwritten by this routine, since
* for instance, the logical address of the PHY actually used may differ
* from the user's initial setting. Likewise, the specific PHY being
* initialized, may not support all the technology abilities the user
* has allowed for its operations.
*
* This routine first scans for all possible PHY addresses in the range 0-31,
* checking for an MII-compliant PHY, and attempts at running some diagnostics
* on it. If none is found, ERROR is returned.
*
* Typically PHYs are scanned from address 0, but if the user specifies
* an alternative start PHY address via the parameter phyAddr in the
* phyInfo structure, PHYs are scanned in order starting
* with the specified PHY address. In addition, if the flag <MII_ALL_BUS_SCAN>
* is set, this routine will scan the whole bus even if a valid PHY has
* already been found, and stores bus topology information. If the flags
* <MII_PHY_ISO>, <MII_PHY_PWR_DOWN> are set, all of the PHYs found but the
* first will be respectively electrically isolated from the MII interface
* and/or put in low-power mode. These two flags are meaningless in a
* configuration where only one PHY is present.
*
* The phyAddr parameter is very important from a performance point of view.
* Since the MII management interface, through which the PHY is configured,
* is a very slow one, providing an incorrect or invalid address in this
* field may result in a particularly long boot process.
*
* If the flag <MII_ALL_BUS_SCAN> is not set, this routine will
* assume that the first PHY found is the only one.
*
* This routine then attempts to bring the link up.
* This routine offers two strategies to select a PHY and establish a
* valid link. The default strategy is to use the standard 802.3 style
* auto-negotiation, where both link partners negotiate all their
* technology abilities at the same time, and the highest common
* denominator ability is chosen. Before the auto-negotiation
* is started, the next-page exchange mechanism is disabled.
*
* If GMII interface is used, users can specify it through userFlags --
* <MII_PHY_GMII_TYPE>.
*
* The user can prevent the PHY from negotiating certain abilities via
* userFlags -- <MII_PHY_FD>, <MII_PHY_100>, <MII_PHY_HD>, and <MII_PHY_10>.
* as well as <MII_PHY_1000T_HD> and <MII_PHY_1000T_FD> if GMII is used.
* When <MII_PHY_FD> is not specified, full duplex will not be
* negotiated; when <MII_PHY_HD> is not specified half duplex
* will not be negotiated, when <MII_PHY_100> is not specified,
* 100Mbps ability will not be negotiated; when <MII_PHY_10> is not
* specified, 10Mbps ability will not be negotiated.
* Also, if GMII is used, when <MII_PHY_1000T_HD> is not specified,
* 1000T with half duplex mode will not be negotiated. Same thing
* applied to 1000T with full duplex mode via <MII_PHY_1000T_FD>.
*
* Flow control ability can also be negotiated via user flags --
* <MII_PHY_TX_FLOW_CTRL> and <MII_PHY_RX_FLOW_CTRL>. For symmetric
* PAUSE ability (MII), user can set/clean both flags together. For
* asymmetric PAUSE ability (GMII), user can separate transmit and receive
* flow control ability. However, user should be aware that flow control
* ability is meaningful only if full duplex mode is used.
*
* When <MII_PHY_TBL> is set in the user flags, the BSP specific
* table whose address may be provided in the <phyAnOrderTbl>
* field of the <phyInfo> structure, is used to obtain the list, and
* the order of technology abilities to be negotiated.
* The entries in this table are ordered such that entry 0 is the
* highest priority, entry 1 in next and so on. Entries in this table
* may be repeated, and multiple technology abilities can
* be OR'd to create a single entry. If a PHY cannot support a
* ability in an entry, that entry is ignored.
*
* If no PHY provides a valid link, and if <MII_PHY_DEF_SET> is set in the
* phyFlags field of the PHY_INFO structure, the first PHY that supports
* the default abilities defined in the <phyDefMode> of the phyInfo structure
* will be selected, regardless of the link status.
*
* In addition, this routine adds an entry in a linked list of PHY devices
* for each active PHY it found. If the flag <MII_PHY_MONITOR> is set, the
* link status for the relevant PHY is continually monitored for a link down
* event. If such event is detected, and if the <phyLinkDownRtn> in the PHY_INFO * structure is a valid function pointer, then the routine it points at is
* executed in the context of the netTask (). The parameter MII_MONITOR_DELAY
* may be used to define the period in seconds with which the link status is
* checked. Its default value is 5.
*
* RETURNS: OK or ERROR if the PHY could not be initialized,
*
*/
STATUS miiPhyInit
(
PHY_INFO * pPhyInfo /* pointer to PHY_INFO structure */
)
{
int retVal; /* convenient holder for return value */
/* sanity checks */
if (pPhyInfo == NULL ||
(pPhyInfo->phyReadRtn == NULL) ||
(pPhyInfo->phyWriteRtn == NULL) ||
(pPhyInfo->pDrvCtrl == NULL))
{
MII_LOG (MII_DBG_ANY, ("miiPhyInit... missing params \n"),
0, 0, 0, 0, 0, 0);
return (ERROR);
}
/* Ensure that pPhyInfo->phyMaxDelay is minimum 5 seconds */
if (pPhyInfo->phyDelayRtn == (FUNCPTR) taskDelay)
if (pPhyInfo->phyMaxDelay < (sysClkRateGet() * 5) / pPhyInfo->phyDelayParm)
{
/* Set max delay proportionally */
pPhyInfo->phyMaxDelay = ((sysClkRateGet() * 5) / pPhyInfo->phyDelayParm) + 1;
}
/* initialize the MII library */
if (miiLibInit () == ERROR)
return (ERROR);
#ifdef MII_DBG
phyInfoDbg = pPhyInfo;
#endif /* MII_DBG */
/* scan the whole bus */
if (miiPhyBusScan (pPhyInfo) == ERROR)
return (ERROR);
/* set the mode for a PHY, return in case of success or fatal error */
retVal = miiPhyLinkSet (pPhyInfo);
if (retVal == OK)
return (OK);
if (errno != S_miiLib_PHY_LINK_DOWN)
return (ERROR);
/* if we're here, none of the PHYs could be initialized */
MII_PHY_CHECK_CABLE;
if (!(MII_PHY_FLAGS_ARE_SET (MII_PHY_DEF_SET)))
return (ERROR);
/* set the default mode for a PHY, do not check the link */
return (miiPhyDefModeSet (pPhyInfo));
}
/**************************************************************************
*
* miiPhyUnInit - uninitialize a PHY
*
* This routine uninitializes the PHY specified in <pPhyInfo>. It brings it
* in low-power mode, and electrically isolate it from the MII management
* interface to which it is attached. In addition, it frees resources
* previously allocated.
*
* RETURNS: OK, ERROR in case of fatal errors.
*
*/
STATUS miiPhyUnInit
(
PHY_INFO * pPhyInfo /* pointer to PHY_INFO structure */
)
{
if (pPhyInfo == NULL)
return (ERROR);
MII_LOG (MII_DBG_ANY, ("miiPhyUnInit \n"),
0, 0, 0, 0, 0, 0);
/* this counts also for isolate */
if (miiProbe (pPhyInfo, pPhyInfo->phyAddr) == ERROR)
return (ERROR);
if (miiPhyPwrDown (pPhyInfo, pPhyInfo->phyAddr) == ERROR)
return (ERROR);
MII_PHY_FLAGS_CLEAR (MII_PHY_INIT);
/* protect it from other MII routines */
MII_SEM_TAKE (WAIT_FOREVER);
lstDelete (&miiList, (NODE *) pPhyInfo->pMiiPhyNode);
/* we're done, release the mutex */
MII_SEM_GIVE ();
/* free memory */
free ((char *) pPhyInfo->pMiiPhyNode);
free ((char *) pPhyInfo->miiPhyPresent);
pPhyInfo->pMiiPhyNode = NULL;
/* stop the monitor if necessary */
if (miiList.count == 0)
return (wdCancel (miiWd));
return (OK);
}
/**************************************************************************
*
* miiProbe - probe the PHY device
*
* This routine probes the PHY device by reading its control register.
* It also checks the PHY can be successfully electrically isolated from its
* MII interface.
*
* RETURNS: OK, ERROR in case of fatal errors.
*
* ERRNO: S_miiLib_PHY_NULL
*
*/
LOCAL STATUS miiProbe
(
PHY_INFO * pPhyInfo, /* pointer to PHY_INFO structure */
UINT8 phyAddr /* the PHY being read */
)
{
UINT8 regAddr; /* the PHY's register being read */
UINT16 data; /* data to be written to the PHY's reg */
int retVal; /* convenient holder for return value */
MII_LOG (MII_DBG_ANY, "miiProbe for addr %#x starts\n",phyAddr,0,0,0,0,0);
regAddr = MII_CTRL_REG;
MII_READ (phyAddr, regAddr, &data, retVal);
if (retVal == ERROR)
return (ERROR);
/* check the reserved bits, and the ability to isolate the PHY */
MII_LOG (MII_DBG_ANY, "miiProbe checking addr %#x\n",phyAddr,0,0,0,0,0);
if (((data & MII_CR_RES_MASK) > 0x0) ||
((miiPhyIsolate (pPhyInfo, phyAddr) != OK)))
{
errnoSet (S_miiLib_PHY_NULL);
return (ERROR);
}
MII_LOG (MII_DBG_ANY, ("miiProbe... ends\n"),
0, 0, 0, 0, 0, 0);
return (OK);
}
/*******************************************************************************
*
* miiDiag - run some diagnostics
*
* This routine runs some diagnostics on the PHY whose address is
* specified in the parameter <phyAddr>.
*
* RETURNS: OK or ERROR.
*/
LOCAL STATUS miiDiag
(
PHY_INFO * pPhyInfo, /* pointer to PHY_INFO structure */
UINT8 phyAddr /* address of a PHY */
)
{
UINT16 data; /* data to be written to the control reg */
UINT8 regAddr; /* PHY register */
UINT32 ix = 0; /* a counter */
int retVal; /* convenient holder for return value */
/* reset the PHY */
regAddr = MII_CTRL_REG;
data = MII_CR_RESET;
MII_WRITE (phyAddr, regAddr, data, retVal);
if (retVal != OK)
return (ERROR);
while (ix++ < pPhyInfo->phyMaxDelay)
{
MII_SYS_DELAY (pPhyInfo->phyDelayParm);
MII_READ (phyAddr, regAddr, &data, retVal);
if (retVal == ERROR)
return (ERROR);
if (!(data & MII_CR_RESET))
break;
}
if (ix >= pPhyInfo->phyMaxDelay)
{
MII_LOG (MII_DBG_ANY, ("miiDiag reset fail\n"),
0, 0, 0, 0, 0, 0);
return (ERROR);
}
/* re-enable the chip */
data = MII_CR_NORM_EN;
MII_WRITE (phyAddr, regAddr, data, retVal);
if (retVal != OK)
{
MII_LOG (MII_DBG_ANY, ("miiDiag write fail\n"),
0, 0, 0, 0, 0, 0);
return (ERROR);
}
/* check isolate bit is deasserted */
ix = 0;
while (ix++ < pPhyInfo->phyMaxDelay)
{
MII_SYS_DELAY (pPhyInfo->phyDelayParm);
MII_READ (phyAddr, regAddr, &data, retVal);
if (retVal != OK)
{
MII_LOG (MII_DBG_ANY, ("miiDiag read fail\n"),
0, 0, 0, 0, 0, 0);
return (ERROR);
}
if (!(data & MII_CR_ISOLATE))
break;
}
if (ix >= pPhyInfo->phyMaxDelay)
{
MII_LOG (MII_DBG_ANY, ("miiDiag de-isolate fail\n"),
0, 0, 0, 0, 0, 0);
return (ERROR);
}
MII_LOG (MII_DBG_ANY, ("miiDiag... ends\n"),
0, 0, 0, 0, 0, 0);
return (OK);
}
/*******************************************************************************
*
* miiPhyIsolate - isolate the PHY device
*
* This routine isolates the PHY device whose address is specified in
* the parameter <isoPhyAddr>.
*
* RETURNS: OK or ERROR.
*/
LOCAL STATUS miiPhyIsolate
(
PHY_INFO * pPhyInfo, /* pointer to PHY_INFO structure */
UINT8 isoPhyAddr /* address of a PHY to be isolated */
)
{
UINT8 regAddr; /* PHY register */
UINT32 ix = 0; /* a counter */
UINT16 data; /* data to be written to the control reg */
int retVal; /* convenient holder for return value */
/* if isolate feature of Phy is not supported, just return */
if (isoPhyAddr == MII_PHY_NULL ||
(pPhyInfo->phyFlags & MII_PHY_ISO_UNAVAIL))
return (OK);
data = MII_CR_ISOLATE;
regAddr = MII_CTRL_REG;
MII_WRITE (isoPhyAddr, regAddr, data, retVal);
if (retVal != OK)
return (ERROR);
/* check isolate bit is asserted */
while (ix++ < pPhyInfo->phyMaxDelay)
{
MII_SYS_DELAY (pPhyInfo->phyDelayParm);
MII_READ (isoPhyAddr, regAddr, &data, retVal);
if (retVal != OK)
return (ERROR);
if ((data & MII_CR_ISOLATE))
break;
}
if (ix >= pPhyInfo->phyMaxDelay)
{
MII_LOG (MII_DBG_ANY, ("miiPhyIsolate fail\n"),
0, 0, 0, 0, 0, 0);
return (ERROR);
}
MII_LOG (MII_DBG_ANY, ("miiPhyIsolate... ends\n"),
0, 0, 0, 0, 0, 0);
return (OK);
}
/*******************************************************************************
*
* miiPhyPwrDown - put the PHY in power down mode
*
* This routine puts the PHY specified in <phyAddr> in power down mode.
*
* RETURNS: OK or ERROR.
*/
LOCAL STATUS miiPhyPwrDown
(
PHY_INFO * pPhyInfo, /* pointer to PHY_INFO structure */
UINT8 phyAddr /* phy to be put in power down mode */
)
{
int retVal; /* convenient holder for return value */
UINT8 regAddr; /* PHY register */
UINT16 data; /* data to be written to the control reg */
if (phyAddr == MII_PHY_NULL)
return (OK);
data = MII_CR_POWER_DOWN;
regAddr = MII_CTRL_REG;
MII_WRITE (phyAddr, regAddr, data, retVal);
return (retVal);
}
/*******************************************************************************
*
* miiPhyBusScan - scan the MII bus
*
* This routine scans the MII bus, in the search for an MII-compliant PHY.
* If it succeeds, and if the flag MII_ALL_BUS_SCAN is not set, it returns
* OK. Otherwise, it keeps scanning the bus and storing relevant information
* in the miiPhyPresent field of the structure referenced to by <pPhyInfo>.
* Other PHYs than the first one found, will be put in
* low-power mode and electrically isolated from the MII interface.
*
* SEE ALSO: miiAutoNegotiate (), miiModeForce ().
*
* RETURNS: OK or ERROR.
*
*/
LOCAL STATUS miiPhyBusScan
(
PHY_INFO * pPhyInfo /* pointer to PHY_INFO structure */
)
{
UINT16 ix; /* a counter */
int retVal; /* holder for return value */
UINT8 phyAddr; /* address of a PHY */
if ((pPhyInfo->miiPhyPresent = (MII_PHY_BUS *)
calloc (1, sizeof (MII_PHY_BUS)))
== NULL)
return (ERROR);
/*
* there may be as many as 32 PHYs, with distinct logical addresses
* Start with the one the user suggested and, in case of failure in
* probing the device, scan the whole range.
*/
for (ix = 0; ix < MII_MAX_PHY_NUM; ix++)
{
phyAddr = (ix + pPhyInfo->phyAddr) % MII_MAX_PHY_NUM;
MII_LOG (MII_DBG_ANY,
("miiPhyBusScan trying phyAddr=0x%x phyInfo=0x%x \n"),
phyAddr, pPhyInfo, 0, 0, 0, 0);
/* check the PHY is there */
retVal = miiProbe (pPhyInfo, phyAddr);
/* deal with the error condition if possible */
if (retVal == ERROR)
{
if (errno != S_miiLib_PHY_NULL)
return (ERROR);
else
{
if (ix == (MII_MAX_PHY_NUM - 1))
return (ERROR);
/* no PHY was found with this address: keep scanning */
MII_LOG (MII_DBG_ANY, "No PHY at address %#x\n", phyAddr,
0,0,0,0,0);
errno = 0;
continue;
}
}
else
{
/* run some diagnostics */
if (miiDiag (pPhyInfo, phyAddr) != OK)
{
MII_LOG (MII_DBG_ANY, "miiDiag failed for addr %#x\n",
phyAddr,0,0,0,0,0);
return (ERROR);
}
/* record this information */
* ((BOOL *) pPhyInfo->miiPhyPresent + phyAddr) = TRUE;
/* should we scan the whole bus? */
if (!(MII_PHY_FLAGS_ARE_SET (MII_ALL_BUS_SCAN)))
{
MII_LOG (MII_DBG_ANY, "Not scanning whole bus\n", 0,0,0,0,0,0);
return (OK);
}
MII_LOG (MII_DBG_ANY, ("miiPhyBusScan phyAddr=0x%x \n"),
phyAddr, 0, 0, 0, 0, 0);
}
}
/* set optional features for the other PHYs */
for (ix = 0; ix < MII_MAX_PHY_NUM; ix++)
{
/* check the PHY is there */
if (* ((BOOL *) pPhyInfo->miiPhyPresent + phyAddr) == TRUE)
{
/* set it in power down mode */
if (MII_PHY_FLAGS_ARE_SET (MII_PHY_PWR_DOWN))
{
MII_LOG (MII_DBG_ANY, "Powering down PHY %#x\n", ix,
0,0,0,0,0);
if (miiPhyPwrDown (pPhyInfo, ix) == ERROR)
return (ERROR);
}
/* electrically isolate it from the MII interface */
if (MII_PHY_FLAGS_ARE_SET (MII_PHY_ISO))
{
MII_LOG (MII_DBG_ANY, "miiPhyBusScan isolating phyAddr=0x%x\n",
ix, 0, 0, 0, 0, 0);
if (miiPhyIsolate (pPhyInfo, ix) == ERROR)
return (ERROR);
}
}
}
return (OK);
}
/*******************************************************************************
*
* miiPhyBestModeSet - set the best operating mode for a PHY
*
* This routine sets the best operating mode for a PHY looking at the
* parameters in <pPhyInfo>. It may call miiAutoNegotiate (), and/or
* miiModeForce (). Upon success, it stores the <phyAddr> in the relevant
* field of the structure pointed to by <pPhyInfo>.
*
* SEE ALSO: miiAutoNegotiate (), miiModeForce ().
*
* RETURNS: OK or ERROR.
*
*/
LOCAL STATUS miiPhyBestModeSet
(
PHY_INFO * pPhyInfo, /* pointer to PHY_INFO structure */
UINT8 phyAddr /* PHY's address */
)
{
/*
* start the auto-negotiation process,
* unless the user dictated the contrary.
*/
if (pPhyInfo->phyFlags & MII_PHY_AUTO)
if (miiAutoNegotiate (pPhyInfo, phyAddr) == OK)
{
if (pPhyInfo->phyFlags & MII_PHY_GMII_TYPE)
{
pPhyInfo->phyLinkMethod = MII_PHY_LINK_AUTO;
}
goto miiPhyOk;
}
/*
* the auto-negotiation process did not succeed
* in establishing a valid link: try to do it
* manually, enabling as many high priority abilities
* as possible.
*/
if (miiModeForce (pPhyInfo, phyAddr) == OK)
{
if (pPhyInfo->phyFlags & MII_PHY_GMII_TYPE)
{
pPhyInfo->phyLinkMethod = MII_PHY_LINK_FORCE;
}
goto miiPhyOk;
}
return (ERROR);
miiPhyOk:
/* store this PHY and return */
pPhyInfo->phyAddr = phyAddr;
MII_PHY_FLAGS_SET (MII_PHY_INIT);
return (OK);
}
/*******************************************************************************
*
* miiPhyLinkSet - set the link for a PHY
*
* This routine sets the link for the PHY pointed to by <pPhyInfo>. To do
* so, it calls miiPhyBestModeSet (). Upon success it returns OK.
* Otherwise, it checks whether other PHYs are on the bus, and attempts at
* establishing a link for them starting from the first and scanning the
* whole range. In case of failure, ERROR is returned.
*
* SEE ALSO: miiPhyBestModeSet ().
*
* RETURNS: OK or ERROR.
*
* ERRNO: S_miiLib_PHY_LINK_DOWN
*
*/
LOCAL STATUS miiPhyLinkSet
(
PHY_INFO * pPhyInfo /* pointer to PHY_INFO structure */
)
{
UINT16 ix; /* a counter */
UINT8 phyAddr; /* address of a PHY */
UINT32 phyFlags; /* default PHY's flags */
/* store the default phy's flags */
phyFlags = pPhyInfo->phyFlags;
for (ix = 0; ix < MII_MAX_PHY_NUM; ix++)
{
phyAddr = (ix + pPhyInfo->phyAddr) % MII_MAX_PHY_NUM;
MII_LOG (MII_DBG_ANY, ("miiPhyLinkSet phyAddr=0x%x \n"),
phyAddr, 0, 0, 0, 0, 0);
if (* ((BOOL *) pPhyInfo->miiPhyPresent + phyAddr) == FALSE)
continue;
/* add this PHY to the linked list */
if (miiPhyListAdd (pPhyInfo) == ERROR)
return (ERROR);
MII_LOG (MII_DBG_ANY, ("miiPhyLinkSet phyAddr=0x%x pres=0x%x \n"),
phyAddr,
(* ((BOOL *) pPhyInfo->miiPhyPresent + phyAddr)),
0, 0, 0, 0);
/* find out the PHY's abilities and set flags accordingly */