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digitalPinHasPWM broken for x61 #14

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SpenceKonde opened this issue Aug 16, 2015 · 0 comments

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SpenceKonde commented Aug 16, 2015

[quote author=SukkoPera date=1439591480 link=action=profile;u=127693]
Hey,

I think I've found a bug in the X61 core:

[code]#define digitalPinHasPWM(p) ((p) == 1 || (p) == 3 || (p) == 5)[/code]

Shouldn't that be:

[code]#define digitalPinHasPWM(p) ((p) == 4 || (p) == 6 || (p) == 8)[/code]

According to the chip summary?

[code]// +-/-+
// (D 9) PB0 1| |20 PA0 (D 0)
// *(D 8) PB1 2| |19 PA1 (D 1)
// (D 7) PB2 3| |18 PA2 (D 2) INT1
// *(D 6) PB3 4| |17 PA3 (D 14)
// VCC 5| |16 AGND
// GND 6| |15 AVCC
// (D 5) PB4 7| |14 PA4 (D 10)
// *(D 4) PB5 8| |13 PA5 (D 11)
// INT0 (D 3) PB6 9| |12 PA6 (D 12)
// (D 15) PB7 10| |11 PA7 (D 13)
// +----+[/code]
[/quote]

SpenceKonde closed this as completed in

dd7e8a6

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