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GPIOA Problem #5

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shaddow501 opened this issue Aug 23, 2017 · 3 comments
Closed

GPIOA Problem #5

shaddow501 opened this issue Aug 23, 2017 · 3 comments

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@shaddow501
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shaddow501 commented Aug 23, 2017

Dear Sir

Thanks for the lib.

It seems that the library (even when it set to - #define TFT_DATA_LOW_NIBBLE 1) does affect all GPIOA ports, I use PA14, PA15 to control relays and I see that with no action at all sometimes they change to HIGH mode and cannot be changed to LOW even when I run command digitalWrite(PA14,LOW) they do stay on high mode (I don’t have anything else in my code that address those pins but the relay switch code).
Also checked with GPIO PA10, PA11,PA12 and it has the same problem...

I think that something is wrong with this code:

#define write8(c) { uint32_t val = (((c^0x00FF)<<16) | c)<<TFT_DATA_SHIFT; \
                              dataRegs->BSRR = val; WR_STROBE; }

If I change the pins from PA to PB (pins) or PC (pins) everything works well.

I don’t know what to look in your library that can affect those pins…

This Is a part from the H file.

#define TFT_DATA_PORT GPIOA
// Port data bits D0..D7:
// enable only one from below lines corresponding to your HW setup:
#define TFT_DATA_LOW_NIBBLE 1 // take the lower 8 bits: 0..7
//#define TFT_DATA_HIGH_NIBBLE 1 // take the higher 8 bits: 8..15
//Control pins |RD |WR |RS |CS |RST|
#define TFT_CNTRL_PORT GPIOB
#define TFT_RD PB4
#define TFT_WR PB5
#define TFT_RS PB10
#define TFT_CS PB11
#define TFT_RST PB3 //PB0
#define TFT_RD_MASK BIT4 // digitalPinToBitMask(TFT_RD) //
#define TFT_WR_MASK BIT5 // digitalPinToBitMask(TFT_WR) //
#define TFT_RS_MASK BIT10 // digitalPinToBitMask(TFT_RS) //
#define TFT_CS_MASK BIT11 // digitalPinToBitMask(TFT_CS) //

#if 0
            // use old definition, standard bit toggling, low speed
            #define RD_ACTIVE    digitalWrite(TFT_RD, LOW)
            #define RD_IDLE      digitalWrite(TFT_RD, HIGH)
            #define WR_ACTIVE    digitalWrite(TFT_WR, LOW)
            #define WR_IDLE      digitalWrite(TFT_WR, HIGH)
            #define CD_COMMAND   digitalWrite(TFT_RS, LOW)
            #define CD_DATA      digitalWrite(TFT_RS, HIGH)
            #define CS_ACTIVE    digitalWrite(TFT_CS, LOW)
            #define CS_IDLE      digitalWrite(TFT_CS, HIGH)
            #define CS_ACTIVE_CD_COMMAND      { CS_ACTIVE; CD_COMMAND; }
#else
            // use fast bit toggling, very fast speed!

extern gpio_reg_map * cntrlRegs;
            #define RD_ACTIVE                  { cntrlRegs->BRR  = TFT_RD_MASK; }
            #define RD_IDLE                       { cntrlRegs->BSRR = TFT_RD_MASK; }
            #define WR_ACTIVE                 { cntrlRegs->BRR  = TFT_WR_MASK; }
            #define WR_IDLE                      { cntrlRegs->BSRR = TFT_WR_MASK; }
            #define CD_COMMAND          { cntrlRegs->BRR  = TFT_RS_MASK; }
            #define CD_DATA                    { cntrlRegs->BSRR = TFT_RS_MASK; }
            #define CS_ACTIVE                  { cntrlRegs->BRR  = TFT_CS_MASK; }
            #define CS_IDLE                      { cntrlRegs->BSRR = TFT_CS_MASK; }
            #define CS_ACTIVE_CD_COMMAND      { cntrlRegs->BRR  = (TFT_CS_MASK|TFT_RS_MASK); }

#endif

#define WR_STROBE { WR_ACTIVE; WR_IDLE; }
extern uint8_t read8_(void);
#define read8(x) ( x = read8_() )

extern gpio_reg_map * dataRegs;

#if defined(TFT_DATA_LOW_NIBBLE)

//#warning "Using lower data nibble..."
            // set the pins to input mode
            #define setReadDir() ( dataRegs->CRL = 0x88888888 )     // set the lower 8 bits as input
           // #define setReadDir() ( dataRegs->CRL = 0x44444444 ) // set the lower 8 bits as input floating
            // set the pins to output mode
            #define setWriteDir() ( dataRegs->CRL = 0x33333333 )    // set the lower 8 bits as output
            #define TFT_DATA_SHIFT 0

#elif defined(TFT_DATA_HIGH_NIBBLE)

#warning "Using high data nibble..."
            // set the pins to input mode
            #define setReadDir() ( dataRegs->CRH = 0x88888888 )    // set the upper 8 bits as input
            // set the pins to output mode
            #define setWriteDir() ( dataRegs->CRH = 0x33333333 )   // set the lower 8 bits as output
            #define TFT_DATA_SHIFT 8

#endif

// set pins to output the 8 bit value
#if 0 // slow write

#define write8(c) { Serial.print(" write8: "); Serial.print(c,HEX); Serial.write(','); \
                             digitalWrite(PA0, (c&BIT0)?HIGH:LOW); \
                             digitalWrite(PA1, (c&BIT1)?HIGH:LOW); \
                             digitalWrite(PA2, (c&BIT2)?HIGH:LOW); \
                             digitalWrite(PA3, (c&BIT3)?HIGH:LOW); \
                             digitalWrite(PA4, (c&BIT4)?HIGH:LOW); \
                             digitalWrite(PA5, (c&BIT5)?HIGH:LOW); \
                             digitalWrite(PA6, (c&BIT6)?HIGH:LOW); \
                             digitalWrite(PA7, (c&BIT7)?HIGH:LOW); \
                             WR_STROBE; }

#else

**_#define write8(c) { uint32_t val = (((c^0x00FF)<<16) | c)<<TFT_DATA_SHIFT; \
                             /*Serial.print(" write8: "); Serial.print(val,HEX); Serial.write(',');*/ \
                             dataRegs->BSRR = val; WR_STROBE; }_**

#endif
@stevstrong
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A lot of changes were done, so it may happen that your problem got fixed by now.
Could you please test it again?

@shaddow501
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shaddow501 commented Jan 24, 2018

Hi, I have fixed that issue about 5 months ago I corrected to this:
#define write8(c) { uint32_t val = ((((c^0x00FF)&0x00FF)<<16) | (c&0x00FF))<<TFT_DATA_SHIFT; \

Your code - #define write8(c) { uint32_t val = (((c^0x00FF)<<16) | c)<<TFT_DATA_SHIFT; \ takes 16 bit of the pins that is why PA10 to PA15 were occupied , I coudnt work with them since they always change.

the fix I made with help of a software engineer is to limit that part of the code to true 8 bit. (so I can use the other pins)
I have seen your last code and I am a bit disappointed that you even didnt check my issue and didnt fix it...
took you about 5 months to to respond...

@stevstrong
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I close this as it seems that has been fixed.

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