-
Notifications
You must be signed in to change notification settings - Fork 0
/
mtk_ts_cpu.c
2354 lines (1871 loc) · 61.1 KB
/
mtk_ts_cpu.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#define DEBUG 1
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
#include <linux/thermal.h>
#include <linux/platform_device.h>
#include <mt-plat/aee.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/proc_fs.h>
#include <linux/spinlock.h>
#include <mt-plat/sync_write.h>
#include "mt-plat/mtk_thermal_monitor.h"
#include <linux/seq_file.h>
#include <linux/slab.h>
#include "mtk_thermal_typedefs.h"
#include "mach/mt_thermal.h"
#if defined(CONFIG_MTK_CLKMGR)
#include <mach/mt_clkmgr.h>
#else
#include <linux/clk.h>
#endif
#include <mt_ptp.h>
/* #include <mach/mt_wtd.h> */
#include <mach/wd_api.h>
#include <mtk_gpu_utility.h>
#include <linux/time.h>
#include <tscpu_settings.h>
#ifdef CONFIG_OF
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>
#endif
#define __MT_MTK_TS_CPU_C__
#if MTK_TS_CPU_RT
#include <linux/sched.h>
#include <linux/kthread.h>
#endif
#if defined(CONFIG_ARCH_MT6755)
#include "mach/mt_ppm_api.h"
#else
#include "mt_cpufreq.h"
#endif
#include <linux/uidgid.h>
#include "mt_auxadc.h"
/*=============================================================
*Local variable definition
*=============================================================*/
static kuid_t uid = KUIDT_INIT(0);
static kgid_t gid = KGIDT_INIT(1000);
#if !defined(CONFIG_MTK_CLKMGR)
struct clk *therm_main; /* main clock for Thermal */
#if defined(CONFIG_ARCH_MT6755)
/*Patch to pause thermal controller and turn off auxadc GC.
For mt6755 only*/
struct clk *therm_auxadc;
#endif
#endif
void __iomem *therm_clk_infracfg_ao_base;
#ifdef CONFIG_OF
u32 thermal_irq_number = 0;
void __iomem *thermal_base;
void __iomem *auxadc_ts_base;
void __iomem *infracfg_ao_base;
#if defined(CONFIG_ARCH_MT6755)
void __iomem *th_apmixed_base;
#else
void __iomem *apmixed_base;
#endif
void __iomem *INFRACFG_AO_base;
int thermal_phy_base;
int auxadc_ts_phy_base;
int apmixed_phy_base;
int pericfg_phy_base;
#endif
static unsigned int interval = 1000; /* mseconds, 0 : no auto polling */
int tscpu_g_curr_temp = 0;
int tscpu_g_prev_temp = 0;
static int g_max_temp = 50000; /* default=50 deg */
#if defined(CONFIG_ARCH_MT6753)
/*For MT6753 PMIC 5A throttle patch*/
static int thermal5A_TH = 55000;
static int thermal5A_status;
#endif
static int tc_mid_trip = -275000;
/* trip_temp[0] must be initialized to the thermal HW protection point. */
#if !defined(CONFIG_ARCH_MT6755)
static int trip_temp[10] = { 117000, 100000, 85000, 75000, 65000, 55000, 45000, 35000, 25000, 15000 };
#else
static int trip_temp[10] = { 117000, 90000, 85000, 75000, 65000, 55000, 45000, 35000, 25000, 15000 };
#endif
int tscpu_read_curr_temp;
static bool talking_flag;
static int kernelmode;
static int g_THERMAL_TRIP[10] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
static int temperature_switch;
static int num_trip = 5;
static int tscpu_num_opp;
static struct mtk_cpu_power_info *mtk_cpu_power;
static int g_tc_resume; /* default=0,read temp */
static int MA_len_temp;
static int proc_write_flag;
static struct thermal_zone_device *thz_dev;
static char g_bind0[20] = "mtktscpu-sysrst";
#if !defined(CONFIG_ARCH_MT6755)
static char g_bind1[20] = "cpu02";
static char g_bind2[20] = "cpu15";
static char g_bind3[20] = "cpu22";
static char g_bind4[20] = "cpu28";
#else
static char g_bind1[20] = "cpu00";
static char g_bind2[20] = "cpu00";
static char g_bind3[20] = "cpu03";
static char g_bind4[20] = "cpu04";
#endif
static char g_bind5[20] = "";
static char g_bind6[20] = "";
static char g_bind7[20] = "";
static char g_bind8[20] = "";
static char g_bind9[20] = "";
struct mt_gpufreq_power_table_info *mtk_gpu_power = NULL;
#if 0
int Num_of_GPU_OPP = 1; /* Set this value =1 for non-DVS GPU */
#else /* DVFS GPU */
int Num_of_GPU_OPP = 0;
#endif
/*=============================================================
* Local function definition
*=============================================================*/
#if (CONFIG_THERMAL_AEE_RR_REC == 1)
static void _mt_thermal_aee_init(void)
{
aee_rr_rec_thermal_temp1(0xFF);
aee_rr_rec_thermal_temp2(0xFF);
aee_rr_rec_thermal_temp3(0xFF);
aee_rr_rec_thermal_temp4(0xFF);
aee_rr_rec_thermal_temp5(0xFF);
aee_rr_rec_thermal_status(0xFF);
}
#endif
static int tscpu_thermal_probe(struct platform_device *dev);
static int tscpu_register_thermal(void);
static void tscpu_unregister_thermal(void);
#if THERMAL_DRV_UPDATE_TEMP_DIRECT_TO_MET
static int a_tscpu_all_temp[MTK_THERMAL_SENSOR_CPU_COUNT] = { 0 };
static DEFINE_MUTEX(MET_GET_TEMP_LOCK);
static met_thermalsampler_funcMET g_pThermalSampler;
void mt_thermalsampler_registerCB(met_thermalsampler_funcMET pCB)
{
g_pThermalSampler = pCB;
}
EXPORT_SYMBOL(mt_thermalsampler_registerCB);
static DEFINE_SPINLOCK(tscpu_met_spinlock);
void tscpu_met_lock(unsigned long *flags)
{
spin_lock_irqsave(&tscpu_met_spinlock, *flags);
}
EXPORT_SYMBOL(tscpu_met_lock);
void tscpu_met_unlock(unsigned long *flags)
{
spin_unlock_irqrestore(&tscpu_met_spinlock, *flags);
}
EXPORT_SYMBOL(tscpu_met_unlock);
#endif
/*=============================================================
*Weak functions
*=============================================================*/
int __attribute__ ((weak))
IMM_IsAdcInitReady(void)
{
pr_err("E_WF: %s doesn't exist\n", __func__);
return 0;
}
#if defined(CONFIG_ARCH_MT6755)
void __attribute__ ((weak))
mt_ppm_cpu_thermal_protect(unsigned int limited_power)
{
pr_err("E_WF: %s doesn't exist\n", __func__);
}
#else
void __attribute__ ((weak))
mt_cpufreq_thermal_protect(unsigned int limited_power)
{
pr_err("E_WF: %s doesn't exist\n", __func__);
}
#endif
bool __attribute__ ((weak))
mtk_get_gpu_loading(unsigned int *pLoading)
{
pr_err("E_WF: %s doesn't exist\n", __func__);
return 0;
}
void __attribute__ ((weak))
mt_ptp_lock(unsigned long *flags)
{
pr_err("E_WF: %s doesn't exist\n", __func__);
}
void __attribute__ ((weak))
mt_ptp_unlock(unsigned long *flags)
{
pr_err("E_WF: %s doesn't exist\n", __func__);
}
int __attribute__ ((weak))
get_immediate_ts1_wrap(void)
{
return 0;
}
int __attribute__ ((weak))
get_immediate_ts2_wrap(void)
{
return 0;
}
int __attribute__ ((weak))
get_immediate_ts3_wrap(void)
{
return 0;
}
int __attribute__ ((weak))
get_immediate_ts4_wrap(void)
{
return 0;
}
int __attribute__ ((weak))
get_immediate_tsabb_wrap(void)
{
return 0;
}
void __attribute__ ((weak))
mt_cpufreq_thermal_5A_limit(bool enable)
{
pr_err("E_WF: %s doesn't exist\n", __func__);
}
/*=============================================================*/
static void tscpu_fast_initial_sw_workaround(void)
{
int i = 0;
unsigned long flags;
/* tscpu_printk("tscpu_fast_initial_sw_workaround\n"); */
/* tscpu_thermal_clock_on(); */
mt_ptp_lock(&flags);
for (i = 0; i < TS_LEN_ARRAY(tscpu_g_bank); i++) {
tscpu_switch_bank(i);
tscpu_thermal_fast_init();
}
mt_ptp_unlock(&flags);
}
void tscpu_thermal_tempADCPNP(int adc, int order)
{
tscpu_dprintk("%s adc %x, order %d\n", __func__, adc, order);
switch (order) {
case 0:
THERMAL_WRAP_WR32(adc, TEMPADCPNP0);
break;
case 1:
THERMAL_WRAP_WR32(adc, TEMPADCPNP1);
break;
case 2:
THERMAL_WRAP_WR32(adc, TEMPADCPNP2);
break;
case 3:
THERMAL_WRAP_WR32(adc, TEMPADCPNP3);
break;
default:
THERMAL_WRAP_WR32(adc, TEMPADCPNP0);
break;
}
}
int tscpu_thermal_ADCValueOfMcu(enum thermal_sensor_enum type)
{
switch (type) {
case MCU1:
return TEMPADC_MCU1;
case MCU2:
return TEMPADC_MCU2;
case MCU3:
return TEMPADC_MCU3;
case MCU4:
return TEMPADC_MCU4;
case ABB:
return TEMPADC_ABB;
default:
return TEMPADC_MCU1;
}
}
static int max_temperature_in_bank(thermal_bank_name bank)
{
int j = 0;
int max_in_bank = 0;
for (j = 0; j < tscpu_g_bank[bank].ts_number; j++) {
if (tscpu_bank_ts[bank][tscpu_g_bank[bank].ts[j].type] > max_in_bank)
max_in_bank = tscpu_bank_ts[bank][tscpu_g_bank[bank].ts[j].type];
tscpu_dprintk("tscpu_get_temp CPU bank%d T%d=%d\n", bank, j,
tscpu_bank_ts[bank][tscpu_g_bank[bank].ts[j].type]);
}
return max_in_bank;
}
int tscpu_max_temperature(void)
{
int i = 0;
int max = 0;
int max_in_bank = 0;
tscpu_dprintk("tscpu_get_temp %s, %d\n", __func__, __LINE__);
for (i = 0; i < TS_LEN_ARRAY(tscpu_g_bank); i++) {
max_in_bank = max_temperature_in_bank(i);
if (max_in_bank > max)
max = max_in_bank;
}
return max;
}
void tscpu_print_all_temperature(int isDprint)
{
int i = 0, j = 0;
for (i = 0; i < TS_LEN_ARRAY(tscpu_g_bank); i++) {
for (j = 0; j < tscpu_g_bank[i].ts_number; j++) {
if (isDprint)
tscpu_dprintk("%d ", tscpu_bank_ts[i][tscpu_g_bank[i].ts[j].type]);
else
tscpu_printk("%d ", tscpu_bank_ts[i][tscpu_g_bank[i].ts[j].type]);
}
}
if (isDprint)
tscpu_dprintk("\n");
else
tscpu_printk("\n");
}
void set_taklking_flag(bool flag)
{
talking_flag = flag;
tscpu_printk("talking_flag=%d\n", talking_flag);
}
int mtk_gpufreq_register(struct mt_gpufreq_power_table_info *freqs, int num)
{
int i = 0;
tscpu_dprintk("mtk_gpufreq_register\n");
mtk_gpu_power = kzalloc((num) * sizeof(struct mt_gpufreq_power_table_info), GFP_KERNEL);
if (mtk_gpu_power == NULL)
return -ENOMEM;
for (i = 0; i < num; i++) {
mtk_gpu_power[i].gpufreq_khz = freqs[i].gpufreq_khz;
mtk_gpu_power[i].gpufreq_power = freqs[i].gpufreq_power;
tscpu_dprintk("[%d].gpufreq_khz=%u, .gpufreq_power=%u\n",
i, freqs[i].gpufreq_khz, freqs[i].gpufreq_power);
}
Num_of_GPU_OPP = num; /* GPU OPP count */
return 0;
}
EXPORT_SYMBOL(mtk_gpufreq_register);
static int tscpu_bind(struct thermal_zone_device *thermal, struct thermal_cooling_device *cdev)
{
int table_val = 0;
if (!strcmp(cdev->type, g_bind0)) {
table_val = 0;
tscpu_config_all_tc_hw_protect(trip_temp[0], tc_mid_trip);
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind1)) {
table_val = 1;
/* only when a valid cooler is tried to bind here, we set tc_mid_trip to trip_temp[1]; */
tc_mid_trip = trip_temp[1];
tscpu_config_all_tc_hw_protect(trip_temp[0], tc_mid_trip);
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind2)) {
table_val = 2;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind3)) {
table_val = 3;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind4)) {
table_val = 4;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind5)) {
table_val = 5;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind6)) {
table_val = 6;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind7)) {
table_val = 7;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind8)) {
table_val = 8;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind9)) {
table_val = 9;
/* tscpu_dprintk("tscpu_bind %s\n", cdev->type); */
} else {
return 0;
}
if (mtk_thermal_zone_bind_cooling_device(thermal, table_val, cdev)) {
tscpu_warn("tscpu_bind error binding cooling dev\n");
return -EINVAL;
}
tscpu_printk("tscpu_bind binding OK, %d\n", table_val);
return 0;
}
static int tscpu_unbind(struct thermal_zone_device *thermal, struct thermal_cooling_device *cdev)
{
int table_val = 0;
if (!strcmp(cdev->type, g_bind0)) {
table_val = 0;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind1)) {
table_val = 1;
/* only when a valid cooler is tried to bind here, we set tc_mid_trip to trip_temp[1]; */
tc_mid_trip = -275000;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind2)) {
table_val = 2;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind3)) {
table_val = 3;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind4)) {
table_val = 4;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind5)) {
table_val = 5;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind6)) {
table_val = 6;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind7)) {
table_val = 7;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind8)) {
table_val = 8;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else if (!strcmp(cdev->type, g_bind9)) {
table_val = 9;
/* tscpu_dprintk("tscpu_unbind %s\n", cdev->type); */
} else
return 0;
if (thermal_zone_unbind_cooling_device(thermal, table_val, cdev)) {
tscpu_warn("tscpu_unbind error unbinding cooling dev\n");
return -EINVAL;
}
tscpu_printk("tscpu_unbind unbinding OK\n");
return 0;
}
static int tscpu_get_mode(struct thermal_zone_device *thermal, enum thermal_device_mode *mode)
{
*mode = (kernelmode) ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED;
return 0;
}
static int tscpu_set_mode(struct thermal_zone_device *thermal, enum thermal_device_mode mode)
{
kernelmode = mode;
return 0;
}
static int tscpu_get_trip_type(struct thermal_zone_device *thermal, int trip,
enum thermal_trip_type *type)
{
*type = g_THERMAL_TRIP[trip];
return 0;
}
static int tscpu_get_trip_temp(struct thermal_zone_device *thermal, int trip, unsigned long *temp)
{
*temp = trip_temp[trip];
return 0;
}
static int tscpu_get_crit_temp(struct thermal_zone_device *thermal, unsigned long *temperature)
{
*temperature = MTKTSCPU_TEMP_CRIT;
return 0;
}
static int tscpu_get_temp(struct thermal_zone_device *thermal, unsigned long *t)
{
int ret = 0;
int curr_temp;
int temp_temp;
static int last_cpu_real_temp;
curr_temp = tscpu_get_curr_temp();
tscpu_dprintk("tscpu_get_temp CPU Max T=%d\n", curr_temp);
if ((curr_temp > (trip_temp[0] - 15000)) || (curr_temp < -30000) || (curr_temp > 85000)) {
printk_ratelimited("%d %d CPU T=%d\n",
get_adaptive_power_limit(0), get_adaptive_power_limit(1), curr_temp);
}
temp_temp = curr_temp;
if (curr_temp != 0) {/* not resumed from suspensio... */
if ((curr_temp > 150000) || (curr_temp < -20000)) { /* invalid range */
tscpu_warn("CPU temp invalid=%d\n", curr_temp);
temp_temp = 50000;
ret = -1;
} else if (last_cpu_real_temp != 0) {
if ((curr_temp - last_cpu_real_temp > 40000) || (last_cpu_real_temp - curr_temp > 40000)) {
/* delta 40C, invalid change */
tscpu_warn("CPU temp float hugely temp=%d, lasttemp=%d\n",
curr_temp, last_cpu_real_temp);
/* tscpu_printk("RAW_TS2 = %d,RAW_TS3 = %d,RAW_TS4 = %d\n",RAW_TS2,RAW_TS3,RAW_TS4); */
temp_temp = 50000;
ret = -1;
}
}
}
last_cpu_real_temp = curr_temp;
curr_temp = temp_temp;
tscpu_read_curr_temp = curr_temp;
*t = (unsigned long)curr_temp;
#if MTKTSCPU_FAST_POLLING
tscpu_cur_fp_factor = tscpu_next_fp_factor;
if (curr_temp >= fast_polling_trip_temp) {
tscpu_next_fp_factor = fast_polling_factor;
/* it means next timeout will be in interval/fast_polling_factor */
thermal->polling_delay = interval / fast_polling_factor;
} else {
tscpu_next_fp_factor = 1;
thermal->polling_delay = interval;
}
#endif
/* for low power */
if ((int)*t >= tscpu_polling_trip_temp1)
;
else if ((int)*t < tscpu_polling_trip_temp2)
thermal->polling_delay = interval * tscpu_polling_factor2;
else
thermal->polling_delay = interval * tscpu_polling_factor1;
/* tscpu_dprintk("tscpu_get_temp:thermal->polling_delay=%d\n",thermal->polling_delay); */
#if CPT_ADAPTIVE_AP_COOLER
tscpu_g_prev_temp = tscpu_g_curr_temp;
tscpu_g_curr_temp = curr_temp;
#endif
#if THERMAL_GPIO_OUT_TOGGLE
/*for output signal monitor */
tscpu_set_GPIO_toggle_for_monitor();
#endif
#if defined(CONFIG_ARCH_MT6753)
/*For MT6753 PMIC 5A throttle patch*/
if (curr_temp >= thermal5A_TH && thermal5A_status == 0) {
mt_cpufreq_thermal_5A_limit(1);
thermal5A_status = 1;
} else if (curr_temp < thermal5A_TH && thermal5A_status == 1) {
mt_cpufreq_thermal_5A_limit(0);
thermal5A_status = 0;
}
#endif
g_max_temp = curr_temp;
return ret;
}
/* bind callback functions to thermalzone */
static struct thermal_zone_device_ops mtktscpu_dev_ops = {
.bind = tscpu_bind,
.unbind = tscpu_unbind,
.get_temp = tscpu_get_temp,
.get_mode = tscpu_get_mode,
.set_mode = tscpu_set_mode,
.get_trip_type = tscpu_get_trip_type,
.get_trip_temp = tscpu_get_trip_temp,
.get_crit_temp = tscpu_get_crit_temp,
};
static int tscpu_read_Tj_out(struct seq_file *m, void *v)
{
int ts_con0 = 0;
/* TS_CON0[19:16] = 0x8: Tj sensor Analog signal output via HW pin */
ts_con0 = DRV_Reg32(TS_CON0_TM);
seq_printf(m, "TS_CON0:0x%x\n", ts_con0);
return 0;
}
static ssize_t tscpu_write_Tj_out(struct file *file, const char __user *buffer, size_t count,
loff_t *data)
{
char desc[32];
int lv_Tj_out_flag;
int len = 0;
len = (count < (sizeof(desc) - 1)) ? count : (sizeof(desc) - 1);
if (copy_from_user(desc, buffer, len))
return 0;
desc[len] = '\0';
if (kstrtoint(desc, 10, &lv_Tj_out_flag) == 0) {
if (lv_Tj_out_flag == 1) {
/* TS_CON0[19:16] = 0x8: Tj sensor Analog signal output via HW pin */
THERMAL_WRAP_WR32(DRV_Reg32(TS_CON0_TM) | 0x00010000, TS_CON0_TM);
} else {
/* TS_CON0[19:16] = 0x8: Tj sensor Analog signal output via HW pin */
THERMAL_WRAP_WR32(DRV_Reg32(TS_CON0_TM) & 0xfffeffff, TS_CON0_TM);
}
tscpu_dprintk("tscpu_write_Tj_out lv_Tj_out_flag=%d\n", lv_Tj_out_flag);
return count;
}
tscpu_dprintk("tscpu_write_Tj_out bad argument\n");
return -EINVAL;
}
#if THERMAL_GPIO_OUT_TOGGLE
static int g_trigger_temp = 95000; /* default 95 deg */
static int g_GPIO_out_enable; /* 0:disable */
static int g_GPIO_already_set;
#define GPIO118_MODE (GPIO_BASE + 0x0770)
#define GPIO118_DIR (GPIO_BASE + 0x0070)
#define GPIO118_DOUT (GPIO_BASE + 0x0470)
void tscpu_set_GPIO_toggle_for_monitor(void)
{
int lv_GPIO118_MODE, lv_GPIO118_DIR, lv_GPIO118_DOUT;
tscpu_dprintk("tscpu_set_GPIO_toggle_for_monitor,g_GPIO_out_enable=%d\n",
g_GPIO_out_enable);
if (g_GPIO_out_enable == 1) {
if (g_max_temp > g_trigger_temp) {
tscpu_printk("g_max_temp %d > g_trigger_temp %d\n", g_max_temp,
g_trigger_temp);
g_GPIO_out_enable = 0; /* only can enter once */
g_GPIO_already_set = 1;
lv_GPIO118_MODE = thermal_readl(GPIO118_MODE);
lv_GPIO118_DIR = thermal_readl(GPIO118_DIR);
lv_GPIO118_DOUT = thermal_readl(GPIO118_DOUT);
tscpu_printk("tscpu_set_GPIO_toggle_for_monitor:lv_GPIO118_MODE=0x%x,", lv_GPIO118_MODE);
tscpu_printk("lv_GPIO118_DIR=0x%x,lv_GPIO118_DOUT=0x%x,\n", lv_GPIO118_DIR, lv_GPIO118_DOUT);
/* thermal_clrl(GPIO118_MODE,0x00000E00);//clear GPIO118_MODE[11:9] */
/* thermal_setl(GPIO118_DIR, 0x00000040);//set GPIO118_DIR[6]=1 */
thermal_clrl(GPIO118_DOUT, 0x00000040); /* set GPIO118_DOUT[6]=0 Low */
udelay(200);
thermal_setl(GPIO118_DOUT, 0x00000040); /* set GPIO118_DOUT[6]=1 Hiht */
} else {
if (g_GPIO_already_set == 1) {
/* restore */
g_GPIO_already_set = 0;
/* thermal_writel(GPIO118_MODE,lv_GPIO118_MODE); */
/* thermal_writel(GPIO118_DIR, lv_GPIO118_DIR); */
/* thermal_writel(GPIO118_DOUT,lv_GPIO118_DOUT); */
thermal_clrl(GPIO118_DOUT, 0x00000040); /* set GPIO118_DOUT[6]=0 Low */
}
}
}
}
/*
For example:
GPIO_BASE :0x10005000
GPIO118_MODE = 0 (change to GPIO mode)
0x0770 GPIO_MODE24 16 GPIO Mode Control Register 24
11 9 GPIO118_MODE RW Public 3'd1 "0: GPIO118 (IO)1: UTXD3 (O)2: URXD3 (I)3: MD_UTXD (O)
4: LTE_UTXD (O)5: TDD_TXD (O)6: Reserved7: DBG_MON_A_10_ (IO)" Selects GPIO 118 mode
GPIO118_DIR =1 (output)
0x0070 GPIO_DIR8 16 GPIO Direction Control Register 8
6 6 GPIO118_DIR RW Public 1'b0 "0: Input1: Output" GPIO 118 direction control
GPIO118_DOUT=1/0 (hi or low)
0x0470 GPIO_DOUT8 16 GPIO Data Output Register 8
6 6 GPIO118_DOUT RW Public 1'b0 "0: Output 01: Output 1" GPIO 118 data output value
*/
static int tscpu_read_GPIO_out(struct seq_file *m, void *v)
{
seq_printf(m, "GPIO out enable:%d, trigger temperature=%d\n", g_GPIO_out_enable,
g_trigger_temp);
return 0;
}
static ssize_t tscpu_write_GPIO_out(struct file *file, const char __user *buffer, size_t count,
loff_t *data)
{
char desc[512];
char TEMP[10], ENABLE[10];
unsigned int valTEMP, valENABLE;
int len = 0;
int lv_GPIO118_MODE, lv_GPIO118_DIR;
len = (count < (sizeof(desc) - 1)) ? count : (sizeof(desc) - 1);
if (copy_from_user(desc, buffer, len))
return 0;
desc[len] = '\0';
if (sscanf(desc, "%s %d %s %d ", TEMP, &valTEMP, ENABLE, &valENABLE) == 4) {
/* tscpu_printk("XXXXXXXXX\n"); */
if (!strcmp(TEMP, "TEMP")) {
g_trigger_temp = valTEMP;
tscpu_printk("g_trigger_temp=%d\n", valTEMP);
} else {
tscpu_printk("tscpu_write_GPIO_out TEMP bad argument\n");
return -EINVAL;
}
if (!strcmp(ENABLE, "ENABLE")) {
g_GPIO_out_enable = valENABLE;
tscpu_printk("g_GPIO_out_enable=%d,g_GPIO_already_set=%d\n", valENABLE,
g_GPIO_already_set);
} else {
tscpu_printk("tscpu_write_GPIO_out ENABLE bad argument\n");
return -EINVAL;
}
lv_GPIO118_MODE = thermal_readl(GPIO118_MODE);
lv_GPIO118_DIR = thermal_readl(GPIO118_DIR);
/* clear GPIO118_MODE[11:9],GPIO118_MODE = 0 (change to GPIO mode) */
thermal_clrl(GPIO118_MODE, 0x00000E00);
thermal_setl(GPIO118_DIR, 0x00000040); /* set GPIO118_DIR[6]=1,GPIO118_DIR =1 (output) */
thermal_clrl(GPIO118_DOUT, 0x00000040); /* set GPIO118_DOUT[6]=0 Low */
return count;
}
tscpu_printk("tscpu_write_GPIO_out bad argument\n");
return -EINVAL;
}
#endif
static int tscpu_read_opp(struct seq_file *m, void *v)
{
unsigned int cpu_power, gpu_power;
unsigned int gpu_loading = 0;
cpu_power = MIN(adaptive_cpu_power_limit, static_cpu_power_limit);
gpu_power = MIN(adaptive_gpu_power_limit, static_gpu_power_limit);
#if CPT_ADAPTIVE_AP_COOLER
if (!mtk_get_gpu_loading(&gpu_loading))
gpu_loading = 0;
seq_printf(m, "%d,%d,%d,%d,%d\n",
(int)((cpu_power != 0x7FFFFFFF) ? cpu_power : 0),
(int)((gpu_power != 0x7FFFFFFF) ? gpu_power : 0),
/* ((NULL == mtk_thermal_get_gpu_loading_fp) ? 0 : mtk_thermal_get_gpu_loading_fp()), */
(int)gpu_loading, (int)mt_gpufreq_get_cur_freq(), get_target_tj());
#else
seq_printf(m, "%d,%d,0,%d\n",
(int)((cpu_power != 0x7FFFFFFF) ? cpu_power : 0),
(int)((gpu_power != 0x7FFFFFFF) ? gpu_power : 0),
(int)mt_gpufreq_get_cur_freq());
#endif
return 0;
}
static int tscpu_talking_flag_read(struct seq_file *m, void *v)
{
seq_printf(m, "%d\n", talking_flag);
return 0;
}
static ssize_t tscpu_talking_flag_write(struct file *file, const char __user *buffer, size_t count,
loff_t *data)
{
char desc[32];
int lv_talking_flag;
int len = 0;
len = (count < (sizeof(desc) - 1)) ? count : (sizeof(desc) - 1);
if (copy_from_user(desc, buffer, len))
return 0;
desc[len] = '\0';
if (kstrtoint(desc, 10, &lv_talking_flag) == 0) {
talking_flag = lv_talking_flag;
tscpu_dprintk("tscpu_talking_flag_write talking_flag=%d\n", talking_flag);
return count;
}
tscpu_dprintk("tscpu_talking_flag_write bad argument\n");
return -EINVAL;
}
static int tscpu_set_temperature_read(struct seq_file *m, void *v)
{
seq_printf(m, "%d\n", temperature_switch);
return 0;
}
static ssize_t tscpu_set_temperature_write(struct file *file, const char __user *buffer,
size_t count, loff_t *data)
{
char desc[32];
int lv_tempe_switch;
int len = 0;
len = (count < (sizeof(desc) - 1)) ? count : (sizeof(desc) - 1);
if (copy_from_user(desc, buffer, len))
return 0;
desc[len] = '\0';
tscpu_dprintk("tscpu_set_temperature_write\n");
if (kstrtoint(desc, 10, &lv_tempe_switch) == 0) {
temperature_switch = lv_tempe_switch;
tscpu_config_all_tc_hw_protect(temperature_switch, tc_mid_trip);
tscpu_dprintk("tscpu_set_temperature_write temperature_switch=%d\n",
temperature_switch);
return count;
}
tscpu_warn("tscpu_set_temperature_write bad argument\n");
return -EINVAL;
}
static int tscpu_read_log(struct seq_file *m, void *v)
{
seq_printf(m, "[ tscpu_read_log] log = %d\n", tscpu_debug_log);
return 0;
}
static int tscpu_read_cal(struct seq_file *m, void *v)
{
/* seq_printf(m, "mtktscpu cal:\n devinfo index(16)=0x%x, devinfo index(17)=0x%x, devinfo index(18)=0x%x\n", */
/* get_devinfo_with_index(16), get_devinfo_with_index(17), get_devinfo_with_index(18)); */
return 0;
}
static int tscpu_read(struct seq_file *m, void *v)
{
int i;
seq_printf(m,
"[tscpu_read]%d\ntrip_0=%d %d %s\ntrip_1=%d %d %s\ntrip_2=%d %d %s\ntrip_3=%d %d %s\ntrip_4=%d %d %s\ntrip_5=%d %d %s\ntrip_6=%d %d %s\ntrip_7=%d %d %s\ntrip_8=%d %d %s\ntrip_9=%d %d %s\ninterval=%d\n",
num_trip,
trip_temp[0], g_THERMAL_TRIP[0], g_bind0,
trip_temp[1], g_THERMAL_TRIP[1], g_bind1,
trip_temp[2], g_THERMAL_TRIP[2], g_bind2,
trip_temp[3], g_THERMAL_TRIP[3], g_bind3,
trip_temp[4], g_THERMAL_TRIP[4], g_bind4,
trip_temp[5], g_THERMAL_TRIP[5], g_bind5,
trip_temp[6], g_THERMAL_TRIP[6], g_bind6,
trip_temp[7], g_THERMAL_TRIP[7], g_bind7,
trip_temp[8], g_THERMAL_TRIP[8], g_bind8,
trip_temp[9], g_THERMAL_TRIP[9], g_bind9, interval);
for (i = 0; i < Num_of_GPU_OPP; i++)
seq_printf(m, "g %d %d %d\n", i, mtk_gpu_power[i].gpufreq_khz,
mtk_gpu_power[i].gpufreq_power);
for (i = 0; i < tscpu_num_opp; i++)
seq_printf(m, "c %d %d %d %d\n", i, mtk_cpu_power[i].cpufreq_khz,
mtk_cpu_power[i].cpufreq_ncpu, mtk_cpu_power[i].cpufreq_power);
for (i = 0; i < CPU_COOLER_NUM; i++)
seq_printf(m, "d %d %d\n", i, tscpu_cpu_dmips[i]);
return 0;
}
static ssize_t tscpu_write_log(struct file *file, const char __user *buffer, size_t count,
loff_t *data)
{
char desc[32];
int log_switch;
int len = 0;
len = (count < (sizeof(desc) - 1)) ? count : (sizeof(desc) - 1);
if (copy_from_user(desc, buffer, len))
return 0;
desc[len] = '\0';
if (kstrtoint(desc, 10, &log_switch) == 0)
/* if (5 <= sscanf(desc, "%d %d %d %d %d", &log_switch, &hot, &normal, &low, &lv_offset)) */
{
tscpu_debug_log = log_switch;
return count;
}
tscpu_warn("tscpu_write_log bad argument\n");