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cpu_test.asm
3896 lines (3425 loc) · 159 KB
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cpu_test.asm
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; Extended CPU test
#include "../dist_kit/sysdef.asm"
#include "../dist_kit/monitor.def"
.ORG 0x8000
; This is a comprehensive test suite of the QNICE processor.
; The QNICE processor has 18 different instructions, 4 different addressing
; modes, and 5 different status flags.
; Making an exhaustive test of all possible combinations of the three
; different parameters is too big.
; Instead, this program tests:
; 1. All combinations of flags and branching.
; 2. All combinations of instructions and status flags.
; 3. All combinations of instructions and addressing modes.
; Tests in this file:
; Group 1. All combinations of flags and branching.
; UNC : Test unconditional absolute and relative branches
; R14_ST : Test that moving data into R14 sets the correct status bits
; MOVE_IMM : Test the MOVE immediate instruction, and the X, Z, and N-conditional branches
; MOVE_REG : Test the MOVE register instruction, and the X, Z, and N-conditional branches
; CMP_IMM : Test compare with immediate value and Z-conditional absolute branch
; CMP_REG : Test compare between two registers and Z-conditional relative branch
; REG_13 : Test all 13 registers can contain different values
; ADD : Test the ADD instruction, and the status register
; MOVE_CV : Test the MOVE instruction doesnt change C and V flags
; MOVE_MEM : Test the MOVE instruction to/from a memory address
; PC_R15 : Test that PC is the same as R15
; SUB : Test the instructions RSUB and ASUB, and the use of the Stack Pointer and R13.
; BANK : Test register banking
; RB_R14 : Test RB instructions with R14
; Group 2. All combinations of instructions and status flags.
; ADDC : Test the ADDC instruction with all flags
; SUB : Test the SUB instruction with all flags
; SUBC : Test the SUBC instruction with all flags
; SHL : Test the SHL instruction with all flags
; SHR : Test the SHR instruction with all flags
; SWAP : Test the SWAP instruction with all flags
; NOT : Test the NOT instruction with all flags
; AND : Test the AND instruction with all flags
; OR : Test the OR instruction with all flags
; XOR : Test the XOR instruction with all flags
; CMP : Test the CMP instruction with all flags
; Group 3. All combinations of instructions and addressing modes.
; MOVE_AM : Test the MOVE instruction with all addressing modes (different registers)
; MOVE_AM2 : Test the MOVE instruction with all addressing modes (same registers)
; SUB_AM : Test the SUB instruction with all addressing modes (different registers)
; SUB_AM2 : Test the SUB instruction with all addressing modes (same registers)
; Instructions:
; MOVE, ADD, ADDC, SUB, SUBC, SHL, SHR, SWAP
; NOT, AND, OR, XOR, CMP, res, HALT, BRA/SUB
; We cant explicitly test the HALT instruction, so we must just assume that
; it works as expected.
; Addressing modes
; R0
; @R0
; @R0++
; @--R0
; Status register (bits 7 - 0) of R14:
; - - V N Z C X 1
#define ST______ 0x0001
#define ST_____X 0x0003
#define ST____C_ 0x0005
#define ST____CX 0x0007
#define ST___Z__ 0x0009
#define ST___Z_X 0x000B
#define ST___ZC_ 0x000D
#define ST___ZCX 0x000F
#define ST__N___ 0x0011
#define ST__N__X 0x0013
#define ST__N_C_ 0x0015
#define ST__N_CX 0x0017
#define ST__NZ__ 0x0019
#define ST__NZ_X 0x001B
#define ST__NZC_ 0x001D
#define ST__NZCX 0x001F
#define ST_V____ 0x0021
#define ST_V___X 0x0023
#define ST_V__C_ 0x0025
#define ST_V__CX 0x0027
#define ST_V_Z__ 0x0029
#define ST_V_Z_X 0x002B
#define ST_V_ZC_ 0x002D
#define ST_V_ZCX 0x002F
#define ST_VN___ 0x0031
#define ST_VN__X 0x0033
#define ST_VN_C_ 0x0035
#define ST_VN_CX 0x0037
#define ST_VNZ__ 0x0039
#define ST_VNZ_X 0x003B
#define ST_VNZC_ 0x003D
#define ST_VNZCX 0x003F
; Instruction | Flags affected
; | V | N | Z | C | X |
; MOVE | . | * | * | . | * |
; SWAP | . | * | * | . | * |
; NOT | . | * | * | . | * |
; AND/OR/XOR | . | * | * | . | * |
; ADD/SUB | * | * | * | * | * |
; SHL | . | * | * | * | . |
; SHR | . | * | * | . | * |
; CMP | * | * | * | . | . |
; BRA/SUB | . | . | . | . | . |
; ---------------------------------------------------------------------------
; Test unconditional absolute and relative branches.
L_UNC_0 ABRA E_UNC_1, !1 ; Verify "absolute branch never" is not taken.
ABRA L_UNC_1, 1 ; Verify "absolute branch always" is taken.
HALT
E_UNC_1 HALT
E_UNC_2 HALT
L_UNC_2 RBRA L_UNC_3, 1 ; Verify "relative branch always" is taken in the forward direction.
HALT
L_UNC_1 RBRA E_UNC_2, !1 ; Verify "relative branch never" is not taken.
RBRA L_UNC_2, 1 ; Verify "relative branch always" is taken in the backward direction.
HALT
L_UNC_3
; ---------------------------------------------------------------------------
; Test that moving data into R14 sets the correct status bits
L_R14_ST_00 MOVE 0x00FF, R14 ; Set all bits in the status register
RBRA E_R14_ST_01, !V ; Verify "relative branch nonoverflow" is not taken.
RBRA L_R14_ST_01, V ; Verify "relative branch overflow" is taken.
HALT
E_R14_ST_01 HALT
L_R14_ST_01
RBRA E_R14_ST_02, !N ; Verify "relative branch nonnegative" is not taken.
RBRA L_R14_ST_02, N ; Verify "relative branch negative" is taken.
HALT
E_R14_ST_02 HALT
L_R14_ST_02
RBRA E_R14_ST_03, !Z ; Verify "relative branch nonzero" is not taken.
RBRA L_R14_ST_03, Z ; Verify "relative branch zero" is taken.
HALT
E_R14_ST_03 HALT
L_R14_ST_03
RBRA E_R14_ST_04, !C ; Verify "relative branch noncarry" is not taken.
RBRA L_R14_ST_04, C ; Verify "relative branch carry" is taken.
HALT
E_R14_ST_04 HALT
L_R14_ST_04
RBRA E_R14_ST_05, !X ; Verify "relative branch nonX" is not taken.
RBRA L_R14_ST_05, X ; Verify "relative branch X" is taken.
HALT
E_R14_ST_05 HALT
L_R14_ST_05
RBRA E_R14_ST_06, !1 ; Verify "relative branch never" is not taken.
RBRA L_R14_ST_06, 1 ; Verify "relative branch always" is taken.
HALT
E_R14_ST_06 HALT
L_R14_ST_06
L_R14_ST_10 MOVE 0x0000, R14 ; Clear all bits in the status register
RBRA E_R14_ST_11, V ; Verify "relative branch overflow" is not taken.
RBRA L_R14_ST_11, !V ; Verify "relative branch nonoverflow" is taken.
HALT
E_R14_ST_11 HALT
L_R14_ST_11
RBRA E_R14_ST_12, N ; Verify "relative branch negative" is not taken.
RBRA L_R14_ST_12, !N ; Verify "relative branch nonnegative" is taken.
HALT
E_R14_ST_12 HALT
L_R14_ST_12
RBRA E_R14_ST_13, Z ; Verify "relative branch zero" is not taken.
RBRA L_R14_ST_13, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_R14_ST_13 HALT
L_R14_ST_13
RBRA E_R14_ST_14, C ; Verify "relative branch carry" is not taken.
RBRA L_R14_ST_14, !C ; Verify "relative branch noncarry" is taken.
HALT
E_R14_ST_14 HALT
L_R14_ST_14
RBRA E_R14_ST_15, X ; Verify "relative branch X" is not taken.
RBRA L_R14_ST_15, !X ; Verify "relative branch nonX" is taken.
HALT
E_R14_ST_15 HALT
L_R14_ST_15
RBRA E_R14_ST_16, !1 ; Verify "relative branch never" is not taken.
RBRA L_R14_ST_16, 1 ; Verify "relative branch always" is taken.
HALT
E_R14_ST_16 HALT
L_R14_ST_16
; ---------------------------------------------------------------------------
; Test the MOVE immediate instruction, and the X, Z, and N-conditional branches
L_MOVE_IMM_00 MOVE 0x1234, R0
ABRA E_MOVE_IMM_01, Z ; Verify "absolute branch zero" is not taken.
ABRA L_MOVE_IMM_01, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_MOVE_IMM_01 HALT
L_MOVE_IMM_01
ABRA E_MOVE_IMM_02, N ; Verify "absolute branch negative" is not taken.
ABRA L_MOVE_IMM_02, !N ; Verify "absolute branch nonnegative" is taken.
HALT
E_MOVE_IMM_02 HALT
L_MOVE_IMM_02
ABRA E_MOVE_IMM_03, X ; Verify "absolute branch X" is not taken.
ABRA L_MOVE_IMM_03, !X ; Verify "absolute branch nonX" is taken.
HALT
E_MOVE_IMM_03 HALT
L_MOVE_IMM_03
ABRA E_MOVE_IMM_04, !1 ; Verify "absolute branch never" is not taken.
ABRA L_MOVE_IMM_04, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_IMM_04 HALT
L_MOVE_IMM_04
L_MOVE_IMM_10 MOVE 0x0000, R0
ABRA E_MOVE_IMM_11, !Z ; Verify "absolute branch nonzero" is not taken.
ABRA L_MOVE_IMM_11, Z ; Verify "absolute branch zero" is taken.
HALT
E_MOVE_IMM_11 HALT
L_MOVE_IMM_11
ABRA E_MOVE_IMM_12, N ; Verify "absolute branch negative" is not taken.
ABRA L_MOVE_IMM_12, !N ; Verify "absolute branch nonnegative" is taken.
HALT
E_MOVE_IMM_12 HALT
L_MOVE_IMM_12
ABRA E_MOVE_IMM_13, X ; Verify "absolute branch X" is not taken.
ABRA L_MOVE_IMM_13, !X ; Verify "absolute branch nonX" is taken.
HALT
E_MOVE_IMM_13 HALT
L_MOVE_IMM_13
ABRA E_MOVE_IMM_14, !1 ; Verify "absolute branch never" is not taken.
ABRA L_MOVE_IMM_14, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_IMM_14 HALT
L_MOVE_IMM_14
L_MOVE_IMM_20 MOVE 0xFEDC, R0
ABRA E_MOVE_IMM_21, Z ; Verify "absolute branch zero" is not taken.
ABRA L_MOVE_IMM_21, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_MOVE_IMM_21 HALT
L_MOVE_IMM_21
ABRA E_MOVE_IMM_22, !N ; Verify "absolute branch nonnegative" is not taken.
ABRA L_MOVE_IMM_22, N ; Verify "absolute branch negative" is taken.
HALT
E_MOVE_IMM_22 HALT
L_MOVE_IMM_22
ABRA E_MOVE_IMM_23, X ; Verify "absolute branch X" is not taken.
ABRA L_MOVE_IMM_23, !X ; Verify "absolute branch nonX" is taken.
HALT
E_MOVE_IMM_23 HALT
L_MOVE_IMM_23
ABRA E_MOVE_IMM_24, !1 ; Verify "absolute branch never" is not taken.
ABRA L_MOVE_IMM_24, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_IMM_24 HALT
L_MOVE_IMM_24
L_MOVE_IMM_30 MOVE 0xFFFF, R0
ABRA E_MOVE_IMM_31, Z ; Verify "absolute branch zero" is not taken.
ABRA L_MOVE_IMM_31, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_MOVE_IMM_31 HALT
L_MOVE_IMM_31
ABRA E_MOVE_IMM_32, !N ; Verify "absolute branch nonnegative" is not taken.
ABRA L_MOVE_IMM_32, N ; Verify "absolute branch negative" is taken.
HALT
E_MOVE_IMM_32 HALT
L_MOVE_IMM_32
ABRA E_MOVE_IMM_33, !X ; Verify "absolute branch nonX" is not taken.
ABRA L_MOVE_IMM_33, X ; Verify "absolute branch X" is taken.
HALT
E_MOVE_IMM_33 HALT
L_MOVE_IMM_33
ABRA E_MOVE_IMM_34, !1 ; Verify "absolute branch never" is not taken.
ABRA L_MOVE_IMM_34, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_IMM_34 HALT
L_MOVE_IMM_34
; ---------------------------------------------------------------------------
; Test the MOVE register instruction, and the X, Z, and N-conditional branches
L_MOVE_REG_00 MOVE 0x1234, R1
MOVE 0x0000, R2
MOVE 0xFEDC, R3
MOVE 0xFFFF, R4
MOVE R1, R0
RBRA E_MOVE_REG_01, Z ; Verify "absolute branch zero" is not taken.
RBRA L_MOVE_REG_01, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_MOVE_REG_01 HALT
L_MOVE_REG_01
RBRA E_MOVE_REG_02, N ; Verify "absolute branch negative" is not taken.
RBRA L_MOVE_REG_02, !N ; Verify "absolute branch nonnegative" is taken.
HALT
E_MOVE_REG_02 HALT
L_MOVE_REG_02
RBRA E_MOVE_REG_03, X ; Verify "absolute branch X" is not taken.
RBRA L_MOVE_REG_03, !X ; Verify "absolute branch nonX" is taken.
HALT
E_MOVE_REG_03 HALT
L_MOVE_REG_03
RBRA E_MOVE_REG_04, !1 ; Verify "absolute branch never" is not taken.
RBRA L_MOVE_REG_04, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_REG_04 HALT
L_MOVE_REG_04
L_MOVE_REG_10 MOVE R2, R0
RBRA E_MOVE_REG_11, !Z ; Verify "absolute branch nonzero" is not taken.
RBRA L_MOVE_REG_11, Z ; Verify "absolute branch zero" is taken.
HALT
E_MOVE_REG_11 HALT
L_MOVE_REG_11
RBRA E_MOVE_REG_12, N ; Verify "absolute branch negative" is not taken.
RBRA L_MOVE_REG_12, !N ; Verify "absolute branch nonnegative" is taken.
HALT
E_MOVE_REG_12 HALT
L_MOVE_REG_12
RBRA E_MOVE_REG_13, X ; Verify "absolute branch X" is not taken.
RBRA L_MOVE_REG_13, !X ; Verify "absolute branch nonX" is taken.
HALT
E_MOVE_REG_13 HALT
L_MOVE_REG_13
RBRA E_MOVE_REG_14, !1 ; Verify "absolute branch never" is not taken.
RBRA L_MOVE_REG_14, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_REG_14 HALT
L_MOVE_REG_14
L_MOVE_REG_20 MOVE R3, R0
RBRA E_MOVE_REG_21, Z ; Verify "absolute branch zero" is not taken.
RBRA L_MOVE_REG_21, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_MOVE_REG_21 HALT
L_MOVE_REG_21
RBRA E_MOVE_REG_22, !N ; Verify "absolute branch nonnegative" is not taken.
RBRA L_MOVE_REG_22, N ; Verify "absolute branch negative" is taken.
HALT
E_MOVE_REG_22 HALT
L_MOVE_REG_22
RBRA E_MOVE_REG_23, X ; Verify "absolute branch X" is not taken.
RBRA L_MOVE_REG_23, !X ; Verify "absolute branch nonX" is taken.
HALT
E_MOVE_REG_23 HALT
L_MOVE_REG_23
RBRA E_MOVE_REG_24, !1 ; Verify "absolute branch never" is not taken.
RBRA L_MOVE_REG_24, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_REG_24 HALT
L_MOVE_REG_24
L_MOVE_REG_30 MOVE R4, R0
RBRA E_MOVE_REG_31, Z ; Verify "absolute branch zero" is not taken.
RBRA L_MOVE_REG_31, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_MOVE_REG_31 HALT
L_MOVE_REG_31
RBRA E_MOVE_REG_32, !N ; Verify "absolute branch nonnegative" is not taken.
RBRA L_MOVE_REG_32, N ; Verify "absolute branch negative" is taken.
HALT
E_MOVE_REG_32 HALT
L_MOVE_REG_32
RBRA E_MOVE_REG_33, !X ; Verify "absolute branch nonX" is not taken.
RBRA L_MOVE_REG_33, X ; Verify "absolute branch X" is taken.
HALT
E_MOVE_REG_33 HALT
L_MOVE_REG_33
RBRA E_MOVE_REG_34, !1 ; Verify "absolute branch never" is not taken.
RBRA L_MOVE_REG_34, 1 ; Verify "absolute branch always" is taken.
HALT
E_MOVE_REG_34 HALT
L_MOVE_REG_34
; ---------------------------------------------------------------------------
; Test compare with immediate value and Z-conditional absolute branch
L_CMP_IMM_0 MOVE 0x1234, R0
MOVE 0x4321, R1
; Compare R0 with correct value.
CMP 0x1234, R0
ABRA E_CMP_IMM_1, !Z ; Verify "absolute branch nonzero" is not taken.
ABRA L_CMP_IMM_1, Z ; Verify "absolute branch zero" is taken.
HALT
E_CMP_IMM_1 HALT
L_CMP_IMM_1
CMP R0, 0x1234
ABRA E_CMP_IMM_2, !Z ; Verify "absolute branch nonzero" is not taken.
ABRA L_CMP_IMM_2, Z ; Verify "absolute branch zero" is taken.
HALT
E_CMP_IMM_2 HALT
L_CMP_IMM_2
; Compare R1 with correct value.
CMP 0x4321, R1
ABRA E_CMP_IMM_3, !Z ; Verify "absolute branch nonzero" is not taken.
ABRA L_CMP_IMM_3, Z ; Verify "absolute branch zero" is taken.
HALT
E_CMP_IMM_3 HALT
L_CMP_IMM_3
CMP R1, 0x4321
ABRA E_CMP_IMM_4, !Z ; Verify "absolute branch nonzero" is not taken.
ABRA L_CMP_IMM_4, Z ; Verify "absolute branch zero" is taken.
HALT
E_CMP_IMM_4 HALT
L_CMP_IMM_4
; Compare R1 with incorrect value.
CMP 0x1234, R1
ABRA E_CMP_IMM_5, Z ; Verify "absolute branch zero" is not taken.
ABRA L_CMP_IMM_5, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_CMP_IMM_5 HALT
L_CMP_IMM_5
CMP R1, 0x1234
ABRA E_CMP_IMM_6, Z ; Verify "absolute branch zero" is not taken.
ABRA L_CMP_IMM_6, !Z ; Verify "absolute branch nonzero" is taken.
HALT
E_CMP_IMM_6 HALT
L_CMP_IMM_6
MOVE R0, R1
; Compare R1 with correct value.
CMP 0x1234, R1
ABRA E_CMP_IMM_7, !Z ; Verify "absolute branch nonzero" is not taken.
ABRA L_CMP_IMM_7, Z ; Verify "absolute branch zero" is taken.
HALT
E_CMP_IMM_7 HALT
L_CMP_IMM_7
CMP R1, 0x1234
ABRA E_CMP_IMM_8, !Z ; Verify "absolute branch nonzero" is not taken.
ABRA L_CMP_IMM_8, Z ; Verify "absolute branch zero" is taken.
HALT
E_CMP_IMM_8 HALT
L_CMP_IMM_8
; ---------------------------------------------------------------------------
; Test compare between two registers and Z-conditional relative branch
L_CMP_REG_0 MOVE 0x1234, R0
MOVE 0x4321, R1
; Compare registers with different values.
CMP R0, R1
RBRA E_CMP_REG_1, Z ; Verify "relative branch zero" is not taken.
RBRA L_CMP_REG_1, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_CMP_REG_1 HALT
L_CMP_REG_1
CMP R1, R0
RBRA E_CMP_REG_2, Z ; Verify "relative branch zero" is not taken.
RBRA L_CMP_REG_2, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_CMP_REG_2 HALT
L_CMP_REG_2
MOVE R1, R0
; Compare registers with equal values.
CMP R0, R1
RBRA E_CMP_REG_3, !Z ; Verify "relative branch nonzero" is not taken.
RBRA L_CMP_REG_3, Z ; Verify "relative branch zero" is taken.
HALT
E_CMP_REG_3 HALT
L_CMP_REG_3
CMP R1, R0
RBRA E_CMP_REG_4, !Z ; Verify "relative branch nonzero" is not taken.
RBRA L_CMP_REG_4, Z ; Verify "relative branch zero" is taken.
HALT
E_CMP_REG_4 HALT
L_CMP_REG_4
; REG_13 : Test all 13 registers can contain different values
L_REG_13_00 MOVE 0x0123, R0
MOVE 0x1234, R1
MOVE 0x2345, R2
MOVE 0x3456, R3
MOVE 0x4567, R4
MOVE 0x5678, R5
MOVE 0x6789, R6
MOVE 0x789A, R7
MOVE 0x89AB, R8
MOVE 0x9ABC, R9
MOVE 0xABCD, R10
MOVE 0xBCDE, R11
MOVE 0xCDEF, R12
CMP 0x0123, R0
RBRA E_REG_13_00, !Z
CMP 0x1234, R1
RBRA E_REG_13_00, !Z
CMP 0x2345, R2
RBRA E_REG_13_00, !Z
CMP 0x3456, R3
RBRA E_REG_13_00, !Z
CMP 0x4567, R4
RBRA E_REG_13_00, !Z
CMP 0x5678, R5
RBRA E_REG_13_00, !Z
CMP 0x6789, R6
RBRA E_REG_13_00, !Z
CMP 0x789A, R7
RBRA E_REG_13_00, !Z
CMP 0x89AB, R8
RBRA E_REG_13_00, !Z
CMP 0x9ABC, R9
RBRA E_REG_13_00, !Z
CMP 0xABCD, R10
RBRA E_REG_13_00, !Z
CMP 0xBCDE, R11
RBRA E_REG_13_00, !Z
CMP 0xCDEF, R12
RBRA E_REG_13_00, !Z
RBRA L_REG_13_01, 1
E_REG_13_00 HALT
L_REG_13_01
; ---------------------------------------------------------------------------
; Test the ADD instruction, and the status register
; Addition | V | N | Z | C | X | 1 |
; 0x1234 + 0x4321 = 0x5555 | 0 | 0 | 0 | 0 | 0 | 1 | ADD_0
; 0x8765 + 0x9876 = 0x1FDB | 1 | 0 | 0 | 1 | 0 | 1 | ADD_1
; 0x1234 + 0x9876 = 0xAAAA | 0 | 1 | 0 | 0 | 0 | 1 | ADD_2
; 0xFEDC + 0xEDCB = 0xECA7 | 0 | 1 | 0 | 1 | 0 | 1 | ADD_3
; 0xFEDC + 0x0123 = 0xFFFF | 0 | 1 | 0 | 0 | 1 | 1 | ADD_4
; 0xFEDC + 0x0124 = 0x0000 | 0 | 0 | 1 | 1 | 0 | 1 | ADD_5
; 0x7654 + 0x6543 = 0xDB97 | 1 | 1 | 0 | 0 | 0 | 1 | ADD_6
; Addition | V | N | Z | C | X | 1 |
; 0x1234 + 0x4321 = 0x5555 | 0 | 0 | 0 | 0 | 0 | 1 | ADD_0
MOVE 0x0000, R14 ; Clear status register
L_ADD_00 MOVE 0x1234, R0
ADD 0x4321, R0
RBRA E_ADD_01, V ; Verify "relative branch overflow" is not taken.
RBRA L_ADD_01, !V ; Verify "relative branch nonoverflow" is taken.
HALT
E_ADD_01 HALT
L_ADD_01
RBRA E_ADD_02, N ; Verify "relative branch negative" is not taken.
RBRA L_ADD_02, !N ; Verify "relative branch nonnegative" is taken.
HALT
E_ADD_02 HALT
L_ADD_02
RBRA E_ADD_03, Z ; Verify "relative branch zero" is not taken.
RBRA L_ADD_03, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_ADD_03 HALT
L_ADD_03
RBRA E_ADD_04, C ; Verify "relative branch carry" is not taken.
RBRA L_ADD_04, !C ; Verify "relative branch noncarry" is taken.
HALT
E_ADD_04 HALT
L_ADD_04
RBRA E_ADD_05, X ; Verify "relative branch X" is not taken.
RBRA L_ADD_05, !X ; Verify "relative branch nonX" is taken.
HALT
E_ADD_05 HALT
L_ADD_05
RBRA E_ADD_06, !1 ; Verify "relative branch never" is not taken.
RBRA L_ADD_06, 1 ; Verify "relative branch always" is taken.
HALT
E_ADD_06 HALT
L_ADD_06
MOVE R14, R1 ; Verify status register: --000001
CMP 0x0001, R1
RBRA E_ADD_07, !Z
RBRA L_ADD_07, Z
HALT
E_ADD_07 HALT
L_ADD_07
CMP 0x5555, R0 ; Verify result
RBRA E_ADD_08, !Z
RBRA L_ADD_08, Z
HALT
E_ADD_08 HALT
L_ADD_08
; Addition | V | N | Z | C | X | 1 |
; 0x8765 + 0x9876 = 0x1FDB | 1 | 0 | 0 | 1 | 0 | 1 | ADD_1
L_ADD_10 MOVE 0x8765, R0
ADD 0x9876, R0
RBRA E_ADD_11, !V ; Verify "relative branch nonoverflow" is not taken.
RBRA L_ADD_11, V ; Verify "relative branch overflow" is taken.
HALT
E_ADD_11 HALT
L_ADD_11
RBRA E_ADD_12, N ; Verify "relative branch negative" is not taken.
RBRA L_ADD_12, !N ; Verify "relative branch nonnegative" is taken.
HALT
E_ADD_12 HALT
L_ADD_12
RBRA E_ADD_13, Z ; Verify "relative branch zero" is not taken.
RBRA L_ADD_13, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_ADD_13 HALT
L_ADD_13
RBRA E_ADD_14, !C ; Verify "relative branch noncarry" is not taken.
RBRA L_ADD_14, C ; Verify "relative branch carry" is taken.
HALT
E_ADD_14 HALT
L_ADD_14
RBRA E_ADD_15, X ; Verify "relative branch X" is not taken.
RBRA L_ADD_15, !X ; Verify "relative branch nonX" is taken.
HALT
E_ADD_15 HALT
L_ADD_15
RBRA E_ADD_16, !1 ; Verify "relative branch never" is not taken.
RBRA L_ADD_16, 1 ; Verify "relative branch always" is taken.
HALT
E_ADD_16 HALT
L_ADD_16
MOVE R14, R1 ; Verify status register: --100101
CMP 0x0025, R1
RBRA E_ADD_17, !Z
RBRA L_ADD_17, Z
HALT
E_ADD_17 HALT
L_ADD_17
CMP 0x1FDB, R0
RBRA E_ADD_18, !Z
RBRA L_ADD_18, Z
HALT
E_ADD_18 HALT
L_ADD_18
; Addition | V | N | Z | C | X | 1 |
; 0x1234 + 0x9876 = 0xAAAA | 0 | 1 | 0 | 0 | 0 | 1 | ADD_2
L_ADD_20 MOVE 0x1234, R0
ADD 0x9876, R0
RBRA E_ADD_21, V ; Verify "relative branch overflow" is not taken.
RBRA L_ADD_21, !V ; Verify "relative branch nonoverflow" is taken.
HALT
E_ADD_21 HALT
L_ADD_21
RBRA E_ADD_22, !N ; Verify "relative branch nonnegative" is not taken.
RBRA L_ADD_22, N ; Verify "relative branch negative" is taken.
HALT
E_ADD_22 HALT
L_ADD_22
RBRA E_ADD_23, Z ; Verify "relative branch zero" is not taken.
RBRA L_ADD_23, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_ADD_23 HALT
L_ADD_23
RBRA E_ADD_24, C ; Verify "relative branch carry" is not taken.
RBRA L_ADD_24, !C ; Verify "relative branch noncarry" is taken.
HALT
E_ADD_24 HALT
L_ADD_24
RBRA E_ADD_25, X ; Verify "relative branch X" is not taken.
RBRA L_ADD_25, !X ; Verify "relative branch nonX" is taken.
HALT
E_ADD_25 HALT
L_ADD_25
RBRA E_ADD_26, !1 ; Verify "relative branch never" is not taken.
RBRA L_ADD_26, 1 ; Verify "relative branch always" is taken.
HALT
E_ADD_26 HALT
L_ADD_26
MOVE R14, R1 ; Verify status register: --010001
CMP 0x0011, R1
RBRA E_ADD_27, !Z
RBRA L_ADD_27, Z
HALT
E_ADD_27 HALT
L_ADD_27
CMP 0xAAAA, R0
RBRA E_ADD_28, !Z
RBRA L_ADD_28, Z
HALT
E_ADD_28 HALT
L_ADD_28
; Addition | V | N | Z | C | X | 1 |
; 0xFEDC + 0xEDCB = 0xECA7 | 0 | 1 | 0 | 1 | 0 | 1 | ADD_3
L_ADD_30 MOVE 0xFEDC, R0
ADD 0xEDCB, R0
RBRA E_ADD_31, V ; Verify "relative branch overflow" is not taken.
RBRA L_ADD_31, !V ; Verify "relative branch nonoverflow" is taken.
HALT
E_ADD_31 HALT
L_ADD_31
RBRA E_ADD_32, !N ; Verify "relative branch nonnegative" is not taken.
RBRA L_ADD_32, N ; Verify "relative branch negative" is taken.
HALT
E_ADD_32 HALT
L_ADD_32
RBRA E_ADD_33, Z ; Verify "relative branch zero" is not taken.
RBRA L_ADD_33, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_ADD_33 HALT
L_ADD_33
RBRA E_ADD_34, !C ; Verify "relative branch noncarry" is not taken.
RBRA L_ADD_34, C ; Verify "relative branch carry" is taken.
HALT
E_ADD_34 HALT
L_ADD_34
RBRA E_ADD_35, X ; Verify "relative branch X" is not taken.
RBRA L_ADD_35, !X ; Verify "relative branch nonX" is taken.
HALT
E_ADD_35 HALT
L_ADD_35
RBRA E_ADD_36, !1 ; Verify "relative branch never" is not taken.
RBRA L_ADD_36, 1 ; Verify "relative branch always" is taken.
HALT
E_ADD_36 HALT
L_ADD_36
MOVE R14, R1 ; Verify status register: --010101
CMP 0x0015, R1
RBRA E_ADD_37, !Z
RBRA L_ADD_37, Z
HALT
E_ADD_37 HALT
L_ADD_37
CMP 0xECA7, R0
RBRA E_ADD_38, !Z
RBRA L_ADD_38, Z
HALT
E_ADD_38 HALT
L_ADD_38
; Addition | V | N | Z | C | X | 1 |
; 0xFEDC + 0x0123 = 0xFFFF | 0 | 1 | 0 | 0 | 1 | 1 | ADD_4
L_ADD_40 MOVE 0xFEDC, R0
ADD 0x0123, R0
RBRA E_ADD_41, V ; Verify "relative branch overflow" is not taken.
RBRA L_ADD_41, !V ; Verify "relative branch nonoverflow" is taken.
HALT
E_ADD_41 HALT
L_ADD_41
RBRA E_ADD_42, !N ; Verify "relative branch nonnegative" is not taken.
RBRA L_ADD_42, N ; Verify "relative branch negative" is taken.
HALT
E_ADD_42 HALT
L_ADD_42
RBRA E_ADD_43, Z ; Verify "relative branch zero" is not taken.
RBRA L_ADD_43, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_ADD_43 HALT
L_ADD_43
RBRA E_ADD_44, C ; Verify "relative branch carry" is not taken.
RBRA L_ADD_44, !C ; Verify "relative branch noncarry" is taken.
HALT
E_ADD_44 HALT
L_ADD_44
RBRA E_ADD_45, !X ; Verify "relative branch nonX" is not taken.
RBRA L_ADD_45, X ; Verify "relative branch X" is taken.
HALT
E_ADD_45 HALT
L_ADD_45
RBRA E_ADD_46, !1 ; Verify "relative branch never" is not taken.
RBRA L_ADD_46, 1 ; Verify "relative branch always" is taken.
HALT
E_ADD_46 HALT
L_ADD_46
MOVE R14, R1 ; Verify status register: --010011
CMP 0x0013, R1
RBRA E_ADD_47, !Z
RBRA L_ADD_47, Z
HALT
E_ADD_47 HALT
L_ADD_47
CMP 0xFFFF, R0
RBRA E_ADD_48, !Z
RBRA L_ADD_48, Z
HALT
E_ADD_48 HALT
L_ADD_48
; Addition | V | N | Z | C | X | 1 |
; 0xFEDC + 0x0124 = 0x0000 | 0 | 0 | 1 | 1 | 0 | 1 | ADD_5
L_ADD_50 MOVE 0xFEDC, R0
ADD 0x0124, R0
RBRA E_ADD_51, V ; Verify "relative branch overflow" is not taken.
RBRA L_ADD_51, !V ; Verify "relative branch nonoverflow" is taken.
HALT
E_ADD_51 HALT
L_ADD_51
RBRA E_ADD_52, N ; Verify "relative branch negative" is not taken.
RBRA L_ADD_52, !N ; Verify "relative branch nonnegative" is taken.
HALT
E_ADD_52 HALT
L_ADD_52
RBRA E_ADD_53, !Z ; Verify "relative branch nonzero" is not taken.
RBRA L_ADD_53, Z ; Verify "relative branch zero" is taken.
HALT
E_ADD_53 HALT
L_ADD_53
RBRA E_ADD_54, !C ; Verify "relative branch noncarry" is not taken.
RBRA L_ADD_54, C ; Verify "relative branch carry" is taken.
HALT
E_ADD_54 HALT
L_ADD_54
RBRA E_ADD_55, X ; Verify "relative branch X" is not taken.
RBRA L_ADD_55, !X ; Verify "relative branch nonX" is taken.
HALT
E_ADD_55 HALT
L_ADD_55
RBRA E_ADD_56, !1 ; Verify "relative branch never" is not taken.
RBRA L_ADD_56, 1 ; Verify "relative branch always" is taken.
HALT
E_ADD_56 HALT
L_ADD_56
MOVE R14, R1 ; Verify status register: --001101
CMP 0x000D, R1
RBRA E_ADD_57, !Z
RBRA L_ADD_57, Z
HALT
E_ADD_57 HALT
L_ADD_57
CMP 0x0000, R0
RBRA E_ADD_58, !Z
RBRA L_ADD_58, Z
HALT
E_ADD_58 HALT
L_ADD_58
; Addition | V | N | Z | C | X | 1 |
; 0x7654 + 0x6543 = 0xDB97 | 1 | 1 | 0 | 0 | 0 | 1 | ADD_6
L_ADD_60 MOVE 0x7654, R0
ADD 0x6543, R0
RBRA E_ADD_61, !V ; Verify "relative branch nonoverflow" is not taken.
RBRA L_ADD_61, V ; Verify "relative branch overflow" is taken.
HALT
E_ADD_61 HALT
L_ADD_61
RBRA E_ADD_62, !N ; Verify "relative branch nonnegative" is not taken.
RBRA L_ADD_62, N ; Verify "relative branch negative" is taken.
HALT
E_ADD_62 HALT
L_ADD_62
RBRA E_ADD_63, Z ; Verify "relative branch zero" is not taken.
RBRA L_ADD_63, !Z ; Verify "relative branch nonzero" is taken.
HALT
E_ADD_63 HALT
L_ADD_63
RBRA E_ADD_64, C ; Verify "relative branch carry" is not taken.
RBRA L_ADD_64, !C ; Verify "relative branch noncarry" is taken.
HALT
E_ADD_64 HALT
L_ADD_64
RBRA E_ADD_65, X ; Verify "relative branch X" is not taken.
RBRA L_ADD_65, !X ; Verify "relative branch nonX" is taken.
HALT
E_ADD_65 HALT
L_ADD_65
RBRA E_ADD_66, !1 ; Verify "relative branch never" is not taken.
RBRA L_ADD_66 1 ; Verify "relative branch always" is taken.
HALT
E_ADD_66 HALT
L_ADD_66
MOVE R14, R1 ; Verify status register: --110001
CMP 0x0031, R1
RBRA E_ADD_67, !Z
RBRA L_ADD_67, Z
HALT
E_ADD_67 HALT
L_ADD_67
CMP 0xDB97, R0
RBRA E_ADD_68, !Z
RBRA L_ADD_68, Z
HALT
E_ADD_68 HALT
L_ADD_68
; ---------------------------------------------------------------------------
; Test the MOVE instruction doesnt change C and V flags.
L_MOVE_CV_00 MOVE 0x0000, R14 ; Clear all bits in the status register
MOVE 0x0000, R0 ; Perform a MOVE instruction
RBRA E_MOVE_CV_01, V ; Verify "relative branch overflow" is not taken.
RBRA L_MOVE_CV_01, !V ; Verify "relative branch nonoverflow" is taken.
HALT
E_MOVE_CV_01 HALT
L_MOVE_CV_01
RBRA E_MOVE_CV_02, C ; Verify "relative branch carry" is not taken.
RBRA L_MOVE_CV_02, !C ; Verify "relative branch noncarry" is taken.
HALT
E_MOVE_CV_02 HALT
L_MOVE_CV_02
L_MOVE_CV_10 MOVE 0x00FF, R14 ; Set all bits in the status register
MOVE 0x0000, R0 ; Perform a MOVE instruction
RBRA E_MOVE_CV_11, !V ; Verify "relative branch nonoverflow" is not taken.
RBRA L_MOVE_CV_11, V ; Verify "relative branch overflow" is taken.
HALT
E_MOVE_CV_11 HALT
L_MOVE_CV_11
RBRA E_MOVE_CV_12, !C ; Verify "relative branch noncarry" is not taken.
RBRA L_MOVE_CV_12, C ; Verify "relative branch carry" is taken.
HALT
E_MOVE_CV_12 HALT
L_MOVE_CV_12
; ---------------------------------------------------------------------------
; MOVE_MEM : Test the MOVE instruction to/from a memory address.
L_MOVE_MEM_00 MOVE VAL1234, R0
MOVE VAL4321, R1
MOVE BSS0, R2
MOVE BSS1, R3
MOVE @R0, R4 ; Now R4 contains 0x1234
MOVE @R1, R5 ; Now R5 contains 0x4321
CMP R4, 0x1234
RBRA E_MOVE_MEM_01, !Z
RBRA L_MOVE_MEM_01, Z
HALT
E_MOVE_MEM_01 HALT
L_MOVE_MEM_01
CMP R5, 0x4321
RBRA E_MOVE_MEM_02, !Z
RBRA L_MOVE_MEM_02, Z
HALT
E_MOVE_MEM_02 HALT
L_MOVE_MEM_02
MOVE R4, @R2 ; Now BSS0 contains 0x1234
MOVE R5, @R3 ; Now BSS1 contains 0x4321
CMP R4, 0x1234 ; R4 still contains 0x1234
RBRA E_MOVE_MEM_03, !Z
RBRA L_MOVE_MEM_03, Z
HALT
E_MOVE_MEM_03 HALT
L_MOVE_MEM_03
CMP R5, 0x4321 ; R5 still contains 0x4321
RBRA E_MOVE_MEM_04, !Z
RBRA L_MOVE_MEM_04, Z
HALT
E_MOVE_MEM_04 HALT
L_MOVE_MEM_04
MOVE @R2, R5 ; Now R5 contains 0x1234
MOVE @R3, R4 ; Now R4 contains 0x4321
CMP R5, 0x1234
RBRA E_MOVE_MEM_05, !Z
RBRA L_MOVE_MEM_05, Z
HALT
E_MOVE_MEM_05 HALT
L_MOVE_MEM_05
CMP R4, 0x4321
RBRA E_MOVE_MEM_06, !Z
RBRA L_MOVE_MEM_06, Z
HALT
E_MOVE_MEM_06 HALT
VAL1234 .DW 0x1234
VAL4321 .DW 0x4321
BSS0 .DW 0x0000
BSS1 .DW 0x0000