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instruction.go
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instruction.go
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package wasm
// Opcode is the binary Opcode of an instruction. See also InstructionName
type Opcode = byte
const (
// OpcodeUnreachable causes an unconditional trap.
OpcodeUnreachable Opcode = 0x00
// OpcodeNop does nothing
OpcodeNop Opcode = 0x01
// OpcodeBlock brackets a sequence of instructions. A branch instruction on an if label breaks out to after its
// OpcodeEnd.
OpcodeBlock Opcode = 0x02
// OpcodeLoop brackets a sequence of instructions. A branch instruction on a loop label will jump back to the
// beginning of its block.
OpcodeLoop Opcode = 0x03
// OpcodeIf brackets a sequence of instructions. When the top of the stack evaluates to 1, the block is executed.
// Zero jumps to the optional OpcodeElse. A branch instruction on an if label breaks out to after its OpcodeEnd.
OpcodeIf Opcode = 0x04
// OpcodeElse brackets a sequence of instructions enclosed by an OpcodeIf. A branch instruction on a then label
// breaks out to after the OpcodeEnd on the enclosing OpcodeIf.
OpcodeElse Opcode = 0x05
// OpcodeEnd terminates a control instruction OpcodeBlock, OpcodeLoop or OpcodeIf.
OpcodeEnd Opcode = 0x0b
// OpcodeBr is a stack-polymorphic opcode that performs an unconditional branch. How the stack is modified depends
// on whether the "br" is enclosed by a loop, and if CoreFeatureMultiValue is enabled.
//
// Here are the rules in pseudocode about how the stack is modified based on the "br" operand L (label):
// if L is loop: append(L.originalStackWithoutInputs, N-values popped from the stack) where N == L.inputs
// else: append(L.originalStackWithoutInputs, N-values popped from the stack) where N == L.results
//
// In WebAssembly 1.0 (20191205), N can be zero or one. When CoreFeatureMultiValue is enabled, N can be more than one,
// depending on the type use of the label L.
//
// See https://www.w3.org/TR/2019/REC-wasm-core-1-20191205/#-hrefsyntax-instr-controlmathsfbrl
OpcodeBr Opcode = 0x0c
OpcodeBrIf Opcode = 0x0d
OpcodeBrTable Opcode = 0x0e
OpcodeReturn Opcode = 0x0f
OpcodeCall Opcode = 0x10
OpcodeCallIndirect Opcode = 0x11
// parametric instructions
OpcodeDrop Opcode = 0x1a
OpcodeSelect Opcode = 0x1b
OpcodeTypedSelect Opcode = 0x1c
// variable instructions
OpcodeLocalGet Opcode = 0x20
OpcodeLocalSet Opcode = 0x21
OpcodeLocalTee Opcode = 0x22
OpcodeGlobalGet Opcode = 0x23
OpcodeGlobalSet Opcode = 0x24
// Below are toggled with CoreFeatureReferenceTypes
OpcodeTableGet Opcode = 0x25
OpcodeTableSet Opcode = 0x26
// memory instructions
OpcodeI32Load Opcode = 0x28
OpcodeI64Load Opcode = 0x29
OpcodeF32Load Opcode = 0x2a
OpcodeF64Load Opcode = 0x2b
OpcodeI32Load8S Opcode = 0x2c
OpcodeI32Load8U Opcode = 0x2d
OpcodeI32Load16S Opcode = 0x2e
OpcodeI32Load16U Opcode = 0x2f
OpcodeI64Load8S Opcode = 0x30
OpcodeI64Load8U Opcode = 0x31
OpcodeI64Load16S Opcode = 0x32
OpcodeI64Load16U Opcode = 0x33
OpcodeI64Load32S Opcode = 0x34
OpcodeI64Load32U Opcode = 0x35
OpcodeI32Store Opcode = 0x36
OpcodeI64Store Opcode = 0x37
OpcodeF32Store Opcode = 0x38
OpcodeF64Store Opcode = 0x39
OpcodeI32Store8 Opcode = 0x3a
OpcodeI32Store16 Opcode = 0x3b
OpcodeI64Store8 Opcode = 0x3c
OpcodeI64Store16 Opcode = 0x3d
OpcodeI64Store32 Opcode = 0x3e
OpcodeMemorySize Opcode = 0x3f
OpcodeMemoryGrow Opcode = 0x40
// const instructions
OpcodeI32Const Opcode = 0x41
OpcodeI64Const Opcode = 0x42
OpcodeF32Const Opcode = 0x43
OpcodeF64Const Opcode = 0x44
// numeric instructions
OpcodeI32Eqz Opcode = 0x45
OpcodeI32Eq Opcode = 0x46
OpcodeI32Ne Opcode = 0x47
OpcodeI32LtS Opcode = 0x48
OpcodeI32LtU Opcode = 0x49
OpcodeI32GtS Opcode = 0x4a
OpcodeI32GtU Opcode = 0x4b
OpcodeI32LeS Opcode = 0x4c
OpcodeI32LeU Opcode = 0x4d
OpcodeI32GeS Opcode = 0x4e
OpcodeI32GeU Opcode = 0x4f
OpcodeI64Eqz Opcode = 0x50
OpcodeI64Eq Opcode = 0x51
OpcodeI64Ne Opcode = 0x52
OpcodeI64LtS Opcode = 0x53
OpcodeI64LtU Opcode = 0x54
OpcodeI64GtS Opcode = 0x55
OpcodeI64GtU Opcode = 0x56
OpcodeI64LeS Opcode = 0x57
OpcodeI64LeU Opcode = 0x58
OpcodeI64GeS Opcode = 0x59
OpcodeI64GeU Opcode = 0x5a
OpcodeF32Eq Opcode = 0x5b
OpcodeF32Ne Opcode = 0x5c
OpcodeF32Lt Opcode = 0x5d
OpcodeF32Gt Opcode = 0x5e
OpcodeF32Le Opcode = 0x5f
OpcodeF32Ge Opcode = 0x60
OpcodeF64Eq Opcode = 0x61
OpcodeF64Ne Opcode = 0x62
OpcodeF64Lt Opcode = 0x63
OpcodeF64Gt Opcode = 0x64
OpcodeF64Le Opcode = 0x65
OpcodeF64Ge Opcode = 0x66
OpcodeI32Clz Opcode = 0x67
OpcodeI32Ctz Opcode = 0x68
OpcodeI32Popcnt Opcode = 0x69
OpcodeI32Add Opcode = 0x6a
OpcodeI32Sub Opcode = 0x6b
OpcodeI32Mul Opcode = 0x6c
OpcodeI32DivS Opcode = 0x6d
OpcodeI32DivU Opcode = 0x6e
OpcodeI32RemS Opcode = 0x6f
OpcodeI32RemU Opcode = 0x70
OpcodeI32And Opcode = 0x71
OpcodeI32Or Opcode = 0x72
OpcodeI32Xor Opcode = 0x73
OpcodeI32Shl Opcode = 0x74
OpcodeI32ShrS Opcode = 0x75
OpcodeI32ShrU Opcode = 0x76
OpcodeI32Rotl Opcode = 0x77
OpcodeI32Rotr Opcode = 0x78
OpcodeI64Clz Opcode = 0x79
OpcodeI64Ctz Opcode = 0x7a
OpcodeI64Popcnt Opcode = 0x7b
OpcodeI64Add Opcode = 0x7c
OpcodeI64Sub Opcode = 0x7d
OpcodeI64Mul Opcode = 0x7e
OpcodeI64DivS Opcode = 0x7f
OpcodeI64DivU Opcode = 0x80
OpcodeI64RemS Opcode = 0x81
OpcodeI64RemU Opcode = 0x82
OpcodeI64And Opcode = 0x83
OpcodeI64Or Opcode = 0x84
OpcodeI64Xor Opcode = 0x85
OpcodeI64Shl Opcode = 0x86
OpcodeI64ShrS Opcode = 0x87
OpcodeI64ShrU Opcode = 0x88
OpcodeI64Rotl Opcode = 0x89
OpcodeI64Rotr Opcode = 0x8a
OpcodeF32Abs Opcode = 0x8b
OpcodeF32Neg Opcode = 0x8c
OpcodeF32Ceil Opcode = 0x8d
OpcodeF32Floor Opcode = 0x8e
OpcodeF32Trunc Opcode = 0x8f
OpcodeF32Nearest Opcode = 0x90
OpcodeF32Sqrt Opcode = 0x91
OpcodeF32Add Opcode = 0x92
OpcodeF32Sub Opcode = 0x93
OpcodeF32Mul Opcode = 0x94
OpcodeF32Div Opcode = 0x95
OpcodeF32Min Opcode = 0x96
OpcodeF32Max Opcode = 0x97
OpcodeF32Copysign Opcode = 0x98
OpcodeF64Abs Opcode = 0x99
OpcodeF64Neg Opcode = 0x9a
OpcodeF64Ceil Opcode = 0x9b
OpcodeF64Floor Opcode = 0x9c
OpcodeF64Trunc Opcode = 0x9d
OpcodeF64Nearest Opcode = 0x9e
OpcodeF64Sqrt Opcode = 0x9f
OpcodeF64Add Opcode = 0xa0
OpcodeF64Sub Opcode = 0xa1
OpcodeF64Mul Opcode = 0xa2
OpcodeF64Div Opcode = 0xa3
OpcodeF64Min Opcode = 0xa4
OpcodeF64Max Opcode = 0xa5
OpcodeF64Copysign Opcode = 0xa6
OpcodeI32WrapI64 Opcode = 0xa7
OpcodeI32TruncF32S Opcode = 0xa8
OpcodeI32TruncF32U Opcode = 0xa9
OpcodeI32TruncF64S Opcode = 0xaa
OpcodeI32TruncF64U Opcode = 0xab
OpcodeI64ExtendI32S Opcode = 0xac
OpcodeI64ExtendI32U Opcode = 0xad
OpcodeI64TruncF32S Opcode = 0xae
OpcodeI64TruncF32U Opcode = 0xaf
OpcodeI64TruncF64S Opcode = 0xb0
OpcodeI64TruncF64U Opcode = 0xb1
OpcodeF32ConvertI32S Opcode = 0xb2
OpcodeF32ConvertI32U Opcode = 0xb3
OpcodeF32ConvertI64S Opcode = 0xb4
OpcodeF32ConvertI64U Opcode = 0xb5
OpcodeF32DemoteF64 Opcode = 0xb6
OpcodeF64ConvertI32S Opcode = 0xb7
OpcodeF64ConvertI32U Opcode = 0xb8
OpcodeF64ConvertI64S Opcode = 0xb9
OpcodeF64ConvertI64U Opcode = 0xba
OpcodeF64PromoteF32 Opcode = 0xbb
OpcodeI32ReinterpretF32 Opcode = 0xbc
OpcodeI64ReinterpretF64 Opcode = 0xbd
OpcodeF32ReinterpretI32 Opcode = 0xbe
OpcodeF64ReinterpretI64 Opcode = 0xbf
// OpcodeRefNull pushes a null reference value whose type is specified by immediate to this opcode.
// This is defined in the reference-types proposal, but necessary for CoreFeatureBulkMemoryOperations as well.
//
// Currently only supported in the constant expression in element segments.
OpcodeRefNull = 0xd0
// OpcodeRefIsNull pops a reference value, and pushes 1 if it is null, 0 otherwise.
// This is defined in the reference-types proposal, but necessary for CoreFeatureBulkMemoryOperations as well.
//
// Currently not supported.
OpcodeRefIsNull = 0xd1
// OpcodeRefFunc pushes a funcref value whose index equals the immediate to this opcode.
// This is defined in the reference-types proposal, but necessary for CoreFeatureBulkMemoryOperations as well.
//
// Currently, this is only supported in the constant expression in element segments.
OpcodeRefFunc = 0xd2
// Below are toggled with CoreFeatureSignExtensionOps
// OpcodeI32Extend8S extends a signed 8-bit integer to a 32-bit integer.
// Note: This is dependent on the flag CoreFeatureSignExtensionOps
OpcodeI32Extend8S Opcode = 0xc0
// OpcodeI32Extend16S extends a signed 16-bit integer to a 32-bit integer.
// Note: This is dependent on the flag CoreFeatureSignExtensionOps
OpcodeI32Extend16S Opcode = 0xc1
// OpcodeI64Extend8S extends a signed 8-bit integer to a 64-bit integer.
// Note: This is dependent on the flag CoreFeatureSignExtensionOps
OpcodeI64Extend8S Opcode = 0xc2
// OpcodeI64Extend16S extends a signed 16-bit integer to a 64-bit integer.
// Note: This is dependent on the flag CoreFeatureSignExtensionOps
OpcodeI64Extend16S Opcode = 0xc3
// OpcodeI64Extend32S extends a signed 32-bit integer to a 64-bit integer.
// Note: This is dependent on the flag CoreFeatureSignExtensionOps
OpcodeI64Extend32S Opcode = 0xc4
// OpcodeMiscPrefix is the prefix of various multi-byte opcodes.
// Introduced in CoreFeatureNonTrappingFloatToIntConversion, but used in other
// features, such as CoreFeatureBulkMemoryOperations.
OpcodeMiscPrefix Opcode = 0xfc
// OpcodeVecPrefix is the prefix of all vector isntructions introduced in
// CoreFeatureSIMD.
OpcodeVecPrefix Opcode = 0xfd
// OpcodeAtomicPrefix is the prefix of all atomic instructions introduced in
// CoreFeatureThreads.
OpcodeAtomicPrefix Opcode = 0xfe
)
// OpcodeMisc represents opcodes of the miscellaneous operations.
// Such an operations has multi-byte encoding which is prefixed by OpcodeMiscPrefix.
type OpcodeMisc = byte
const (
// Below are toggled with CoreFeatureNonTrappingFloatToIntConversion.
// https://github.com/WebAssembly/spec/blob/ce4b6c4d47eb06098cc7ab2e81f24748da822f20/proposals/nontrapping-float-to-int-conversion/Overview.md
OpcodeMiscI32TruncSatF32S OpcodeMisc = 0x00
OpcodeMiscI32TruncSatF32U OpcodeMisc = 0x01
OpcodeMiscI32TruncSatF64S OpcodeMisc = 0x02
OpcodeMiscI32TruncSatF64U OpcodeMisc = 0x03
OpcodeMiscI64TruncSatF32S OpcodeMisc = 0x04
OpcodeMiscI64TruncSatF32U OpcodeMisc = 0x05
OpcodeMiscI64TruncSatF64S OpcodeMisc = 0x06
OpcodeMiscI64TruncSatF64U OpcodeMisc = 0x07
// Below are toggled with CoreFeatureBulkMemoryOperations.
// Opcodes are those new in document/core/appendix/index-instructions.rst (the commit that merged the feature).
// See https://github.com/WebAssembly/spec/commit/7fa2f20a6df4cf1c114582c8cb60f5bfcdbf1be1
// See https://www.w3.org/TR/2022/WD-wasm-core-2-20220419/appendix/changes.html#bulk-memory-and-table-instructions
OpcodeMiscMemoryInit OpcodeMisc = 0x08
OpcodeMiscDataDrop OpcodeMisc = 0x09
OpcodeMiscMemoryCopy OpcodeMisc = 0x0a
OpcodeMiscMemoryFill OpcodeMisc = 0x0b
OpcodeMiscTableInit OpcodeMisc = 0x0c
OpcodeMiscElemDrop OpcodeMisc = 0x0d
OpcodeMiscTableCopy OpcodeMisc = 0x0e
// Below are toggled with CoreFeatureReferenceTypes
OpcodeMiscTableGrow OpcodeMisc = 0x0f
OpcodeMiscTableSize OpcodeMisc = 0x10
OpcodeMiscTableFill OpcodeMisc = 0x11
)
// OpcodeVec represents an opcode of a vector instructions which has
// multi-byte encoding and is prefixed by OpcodeMiscPrefix.
//
// These opcodes are toggled with CoreFeatureSIMD.
type OpcodeVec = byte
const (
// Loads and stores.
OpcodeVecV128Load OpcodeVec = 0x00
OpcodeVecV128Load8x8s OpcodeVec = 0x01
OpcodeVecV128Load8x8u OpcodeVec = 0x02
OpcodeVecV128Load16x4s OpcodeVec = 0x03
OpcodeVecV128Load16x4u OpcodeVec = 0x04
OpcodeVecV128Load32x2s OpcodeVec = 0x05
OpcodeVecV128Load32x2u OpcodeVec = 0x06
OpcodeVecV128Load8Splat OpcodeVec = 0x07
OpcodeVecV128Load16Splat OpcodeVec = 0x08
OpcodeVecV128Load32Splat OpcodeVec = 0x09
OpcodeVecV128Load64Splat OpcodeVec = 0x0a
OpcodeVecV128Load32zero OpcodeVec = 0x5c
OpcodeVecV128Load64zero OpcodeVec = 0x5d
OpcodeVecV128Store OpcodeVec = 0x0b
OpcodeVecV128Load8Lane OpcodeVec = 0x54
OpcodeVecV128Load16Lane OpcodeVec = 0x55
OpcodeVecV128Load32Lane OpcodeVec = 0x56
OpcodeVecV128Load64Lane OpcodeVec = 0x57
OpcodeVecV128Store8Lane OpcodeVec = 0x58
OpcodeVecV128Store16Lane OpcodeVec = 0x59
OpcodeVecV128Store32Lane OpcodeVec = 0x5a
OpcodeVecV128Store64Lane OpcodeVec = 0x5b
// OpcodeVecV128Const is the vector const instruction.
OpcodeVecV128Const OpcodeVec = 0x0c
// OpcodeVecV128i8x16Shuffle is the vector shuffle instruction.
OpcodeVecV128i8x16Shuffle OpcodeVec = 0x0d
// Extrac and replaces.
OpcodeVecI8x16ExtractLaneS OpcodeVec = 0x15
OpcodeVecI8x16ExtractLaneU OpcodeVec = 0x16
OpcodeVecI8x16ReplaceLane OpcodeVec = 0x17
OpcodeVecI16x8ExtractLaneS OpcodeVec = 0x18
OpcodeVecI16x8ExtractLaneU OpcodeVec = 0x19
OpcodeVecI16x8ReplaceLane OpcodeVec = 0x1a
OpcodeVecI32x4ExtractLane OpcodeVec = 0x1b
OpcodeVecI32x4ReplaceLane OpcodeVec = 0x1c
OpcodeVecI64x2ExtractLane OpcodeVec = 0x1d
OpcodeVecI64x2ReplaceLane OpcodeVec = 0x1e
OpcodeVecF32x4ExtractLane OpcodeVec = 0x1f
OpcodeVecF32x4ReplaceLane OpcodeVec = 0x20
OpcodeVecF64x2ExtractLane OpcodeVec = 0x21
OpcodeVecF64x2ReplaceLane OpcodeVec = 0x22
// Splat and swizzle.
OpcodeVecI8x16Swizzle OpcodeVec = 0x0e
OpcodeVecI8x16Splat OpcodeVec = 0x0f
OpcodeVecI16x8Splat OpcodeVec = 0x10
OpcodeVecI32x4Splat OpcodeVec = 0x11
OpcodeVecI64x2Splat OpcodeVec = 0x12
OpcodeVecF32x4Splat OpcodeVec = 0x13
OpcodeVecF64x2Splat OpcodeVec = 0x14
// i8 comparisons.
OpcodeVecI8x16Eq OpcodeVec = 0x23
OpcodeVecI8x16Ne OpcodeVec = 0x24
OpcodeVecI8x16LtS OpcodeVec = 0x25
OpcodeVecI8x16LtU OpcodeVec = 0x26
OpcodeVecI8x16GtS OpcodeVec = 0x27
OpcodeVecI8x16GtU OpcodeVec = 0x28
OpcodeVecI8x16LeS OpcodeVec = 0x29
OpcodeVecI8x16LeU OpcodeVec = 0x2a
OpcodeVecI8x16GeS OpcodeVec = 0x2b
OpcodeVecI8x16GeU OpcodeVec = 0x2c
// i16 comparisons.
OpcodeVecI16x8Eq OpcodeVec = 0x2d
OpcodeVecI16x8Ne OpcodeVec = 0x2e
OpcodeVecI16x8LtS OpcodeVec = 0x2f
OpcodeVecI16x8LtU OpcodeVec = 0x30
OpcodeVecI16x8GtS OpcodeVec = 0x31
OpcodeVecI16x8GtU OpcodeVec = 0x32
OpcodeVecI16x8LeS OpcodeVec = 0x33
OpcodeVecI16x8LeU OpcodeVec = 0x34
OpcodeVecI16x8GeS OpcodeVec = 0x35
OpcodeVecI16x8GeU OpcodeVec = 0x36
// i32 comparisons.
OpcodeVecI32x4Eq OpcodeVec = 0x37
OpcodeVecI32x4Ne OpcodeVec = 0x38
OpcodeVecI32x4LtS OpcodeVec = 0x39
OpcodeVecI32x4LtU OpcodeVec = 0x3a
OpcodeVecI32x4GtS OpcodeVec = 0x3b
OpcodeVecI32x4GtU OpcodeVec = 0x3c
OpcodeVecI32x4LeS OpcodeVec = 0x3d
OpcodeVecI32x4LeU OpcodeVec = 0x3e
OpcodeVecI32x4GeS OpcodeVec = 0x3f
OpcodeVecI32x4GeU OpcodeVec = 0x40
// i64 comparisons.
OpcodeVecI64x2Eq OpcodeVec = 0xd6
OpcodeVecI64x2Ne OpcodeVec = 0xd7
OpcodeVecI64x2LtS OpcodeVec = 0xd8
OpcodeVecI64x2GtS OpcodeVec = 0xd9
OpcodeVecI64x2LeS OpcodeVec = 0xda
OpcodeVecI64x2GeS OpcodeVec = 0xdb
// f32 comparisons.
OpcodeVecF32x4Eq OpcodeVec = 0x41
OpcodeVecF32x4Ne OpcodeVec = 0x42
OpcodeVecF32x4Lt OpcodeVec = 0x43
OpcodeVecF32x4Gt OpcodeVec = 0x44
OpcodeVecF32x4Le OpcodeVec = 0x45
OpcodeVecF32x4Ge OpcodeVec = 0x46
// f64 comparisons.
OpcodeVecF64x2Eq OpcodeVec = 0x47
OpcodeVecF64x2Ne OpcodeVec = 0x48
OpcodeVecF64x2Lt OpcodeVec = 0x49
OpcodeVecF64x2Gt OpcodeVec = 0x4a
OpcodeVecF64x2Le OpcodeVec = 0x4b
OpcodeVecF64x2Ge OpcodeVec = 0x4c
// v128 logical instructions.
OpcodeVecV128Not OpcodeVec = 0x4d
OpcodeVecV128And OpcodeVec = 0x4e
OpcodeVecV128AndNot OpcodeVec = 0x4f
OpcodeVecV128Or OpcodeVec = 0x50
OpcodeVecV128Xor OpcodeVec = 0x51
OpcodeVecV128Bitselect OpcodeVec = 0x52
OpcodeVecV128AnyTrue OpcodeVec = 0x53
// i8 misc.
OpcodeVecI8x16Abs OpcodeVec = 0x60
OpcodeVecI8x16Neg OpcodeVec = 0x61
OpcodeVecI8x16Popcnt OpcodeVec = 0x62
OpcodeVecI8x16AllTrue OpcodeVec = 0x63
OpcodeVecI8x16BitMask OpcodeVec = 0x64
OpcodeVecI8x16NarrowI16x8S OpcodeVec = 0x65
OpcodeVecI8x16NarrowI16x8U OpcodeVec = 0x66
OpcodeVecI8x16Shl OpcodeVec = 0x6b
OpcodeVecI8x16ShrS OpcodeVec = 0x6c
OpcodeVecI8x16ShrU OpcodeVec = 0x6d
OpcodeVecI8x16Add OpcodeVec = 0x6e
OpcodeVecI8x16AddSatS OpcodeVec = 0x6f
OpcodeVecI8x16AddSatU OpcodeVec = 0x70
OpcodeVecI8x16Sub OpcodeVec = 0x71
OpcodeVecI8x16SubSatS OpcodeVec = 0x72
OpcodeVecI8x16SubSatU OpcodeVec = 0x73
OpcodeVecI8x16MinS OpcodeVec = 0x76
OpcodeVecI8x16MinU OpcodeVec = 0x77
OpcodeVecI8x16MaxS OpcodeVec = 0x78
OpcodeVecI8x16MaxU OpcodeVec = 0x79
OpcodeVecI8x16AvgrU OpcodeVec = 0x7b
// i16 misc.
OpcodeVecI16x8ExtaddPairwiseI8x16S OpcodeVec = 0x7c
OpcodeVecI16x8ExtaddPairwiseI8x16U OpcodeVec = 0x7d
OpcodeVecI16x8Abs OpcodeVec = 0x80
OpcodeVecI16x8Neg OpcodeVec = 0x81
OpcodeVecI16x8Q15mulrSatS OpcodeVec = 0x82
OpcodeVecI16x8AllTrue OpcodeVec = 0x83
OpcodeVecI16x8BitMask OpcodeVec = 0x84
OpcodeVecI16x8NarrowI32x4S OpcodeVec = 0x85
OpcodeVecI16x8NarrowI32x4U OpcodeVec = 0x86
OpcodeVecI16x8ExtendLowI8x16S OpcodeVec = 0x87
OpcodeVecI16x8ExtendHighI8x16S OpcodeVec = 0x88
OpcodeVecI16x8ExtendLowI8x16U OpcodeVec = 0x89
OpcodeVecI16x8ExtendHighI8x16U OpcodeVec = 0x8a
OpcodeVecI16x8Shl OpcodeVec = 0x8b
OpcodeVecI16x8ShrS OpcodeVec = 0x8c
OpcodeVecI16x8ShrU OpcodeVec = 0x8d
OpcodeVecI16x8Add OpcodeVec = 0x8e
OpcodeVecI16x8AddSatS OpcodeVec = 0x8f
OpcodeVecI16x8AddSatU OpcodeVec = 0x90
OpcodeVecI16x8Sub OpcodeVec = 0x91
OpcodeVecI16x8SubSatS OpcodeVec = 0x92
OpcodeVecI16x8SubSatU OpcodeVec = 0x93
OpcodeVecI16x8Mul OpcodeVec = 0x95
OpcodeVecI16x8MinS OpcodeVec = 0x96
OpcodeVecI16x8MinU OpcodeVec = 0x97
OpcodeVecI16x8MaxS OpcodeVec = 0x98
OpcodeVecI16x8MaxU OpcodeVec = 0x99
OpcodeVecI16x8AvgrU OpcodeVec = 0x9b
OpcodeVecI16x8ExtMulLowI8x16S OpcodeVec = 0x9c
OpcodeVecI16x8ExtMulHighI8x16S OpcodeVec = 0x9d
OpcodeVecI16x8ExtMulLowI8x16U OpcodeVec = 0x9e
OpcodeVecI16x8ExtMulHighI8x16U OpcodeVec = 0x9f
// i32 misc.
OpcodeVecI32x4ExtaddPairwiseI16x8S OpcodeVec = 0x7e
OpcodeVecI32x4ExtaddPairwiseI16x8U OpcodeVec = 0x7f
OpcodeVecI32x4Abs OpcodeVec = 0xa0
OpcodeVecI32x4Neg OpcodeVec = 0xa1
OpcodeVecI32x4AllTrue OpcodeVec = 0xa3
OpcodeVecI32x4BitMask OpcodeVec = 0xa4
OpcodeVecI32x4ExtendLowI16x8S OpcodeVec = 0xa7
OpcodeVecI32x4ExtendHighI16x8S OpcodeVec = 0xa8
OpcodeVecI32x4ExtendLowI16x8U OpcodeVec = 0xa9
OpcodeVecI32x4ExtendHighI16x8U OpcodeVec = 0xaa
OpcodeVecI32x4Shl OpcodeVec = 0xab
OpcodeVecI32x4ShrS OpcodeVec = 0xac
OpcodeVecI32x4ShrU OpcodeVec = 0xad
OpcodeVecI32x4Add OpcodeVec = 0xae
OpcodeVecI32x4Sub OpcodeVec = 0xb1
OpcodeVecI32x4Mul OpcodeVec = 0xb5
OpcodeVecI32x4MinS OpcodeVec = 0xb6
OpcodeVecI32x4MinU OpcodeVec = 0xb7
OpcodeVecI32x4MaxS OpcodeVec = 0xb8
OpcodeVecI32x4MaxU OpcodeVec = 0xb9
OpcodeVecI32x4DotI16x8S OpcodeVec = 0xba
OpcodeVecI32x4ExtMulLowI16x8S OpcodeVec = 0xbc
OpcodeVecI32x4ExtMulHighI16x8S OpcodeVec = 0xbd
OpcodeVecI32x4ExtMulLowI16x8U OpcodeVec = 0xbe
OpcodeVecI32x4ExtMulHighI16x8U OpcodeVec = 0xbf
// i64 misc.
OpcodeVecI64x2Abs OpcodeVec = 0xc0
OpcodeVecI64x2Neg OpcodeVec = 0xc1
OpcodeVecI64x2AllTrue OpcodeVec = 0xc3
OpcodeVecI64x2BitMask OpcodeVec = 0xc4
OpcodeVecI64x2ExtendLowI32x4S OpcodeVec = 0xc7
OpcodeVecI64x2ExtendHighI32x4S OpcodeVec = 0xc8
OpcodeVecI64x2ExtendLowI32x4U OpcodeVec = 0xc9
OpcodeVecI64x2ExtendHighI32x4U OpcodeVec = 0xca
OpcodeVecI64x2Shl OpcodeVec = 0xcb
OpcodeVecI64x2ShrS OpcodeVec = 0xcc
OpcodeVecI64x2ShrU OpcodeVec = 0xcd
OpcodeVecI64x2Add OpcodeVec = 0xce
OpcodeVecI64x2Sub OpcodeVec = 0xd1
OpcodeVecI64x2Mul OpcodeVec = 0xd5
OpcodeVecI64x2ExtMulLowI32x4S OpcodeVec = 0xdc
OpcodeVecI64x2ExtMulHighI32x4S OpcodeVec = 0xdd
OpcodeVecI64x2ExtMulLowI32x4U OpcodeVec = 0xde
OpcodeVecI64x2ExtMulHighI32x4U OpcodeVec = 0xdf
// f32 misc.
OpcodeVecF32x4Ceil OpcodeVec = 0x67
OpcodeVecF32x4Floor OpcodeVec = 0x68
OpcodeVecF32x4Trunc OpcodeVec = 0x69
OpcodeVecF32x4Nearest OpcodeVec = 0x6a
OpcodeVecF32x4Abs OpcodeVec = 0xe0
OpcodeVecF32x4Neg OpcodeVec = 0xe1
OpcodeVecF32x4Sqrt OpcodeVec = 0xe3
OpcodeVecF32x4Add OpcodeVec = 0xe4
OpcodeVecF32x4Sub OpcodeVec = 0xe5
OpcodeVecF32x4Mul OpcodeVec = 0xe6
OpcodeVecF32x4Div OpcodeVec = 0xe7
OpcodeVecF32x4Min OpcodeVec = 0xe8
OpcodeVecF32x4Max OpcodeVec = 0xe9
OpcodeVecF32x4Pmin OpcodeVec = 0xea
OpcodeVecF32x4Pmax OpcodeVec = 0xeb
// f64 misc.
OpcodeVecF64x2Ceil OpcodeVec = 0x74
OpcodeVecF64x2Floor OpcodeVec = 0x75
OpcodeVecF64x2Trunc OpcodeVec = 0x7a
OpcodeVecF64x2Nearest OpcodeVec = 0x94
OpcodeVecF64x2Abs OpcodeVec = 0xec
OpcodeVecF64x2Neg OpcodeVec = 0xed
OpcodeVecF64x2Sqrt OpcodeVec = 0xef
OpcodeVecF64x2Add OpcodeVec = 0xf0
OpcodeVecF64x2Sub OpcodeVec = 0xf1
OpcodeVecF64x2Mul OpcodeVec = 0xf2
OpcodeVecF64x2Div OpcodeVec = 0xf3
OpcodeVecF64x2Min OpcodeVec = 0xf4
OpcodeVecF64x2Max OpcodeVec = 0xf5
OpcodeVecF64x2Pmin OpcodeVec = 0xf6
OpcodeVecF64x2Pmax OpcodeVec = 0xf7
// conversions.
OpcodeVecI32x4TruncSatF32x4S OpcodeVec = 0xf8
OpcodeVecI32x4TruncSatF32x4U OpcodeVec = 0xf9
OpcodeVecF32x4ConvertI32x4S OpcodeVec = 0xfa
OpcodeVecF32x4ConvertI32x4U OpcodeVec = 0xfb
OpcodeVecI32x4TruncSatF64x2SZero OpcodeVec = 0xfc
OpcodeVecI32x4TruncSatF64x2UZero OpcodeVec = 0xfd
OpcodeVecF64x2ConvertLowI32x4S OpcodeVec = 0xfe
OpcodeVecF64x2ConvertLowI32x4U OpcodeVec = 0xff
OpcodeVecF32x4DemoteF64x2Zero OpcodeVec = 0x5e
OpcodeVecF64x2PromoteLowF32x4Zero OpcodeVec = 0x5f
)
// OpcodeAtomic represents an opcode of atomic instructions which has
// multi-byte encoding and is prefixed by OpcodeAtomicPrefix.
//
// These opcodes are toggled with CoreFeaturesThreads.
type OpcodeAtomic = byte
const (
// OpcodeAtomicMemoryNotify represents the instruction memory.atomic.notify.
OpcodeAtomicMemoryNotify OpcodeAtomic = 0x00
// OpcodeAtomicMemoryWait32 represents the instruction memory.atomic.wait32.
OpcodeAtomicMemoryWait32 OpcodeAtomic = 0x01
// OpcodeAtomicMemoryWait64 represents the instruction memory.atomic.wait64.
OpcodeAtomicMemoryWait64 OpcodeAtomic = 0x02
// OpcodeAtomicFence represents the instruction atomic.fence.
OpcodeAtomicFence OpcodeAtomic = 0x03
// OpcodeAtomicI32Load represents the instruction i32.atomic.load.
OpcodeAtomicI32Load OpcodeAtomic = 0x10
// OpcodeAtomicI64Load represents the instruction i64.atomic.load.
OpcodeAtomicI64Load OpcodeAtomic = 0x11
// OpcodeAtomicI32Load8U represents the instruction i32.atomic.load8_u.
OpcodeAtomicI32Load8U OpcodeAtomic = 0x12
// OpcodeAtomicI32Load16U represents the instruction i32.atomic.load16_u.
OpcodeAtomicI32Load16U OpcodeAtomic = 0x13
// OpcodeAtomicI64Load8U represents the instruction i64.atomic.load8_u.
OpcodeAtomicI64Load8U OpcodeAtomic = 0x14
// OpcodeAtomicI64Load16U represents the instruction i64.atomic.load16_u.
OpcodeAtomicI64Load16U OpcodeAtomic = 0x15
// OpcodeAtomicI64Load32U represents the instruction i64.atomic.load32_u.
OpcodeAtomicI64Load32U OpcodeAtomic = 0x16
// OpcodeAtomicI32Store represents the instruction i32.atomic.store.
OpcodeAtomicI32Store OpcodeAtomic = 0x17
// OpcodeAtomicI64Store represents the instruction i64.atomic.store.
OpcodeAtomicI64Store OpcodeAtomic = 0x18
// OpcodeAtomicI32Store8 represents the instruction i32.atomic.store8.
OpcodeAtomicI32Store8 OpcodeAtomic = 0x19
// OpcodeAtomicI32Store16 represents the instruction i32.atomic.store16.
OpcodeAtomicI32Store16 OpcodeAtomic = 0x1a
// OpcodeAtomicI64Store8 represents the instruction i64.atomic.store8.
OpcodeAtomicI64Store8 OpcodeAtomic = 0x1b
// OpcodeAtomicI64Store16 represents the instruction i64.atomic.store16.
OpcodeAtomicI64Store16 OpcodeAtomic = 0x1c
// OpcodeAtomicI64Store32 represents the instruction i64.atomic.store32.
OpcodeAtomicI64Store32 OpcodeAtomic = 0x1d
// OpcodeAtomicI32RmwAdd represents the instruction i32.atomic.rmw.add.
OpcodeAtomicI32RmwAdd OpcodeAtomic = 0x1e
// OpcodeAtomicI64RmwAdd represents the instruction i64.atomic.rmw.add.
OpcodeAtomicI64RmwAdd OpcodeAtomic = 0x1f
// OpcodeAtomicI32Rmw8AddU represents the instruction i32.atomic.rmw8.add_u.
OpcodeAtomicI32Rmw8AddU OpcodeAtomic = 0x20
// OpcodeAtomicI32Rmw16AddU represents the instruction i32.atomic.rmw16.add_u.
OpcodeAtomicI32Rmw16AddU OpcodeAtomic = 0x21
// OpcodeAtomicI64Rmw8AddU represents the instruction i64.atomic.rmw8.add_u.
OpcodeAtomicI64Rmw8AddU OpcodeAtomic = 0x22
// OpcodeAtomicI64Rmw16AddU represents the instruction i64.atomic.rmw16.add_u.
OpcodeAtomicI64Rmw16AddU OpcodeAtomic = 0x23
// OpcodeAtomicI64Rmw32AddU represents the instruction i64.atomic.rmw32.add_u.
OpcodeAtomicI64Rmw32AddU OpcodeAtomic = 0x24
// OpcodeAtomicI32RmwSub represents the instruction i32.atomic.rmw.sub.
OpcodeAtomicI32RmwSub OpcodeAtomic = 0x25
// OpcodeAtomicI64RmwSub represents the instruction i64.atomic.rmw.sub.
OpcodeAtomicI64RmwSub OpcodeAtomic = 0x26
// OpcodeAtomicI32Rmw8SubU represents the instruction i32.atomic.rmw8.sub_u.
OpcodeAtomicI32Rmw8SubU OpcodeAtomic = 0x27
// OpcodeAtomicI32Rmw16SubU represents the instruction i32.atomic.rmw16.sub_u.
OpcodeAtomicI32Rmw16SubU OpcodeAtomic = 0x28
// OpcodeAtomicI64Rmw8SubU represents the instruction i64.atomic.rmw8.sub_u.
OpcodeAtomicI64Rmw8SubU OpcodeAtomic = 0x29
// OpcodeAtomicI64Rmw16SubU represents the instruction i64.atomic.rmw16.sub_u.
OpcodeAtomicI64Rmw16SubU OpcodeAtomic = 0x2a
// OpcodeAtomicI64Rmw32SubU represents the instruction i64.atomic.rmw32.sub_u.
OpcodeAtomicI64Rmw32SubU OpcodeAtomic = 0x2b
// OpcodeAtomicI32RmwAnd represents the instruction i32.atomic.rmw.and.
OpcodeAtomicI32RmwAnd OpcodeAtomic = 0x2c
// OpcodeAtomicI64RmwAnd represents the instruction i64.atomic.rmw.and.
OpcodeAtomicI64RmwAnd OpcodeAtomic = 0x2d
// OpcodeAtomicI32Rmw8AndU represents the instruction i32.atomic.rmw8.and_u.
OpcodeAtomicI32Rmw8AndU OpcodeAtomic = 0x2e
// OpcodeAtomicI32Rmw16AndU represents the instruction i32.atomic.rmw16.and_u.
OpcodeAtomicI32Rmw16AndU OpcodeAtomic = 0x2f
// OpcodeAtomicI64Rmw8AndU represents the instruction i64.atomic.rmw8.and_u.
OpcodeAtomicI64Rmw8AndU OpcodeAtomic = 0x30
// OpcodeAtomicI64Rmw16AndU represents the instruction i64.atomic.rmw16.and_u.
OpcodeAtomicI64Rmw16AndU OpcodeAtomic = 0x31
// OpcodeAtomicI64Rmw32AndU represents the instruction i64.atomic.rmw32.and_u.
OpcodeAtomicI64Rmw32AndU OpcodeAtomic = 0x32
// OpcodeAtomicI32RmwOr represents the instruction i32.atomic.rmw.or.
OpcodeAtomicI32RmwOr OpcodeAtomic = 0x33
// OpcodeAtomicI64RmwOr represents the instruction i64.atomic.rmw.or.
OpcodeAtomicI64RmwOr OpcodeAtomic = 0x34
// OpcodeAtomicI32Rmw8OrU represents the instruction i32.atomic.rmw8.or_u.
OpcodeAtomicI32Rmw8OrU OpcodeAtomic = 0x35
// OpcodeAtomicI32Rmw16OrU represents the instruction i32.atomic.rmw16.or_u.
OpcodeAtomicI32Rmw16OrU OpcodeAtomic = 0x36
// OpcodeAtomicI64Rmw8OrU represents the instruction i64.atomic.rmw8.or_u.
OpcodeAtomicI64Rmw8OrU OpcodeAtomic = 0x37
// OpcodeAtomicI64Rmw16OrU represents the instruction i64.atomic.rmw16.or_u.
OpcodeAtomicI64Rmw16OrU OpcodeAtomic = 0x38
// OpcodeAtomicI64Rmw32OrU represents the instruction i64.atomic.rmw32.or_u.
OpcodeAtomicI64Rmw32OrU OpcodeAtomic = 0x39
// OpcodeAtomicI32RmwXor represents the instruction i32.atomic.rmw.xor.
OpcodeAtomicI32RmwXor OpcodeAtomic = 0x3a
// OpcodeAtomicI64RmwXor represents the instruction i64.atomic.rmw.xor.
OpcodeAtomicI64RmwXor OpcodeAtomic = 0x3b
// OpcodeAtomicI32Rmw8XorU represents the instruction i32.atomic.rmw8.xor_u.
OpcodeAtomicI32Rmw8XorU OpcodeAtomic = 0x3c
// OpcodeAtomicI32Rmw16XorU represents the instruction i32.atomic.rmw16.xor_u.
OpcodeAtomicI32Rmw16XorU OpcodeAtomic = 0x3d
// OpcodeAtomicI64Rmw8XorU represents the instruction i64.atomic.rmw8.xor_u.
OpcodeAtomicI64Rmw8XorU OpcodeAtomic = 0x3e
// OpcodeAtomicI64Rmw16XorU represents the instruction i64.atomic.rmw16.xor_u.
OpcodeAtomicI64Rmw16XorU OpcodeAtomic = 0x3f
// OpcodeAtomicI64Rmw32XorU represents the instruction i64.atomic.rmw32.xor_u.
OpcodeAtomicI64Rmw32XorU OpcodeAtomic = 0x40
// OpcodeAtomicI32RmwXchg represents the instruction i32.atomic.rmw.xchg.
OpcodeAtomicI32RmwXchg OpcodeAtomic = 0x41
// OpcodeAtomicI64RmwXchg represents the instruction i64.atomic.rmw.xchg.
OpcodeAtomicI64RmwXchg OpcodeAtomic = 0x42
// OpcodeAtomicI32Rmw8XchgU represents the instruction i32.atomic.rmw8.xchg_u.
OpcodeAtomicI32Rmw8XchgU OpcodeAtomic = 0x43
// OpcodeAtomicI32Rmw16XchgU represents the instruction i32.atomic.rmw16.xchg_u.
OpcodeAtomicI32Rmw16XchgU OpcodeAtomic = 0x44
// OpcodeAtomicI64Rmw8XchgU represents the instruction i64.atomic.rmw8.xchg_u.
OpcodeAtomicI64Rmw8XchgU OpcodeAtomic = 0x45
// OpcodeAtomicI64Rmw16XchgU represents the instruction i64.atomic.rmw16.xchg_u.
OpcodeAtomicI64Rmw16XchgU OpcodeAtomic = 0x46
// OpcodeAtomicI64Rmw32XchgU represents the instruction i64.atomic.rmw32.xchg_u.
OpcodeAtomicI64Rmw32XchgU OpcodeAtomic = 0x47
// OpcodeAtomicI32RmwCmpxchg represents the instruction i32.atomic.rmw.cmpxchg.
OpcodeAtomicI32RmwCmpxchg OpcodeAtomic = 0x48
// OpcodeAtomicI64RmwCmpxchg represents the instruction i64.atomic.rmw.cmpxchg.
OpcodeAtomicI64RmwCmpxchg OpcodeAtomic = 0x49
// OpcodeAtomicI32Rmw8CmpxchgU represents the instruction i32.atomic.rmw8.cmpxchg_u.
OpcodeAtomicI32Rmw8CmpxchgU OpcodeAtomic = 0x4a
// OpcodeAtomicI32Rmw16CmpxchgU represents the instruction i32.atomic.rmw16.cmpxchg_u.
OpcodeAtomicI32Rmw16CmpxchgU OpcodeAtomic = 0x4b
// OpcodeAtomicI64Rmw8CmpxchgU represents the instruction i64.atomic.rmw8.cmpxchg_u.
OpcodeAtomicI64Rmw8CmpxchgU OpcodeAtomic = 0x4c
// OpcodeAtomicI64Rmw16CmpxchgU represents the instruction i64.atomic.rmw16.cmpxchg_u.
OpcodeAtomicI64Rmw16CmpxchgU OpcodeAtomic = 0x4d
// OpcodeAtomicI64Rmw32CmpxchgU represents the instruction i64.atomic.rmw32.cmpxchg_u.
OpcodeAtomicI64Rmw32CmpxchgU OpcodeAtomic = 0x4e
)
const (
OpcodeUnreachableName = "unreachable"
OpcodeNopName = "nop"
OpcodeBlockName = "block"
OpcodeLoopName = "loop"
OpcodeIfName = "if"
OpcodeElseName = "else"
OpcodeEndName = "end"
OpcodeBrName = "br"
OpcodeBrIfName = "br_if"
OpcodeBrTableName = "br_table"
OpcodeReturnName = "return"
OpcodeCallName = "call"
OpcodeCallIndirectName = "call_indirect"
OpcodeDropName = "drop"
OpcodeSelectName = "select"
OpcodeTypedSelectName = "typed_select"
OpcodeLocalGetName = "local.get"
OpcodeLocalSetName = "local.set"
OpcodeLocalTeeName = "local.tee"
OpcodeGlobalGetName = "global.get"
OpcodeGlobalSetName = "global.set"
OpcodeI32LoadName = "i32.load"
OpcodeI64LoadName = "i64.load"
OpcodeF32LoadName = "f32.load"
OpcodeF64LoadName = "f64.load"
OpcodeI32Load8SName = "i32.load8_s"
OpcodeI32Load8UName = "i32.load8_u"
OpcodeI32Load16SName = "i32.load16_s"
OpcodeI32Load16UName = "i32.load16_u"
OpcodeI64Load8SName = "i64.load8_s"
OpcodeI64Load8UName = "i64.load8_u"
OpcodeI64Load16SName = "i64.load16_s"
OpcodeI64Load16UName = "i64.load16_u"
OpcodeI64Load32SName = "i64.load32_s"
OpcodeI64Load32UName = "i64.load32_u"
OpcodeI32StoreName = "i32.store"
OpcodeI64StoreName = "i64.store"
OpcodeF32StoreName = "f32.store"
OpcodeF64StoreName = "f64.store"
OpcodeI32Store8Name = "i32.store8"
OpcodeI32Store16Name = "i32.store16"
OpcodeI64Store8Name = "i64.store8"
OpcodeI64Store16Name = "i64.store16"
OpcodeI64Store32Name = "i64.store32"
OpcodeMemorySizeName = "memory.size"
OpcodeMemoryGrowName = "memory.grow"
OpcodeI32ConstName = "i32.const"
OpcodeI64ConstName = "i64.const"
OpcodeF32ConstName = "f32.const"
OpcodeF64ConstName = "f64.const"
OpcodeI32EqzName = "i32.eqz"
OpcodeI32EqName = "i32.eq"
OpcodeI32NeName = "i32.ne"
OpcodeI32LtSName = "i32.lt_s"
OpcodeI32LtUName = "i32.lt_u"
OpcodeI32GtSName = "i32.gt_s"
OpcodeI32GtUName = "i32.gt_u"
OpcodeI32LeSName = "i32.le_s"
OpcodeI32LeUName = "i32.le_u"
OpcodeI32GeSName = "i32.ge_s"
OpcodeI32GeUName = "i32.ge_u"
OpcodeI64EqzName = "i64.eqz"
OpcodeI64EqName = "i64.eq"
OpcodeI64NeName = "i64.ne"
OpcodeI64LtSName = "i64.lt_s"
OpcodeI64LtUName = "i64.lt_u"
OpcodeI64GtSName = "i64.gt_s"
OpcodeI64GtUName = "i64.gt_u"
OpcodeI64LeSName = "i64.le_s"
OpcodeI64LeUName = "i64.le_u"
OpcodeI64GeSName = "i64.ge_s"
OpcodeI64GeUName = "i64.ge_u"
OpcodeF32EqName = "f32.eq"
OpcodeF32NeName = "f32.ne"
OpcodeF32LtName = "f32.lt"
OpcodeF32GtName = "f32.gt"
OpcodeF32LeName = "f32.le"
OpcodeF32GeName = "f32.ge"
OpcodeF64EqName = "f64.eq"
OpcodeF64NeName = "f64.ne"
OpcodeF64LtName = "f64.lt"
OpcodeF64GtName = "f64.gt"
OpcodeF64LeName = "f64.le"
OpcodeF64GeName = "f64.ge"
OpcodeI32ClzName = "i32.clz"
OpcodeI32CtzName = "i32.ctz"
OpcodeI32PopcntName = "i32.popcnt"
OpcodeI32AddName = "i32.add"
OpcodeI32SubName = "i32.sub"
OpcodeI32MulName = "i32.mul"
OpcodeI32DivSName = "i32.div_s"
OpcodeI32DivUName = "i32.div_u"
OpcodeI32RemSName = "i32.rem_s"
OpcodeI32RemUName = "i32.rem_u"
OpcodeI32AndName = "i32.and"
OpcodeI32OrName = "i32.or"
OpcodeI32XorName = "i32.xor"
OpcodeI32ShlName = "i32.shl"
OpcodeI32ShrSName = "i32.shr_s"
OpcodeI32ShrUName = "i32.shr_u"
OpcodeI32RotlName = "i32.rotl"
OpcodeI32RotrName = "i32.rotr"
OpcodeI64ClzName = "i64.clz"
OpcodeI64CtzName = "i64.ctz"
OpcodeI64PopcntName = "i64.popcnt"
OpcodeI64AddName = "i64.add"
OpcodeI64SubName = "i64.sub"
OpcodeI64MulName = "i64.mul"
OpcodeI64DivSName = "i64.div_s"
OpcodeI64DivUName = "i64.div_u"
OpcodeI64RemSName = "i64.rem_s"
OpcodeI64RemUName = "i64.rem_u"
OpcodeI64AndName = "i64.and"
OpcodeI64OrName = "i64.or"
OpcodeI64XorName = "i64.xor"
OpcodeI64ShlName = "i64.shl"
OpcodeI64ShrSName = "i64.shr_s"
OpcodeI64ShrUName = "i64.shr_u"
OpcodeI64RotlName = "i64.rotl"
OpcodeI64RotrName = "i64.rotr"
OpcodeF32AbsName = "f32.abs"
OpcodeF32NegName = "f32.neg"
OpcodeF32CeilName = "f32.ceil"
OpcodeF32FloorName = "f32.floor"
OpcodeF32TruncName = "f32.trunc"
OpcodeF32NearestName = "f32.nearest"
OpcodeF32SqrtName = "f32.sqrt"
OpcodeF32AddName = "f32.add"
OpcodeF32SubName = "f32.sub"
OpcodeF32MulName = "f32.mul"
OpcodeF32DivName = "f32.div"
OpcodeF32MinName = "f32.min"
OpcodeF32MaxName = "f32.max"
OpcodeF32CopysignName = "f32.copysign"
OpcodeF64AbsName = "f64.abs"
OpcodeF64NegName = "f64.neg"
OpcodeF64CeilName = "f64.ceil"
OpcodeF64FloorName = "f64.floor"
OpcodeF64TruncName = "f64.trunc"
OpcodeF64NearestName = "f64.nearest"
OpcodeF64SqrtName = "f64.sqrt"
OpcodeF64AddName = "f64.add"
OpcodeF64SubName = "f64.sub"
OpcodeF64MulName = "f64.mul"
OpcodeF64DivName = "f64.div"
OpcodeF64MinName = "f64.min"
OpcodeF64MaxName = "f64.max"
OpcodeF64CopysignName = "f64.copysign"
OpcodeI32WrapI64Name = "i32.wrap_i64"
OpcodeI32TruncF32SName = "i32.trunc_f32_s"
OpcodeI32TruncF32UName = "i32.trunc_f32_u"
OpcodeI32TruncF64SName = "i32.trunc_f64_s"
OpcodeI32TruncF64UName = "i32.trunc_f64_u"
OpcodeI64ExtendI32SName = "i64.extend_i32_s"
OpcodeI64ExtendI32UName = "i64.extend_i32_u"
OpcodeI64TruncF32SName = "i64.trunc_f32_s"
OpcodeI64TruncF32UName = "i64.trunc_f32_u"
OpcodeI64TruncF64SName = "i64.trunc_f64_s"
OpcodeI64TruncF64UName = "i64.trunc_f64_u"
OpcodeF32ConvertI32SName = "f32.convert_i32_s"
OpcodeF32ConvertI32UName = "f32.convert_i32_u"
OpcodeF32ConvertI64SName = "f32.convert_i64_s"
OpcodeF32ConvertI64UName = "f32.convert_i64u"
OpcodeF32DemoteF64Name = "f32.demote_f64"
OpcodeF64ConvertI32SName = "f64.convert_i32_s"
OpcodeF64ConvertI32UName = "f64.convert_i32_u"
OpcodeF64ConvertI64SName = "f64.convert_i64_s"
OpcodeF64ConvertI64UName = "f64.convert_i64_u"
OpcodeF64PromoteF32Name = "f64.promote_f32"
OpcodeI32ReinterpretF32Name = "i32.reinterpret_f32"
OpcodeI64ReinterpretF64Name = "i64.reinterpret_f64"
OpcodeF32ReinterpretI32Name = "f32.reinterpret_i32"
OpcodeF64ReinterpretI64Name = "f64.reinterpret_i64"
OpcodeRefNullName = "ref.null"
OpcodeRefIsNullName = "ref.is_null"
OpcodeRefFuncName = "ref.func"
OpcodeTableGetName = "table.get"
OpcodeTableSetName = "table.set"
// Below are toggled with CoreFeatureSignExtensionOps
OpcodeI32Extend8SName = "i32.extend8_s"
OpcodeI32Extend16SName = "i32.extend16_s"
OpcodeI64Extend8SName = "i64.extend8_s"
OpcodeI64Extend16SName = "i64.extend16_s"
OpcodeI64Extend32SName = "i64.extend32_s"
OpcodeMiscPrefixName = "misc_prefix"
OpcodeVecPrefixName = "vector_prefix"
OpcodeAtomicPrefixName = "atomic_prefix"
)
var instructionNames = [256]string{
OpcodeUnreachable: OpcodeUnreachableName,
OpcodeNop: OpcodeNopName,
OpcodeBlock: OpcodeBlockName,
OpcodeLoop: OpcodeLoopName,
OpcodeIf: OpcodeIfName,
OpcodeElse: OpcodeElseName,
OpcodeEnd: OpcodeEndName,
OpcodeBr: OpcodeBrName,
OpcodeBrIf: OpcodeBrIfName,
OpcodeBrTable: OpcodeBrTableName,
OpcodeReturn: OpcodeReturnName,
OpcodeCall: OpcodeCallName,
OpcodeCallIndirect: OpcodeCallIndirectName,
OpcodeDrop: OpcodeDropName,
OpcodeSelect: OpcodeSelectName,
OpcodeTypedSelect: OpcodeTypedSelectName,
OpcodeLocalGet: OpcodeLocalGetName,
OpcodeLocalSet: OpcodeLocalSetName,
OpcodeLocalTee: OpcodeLocalTeeName,
OpcodeGlobalGet: OpcodeGlobalGetName,
OpcodeGlobalSet: OpcodeGlobalSetName,
OpcodeI32Load: OpcodeI32LoadName,
OpcodeI64Load: OpcodeI64LoadName,
OpcodeF32Load: OpcodeF32LoadName,
OpcodeF64Load: OpcodeF64LoadName,