forked from gcc-mirror/gcc
/
regrename.c
1459 lines (1265 loc) · 42.8 KB
/
regrename.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* Register renaming for the GNU compiler.
Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
2010 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "rtl-error.h"
#include "tm_p.h"
#include "insn-config.h"
#include "regs.h"
#include "addresses.h"
#include "hard-reg-set.h"
#include "basic-block.h"
#include "reload.h"
#include "output.h"
#include "function.h"
#include "recog.h"
#include "flags.h"
#include "obstack.h"
#include "timevar.h"
#include "tree-pass.h"
#include "df.h"
#include "target.h"
/* This file implements the RTL register renaming pass of the compiler. It is
a semi-local pass whose goal is to maximize the usage of the register file
of the processor by substituting registers for others in the solution given
by the register allocator. The algorithm is as follows:
1. Local def/use chains are built: within each basic block, chains are
opened and closed; if a chain isn't closed at the end of the block,
it is dropped.
2. For each chain, the set of possible renaming registers is computed.
This takes into account the renaming of previously processed chains.
Optionally, a preferred class is computed for the renaming register.
3. The best renaming register is computed for the chain in the above set,
using a round-robin allocation. If a preferred class exists, then the
round-robin allocation is done within the class first, if possible.
The round-robin allocation of renaming registers itself is global.
4. If a renaming register has been found, it is substituted in the chain.
Targets can parameterize the pass by specifying a preferred class for the
renaming register for a given (super)class of registers to be renamed. */
#if HOST_BITS_PER_WIDE_INT <= MAX_RECOG_OPERANDS
#error "Use a different bitmap implementation for untracked_operands."
#endif
/* We keep linked lists of DU_HEAD structures, each of which describes
a chain of occurrences of a reg. */
struct du_head
{
/* The next chain. */
struct du_head *next_chain;
/* The first and last elements of this chain. */
struct du_chain *first, *last;
/* Describes the register being tracked. */
unsigned regno, nregs;
/* A unique id to be used as an index into the conflicts bitmaps. */
unsigned id;
/* A bitmap to record conflicts with other chains. */
bitmap_head conflicts;
/* Conflicts with untracked hard registers. */
HARD_REG_SET hard_conflicts;
/* Nonzero if the chain is finished; zero if it is still open. */
unsigned int terminated:1;
/* Nonzero if the chain crosses a call. */
unsigned int need_caller_save_reg:1;
/* Nonzero if the register is used in a way that prevents renaming,
such as the SET_DEST of a CALL_INSN or an asm operand that used
to be a hard register. */
unsigned int cannot_rename:1;
};
/* This struct describes a single occurrence of a register. */
struct du_chain
{
/* Links to the next occurrence of the register. */
struct du_chain *next_use;
/* The insn where the register appears. */
rtx insn;
/* The location inside the insn. */
rtx *loc;
/* The register class required by the insn at this location. */
ENUM_BITFIELD(reg_class) cl : 16;
};
enum scan_actions
{
terminate_write,
terminate_dead,
mark_all_read,
mark_read,
mark_write,
/* mark_access is for marking the destination regs in
REG_FRAME_RELATED_EXPR notes (as if they were read) so that the
note is updated properly. */
mark_access
};
static const char * const scan_actions_name[] =
{
"terminate_write",
"terminate_dead",
"mark_all_read",
"mark_read",
"mark_write",
"mark_access"
};
static struct obstack rename_obstack;
static void do_replace (struct du_head *, int);
static void scan_rtx_reg (rtx, rtx *, enum reg_class,
enum scan_actions, enum op_type);
static void scan_rtx_address (rtx, rtx *, enum reg_class,
enum scan_actions, enum machine_mode);
static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions,
enum op_type);
static struct du_head *build_def_use (basic_block);
static void dump_def_use_chain (struct du_head *);
typedef struct du_head *du_head_p;
DEF_VEC_P (du_head_p);
DEF_VEC_ALLOC_P (du_head_p, heap);
static VEC(du_head_p, heap) *id_to_chain;
static void
free_chain_data (void)
{
int i;
du_head_p ptr;
for (i = 0; VEC_iterate(du_head_p, id_to_chain, i, ptr); i++)
bitmap_clear (&ptr->conflicts);
VEC_free (du_head_p, heap, id_to_chain);
}
/* For a def-use chain HEAD, find which registers overlap its lifetime and
set the corresponding bits in *PSET. */
static void
merge_overlapping_regs (HARD_REG_SET *pset, struct du_head *head)
{
bitmap_iterator bi;
unsigned i;
IOR_HARD_REG_SET (*pset, head->hard_conflicts);
EXECUTE_IF_SET_IN_BITMAP (&head->conflicts, 0, i, bi)
{
du_head_p other = VEC_index (du_head_p, id_to_chain, i);
unsigned j = other->nregs;
while (j-- > 0)
SET_HARD_REG_BIT (*pset, other->regno + j);
}
}
/* Check if NEW_REG can be the candidate register to rename for
REG in THIS_HEAD chain. THIS_UNAVAILABLE is a set of unavailable hard
registers. */
static bool
check_new_reg_p (int reg ATTRIBUTE_UNUSED, int new_reg,
struct du_head *this_head, HARD_REG_SET this_unavailable)
{
enum machine_mode mode = GET_MODE (*this_head->first->loc);
int nregs = hard_regno_nregs[new_reg][mode];
int i;
struct du_chain *tmp;
for (i = nregs - 1; i >= 0; --i)
if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i)
|| fixed_regs[new_reg + i]
|| global_regs[new_reg + i]
/* Can't use regs which aren't saved by the prologue. */
|| (! df_regs_ever_live_p (new_reg + i)
&& ! call_used_regs[new_reg + i])
#ifdef LEAF_REGISTERS
/* We can't use a non-leaf register if we're in a
leaf function. */
|| (current_function_is_leaf
&& !LEAF_REGISTERS[new_reg + i])
#endif
#ifdef HARD_REGNO_RENAME_OK
|| ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i)
#endif
)
return false;
/* See whether it accepts all modes that occur in
definition and uses. */
for (tmp = this_head->first; tmp; tmp = tmp->next_use)
if ((! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc))
&& ! DEBUG_INSN_P (tmp->insn))
|| (this_head->need_caller_save_reg
&& ! (HARD_REGNO_CALL_PART_CLOBBERED
(reg, GET_MODE (*tmp->loc)))
&& (HARD_REGNO_CALL_PART_CLOBBERED
(new_reg, GET_MODE (*tmp->loc)))))
return false;
return true;
}
/* Perform register renaming on the current function. */
static unsigned int
regrename_optimize (void)
{
int tick[FIRST_PSEUDO_REGISTER];
int this_tick = 0;
basic_block bb;
char *first_obj;
df_set_flags (DF_LR_RUN_DCE);
df_note_add_problem ();
df_analyze ();
df_set_flags (DF_DEFER_INSN_RESCAN);
memset (tick, 0, sizeof tick);
gcc_obstack_init (&rename_obstack);
first_obj = XOBNEWVAR (&rename_obstack, char, 0);
FOR_EACH_BB (bb)
{
struct du_head *all_chains = 0;
HARD_REG_SET unavailable;
#if 0
HARD_REG_SET regs_seen;
CLEAR_HARD_REG_SET (regs_seen);
#endif
id_to_chain = VEC_alloc (du_head_p, heap, 0);
CLEAR_HARD_REG_SET (unavailable);
if (dump_file)
fprintf (dump_file, "\nBasic block %d:\n", bb->index);
all_chains = build_def_use (bb);
if (dump_file)
dump_def_use_chain (all_chains);
CLEAR_HARD_REG_SET (unavailable);
/* Don't clobber traceback for noreturn functions. */
if (frame_pointer_needed)
{
add_to_hard_reg_set (&unavailable, Pmode, FRAME_POINTER_REGNUM);
#if !HARD_FRAME_POINTER_IS_FRAME_POINTER
add_to_hard_reg_set (&unavailable, Pmode, HARD_FRAME_POINTER_REGNUM);
#endif
}
while (all_chains)
{
int new_reg, best_new_reg, best_nregs;
int n_uses;
struct du_head *this_head = all_chains;
struct du_chain *tmp;
HARD_REG_SET this_unavailable;
int reg = this_head->regno;
int pass;
enum reg_class super_class = NO_REGS;
enum reg_class preferred_class;
bool has_preferred_class;
all_chains = this_head->next_chain;
if (this_head->cannot_rename)
continue;
best_new_reg = reg;
best_nregs = this_head->nregs;
#if 0 /* This just disables optimization opportunities. */
/* Only rename once we've seen the reg more than once. */
if (! TEST_HARD_REG_BIT (regs_seen, reg))
{
SET_HARD_REG_BIT (regs_seen, reg);
continue;
}
#endif
if (fixed_regs[reg] || global_regs[reg]
#if !HARD_FRAME_POINTER_IS_FRAME_POINTER
|| (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM)
#else
|| (frame_pointer_needed && reg == FRAME_POINTER_REGNUM)
#endif
)
continue;
COPY_HARD_REG_SET (this_unavailable, unavailable);
/* Iterate over elements in the chain in order to:
1. Count number of uses, and narrow the set of registers we can
use for renaming.
2. Compute the superunion of register classes in this chain. */
n_uses = 0;
super_class = NO_REGS;
for (tmp = this_head->first; tmp; tmp = tmp->next_use)
{
if (DEBUG_INSN_P (tmp->insn))
continue;
n_uses++;
IOR_COMPL_HARD_REG_SET (this_unavailable,
reg_class_contents[tmp->cl]);
super_class
= reg_class_superunion[(int) super_class][(int) tmp->cl];
}
if (n_uses < 2)
continue;
/* Further narrow the set of registers we can use for renaming.
If the chain needs a call-saved register, mark the call-used
registers as unavailable. */
if (this_head->need_caller_save_reg)
IOR_HARD_REG_SET (this_unavailable, call_used_reg_set);
/* And mark registers that overlap its lifetime as unavailable. */
merge_overlapping_regs (&this_unavailable, this_head);
/* Compute preferred rename class of super union of all the classes
in the chain. */
preferred_class
= (enum reg_class) targetm.preferred_rename_class (super_class);
/* If PREFERRED_CLASS is not NO_REGS, we iterate in the first pass
over registers that belong to PREFERRED_CLASS and try to find the
best register within the class. If that failed, we iterate in
the second pass over registers that don't belong to the class.
If PREFERRED_CLASS is NO_REGS, we iterate over all registers in
ascending order without any preference. */
has_preferred_class = (preferred_class != NO_REGS);
for (pass = (has_preferred_class ? 0 : 1); pass < 2; pass++)
{
for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++)
{
if (has_preferred_class
&& (pass == 0)
!= TEST_HARD_REG_BIT
(reg_class_contents[preferred_class], new_reg))
continue;
/* In the first pass, we force the renaming of registers that
don't belong to PREFERRED_CLASS to registers that do, even
though the latters were used not very long ago. */
if (check_new_reg_p (reg, new_reg, this_head,
this_unavailable)
&& ((pass == 0
&& !TEST_HARD_REG_BIT
(reg_class_contents[preferred_class],
best_new_reg))
|| tick[best_new_reg] > tick[new_reg]))
{
enum machine_mode mode
= GET_MODE (*this_head->first->loc);
best_new_reg = new_reg;
best_nregs = hard_regno_nregs[new_reg][mode];
}
}
if (pass == 0 && best_new_reg != reg)
break;
}
if (dump_file)
{
fprintf (dump_file, "Register %s in insn %d",
reg_names[reg], INSN_UID (this_head->first->insn));
if (this_head->need_caller_save_reg)
fprintf (dump_file, " crosses a call");
}
if (best_new_reg == reg)
{
tick[reg] = ++this_tick;
if (dump_file)
fprintf (dump_file, "; no available better choice\n");
continue;
}
if (dump_file)
fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]);
do_replace (this_head, best_new_reg);
this_head->regno = best_new_reg;
this_head->nregs = best_nregs;
tick[best_new_reg] = ++this_tick;
df_set_regs_ever_live (best_new_reg, true);
}
free_chain_data ();
obstack_free (&rename_obstack, first_obj);
}
obstack_free (&rename_obstack, NULL);
if (dump_file)
fputc ('\n', dump_file);
return 0;
}
static void
do_replace (struct du_head *head, int reg)
{
struct du_chain *chain;
unsigned int base_regno = head->regno;
bool found_note = false;
gcc_assert (! DEBUG_INSN_P (head->first->insn));
for (chain = head->first; chain; chain = chain->next_use)
{
unsigned int regno = ORIGINAL_REGNO (*chain->loc);
struct reg_attrs *attr = REG_ATTRS (*chain->loc);
int reg_ptr = REG_POINTER (*chain->loc);
if (DEBUG_INSN_P (chain->insn) && REGNO (*chain->loc) != base_regno)
INSN_VAR_LOCATION_LOC (chain->insn) = gen_rtx_UNKNOWN_VAR_LOC ();
else
{
rtx note;
*chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg);
if (regno >= FIRST_PSEUDO_REGISTER)
ORIGINAL_REGNO (*chain->loc) = regno;
REG_ATTRS (*chain->loc) = attr;
REG_POINTER (*chain->loc) = reg_ptr;
for (note = REG_NOTES (chain->insn); note; note = XEXP (note, 1))
{
enum reg_note kind = REG_NOTE_KIND (note);
if (kind == REG_DEAD || kind == REG_UNUSED)
{
rtx reg = XEXP (note, 0);
gcc_assert (HARD_REGISTER_P (reg));
if (REGNO (reg) == base_regno)
{
found_note = true;
if (kind == REG_DEAD
&& reg_set_p (*chain->loc, chain->insn))
remove_note (chain->insn, note);
else
XEXP (note, 0) = *chain->loc;
break;
}
}
}
}
df_insn_rescan (chain->insn);
}
if (!found_note)
{
/* If the chain's first insn is the same as the last, we should have
found a REG_UNUSED note. */
gcc_assert (head->first->insn != head->last->insn);
if (!reg_set_p (*head->last->loc, head->last->insn))
add_reg_note (head->last->insn, REG_DEAD, *head->last->loc);
}
}
/* Walk all chains starting with CHAINS and record that they conflict with
another chain whose id is ID. */
static void
mark_conflict (struct du_head *chains, unsigned id)
{
while (chains)
{
bitmap_set_bit (&chains->conflicts, id);
chains = chains->next_chain;
}
}
/* True if we found a register with a size mismatch, which means that we
can't track its lifetime accurately. If so, we abort the current block
without renaming. */
static bool fail_current_block;
/* The id to be given to the next opened chain. */
static unsigned current_id;
/* List of currently open chains, and closed chains that can be renamed. */
static struct du_head *open_chains;
static struct du_head *closed_chains;
/* Bitmap of open chains. The bits set always match the list found in
open_chains. */
static bitmap_head open_chains_set;
/* Record the registers being tracked in open_chains. */
static HARD_REG_SET live_in_chains;
/* Record the registers that are live but not tracked. The intersection
between this and live_in_chains is empty. */
static HARD_REG_SET live_hard_regs;
/* Return true if OP is a reg for which all bits are set in PSET, false
if all bits are clear.
In other cases, set fail_current_block and return false. */
static bool
verify_reg_in_set (rtx op, HARD_REG_SET *pset)
{
unsigned regno, nregs;
bool all_live, all_dead;
if (!REG_P (op))
return false;
regno = REGNO (op);
nregs = hard_regno_nregs[regno][GET_MODE (op)];
all_live = all_dead = true;
while (nregs-- > 0)
if (TEST_HARD_REG_BIT (*pset, regno + nregs))
all_dead = false;
else
all_live = false;
if (!all_dead && !all_live)
{
fail_current_block = true;
return false;
}
return all_live;
}
/* Return true if OP is a reg that is being tracked already in some form.
May set fail_current_block if it sees an unhandled case of overlap. */
static bool
verify_reg_tracked (rtx op)
{
return (verify_reg_in_set (op, &live_hard_regs)
|| verify_reg_in_set (op, &live_in_chains));
}
/* Called through note_stores. DATA points to a rtx_code, either SET or
CLOBBER, which tells us which kind of rtx to look at. If we have a
match, record the set register in live_hard_regs and in the hard_conflicts
bitmap of open chains. */
static void
note_sets_clobbers (rtx x, const_rtx set, void *data)
{
enum rtx_code code = *(enum rtx_code *)data;
struct du_head *chain;
if (GET_CODE (x) == SUBREG)
x = SUBREG_REG (x);
if (!REG_P (x) || GET_CODE (set) != code)
return;
/* There must not be pseudos at this point. */
gcc_assert (HARD_REGISTER_P (x));
add_to_hard_reg_set (&live_hard_regs, GET_MODE (x), REGNO (x));
for (chain = open_chains; chain; chain = chain->next_chain)
add_to_hard_reg_set (&chain->hard_conflicts, GET_MODE (x), REGNO (x));
}
/* Create a new chain for THIS_NREGS registers starting at THIS_REGNO,
and record its occurrence in *LOC, which is being written to in INSN.
This access requires a register of class CL. */
static void
create_new_chain (unsigned this_regno, unsigned this_nregs, rtx *loc,
rtx insn, enum reg_class cl)
{
struct du_head *head = XOBNEW (&rename_obstack, struct du_head);
struct du_chain *this_du;
int nregs;
head->next_chain = open_chains;
open_chains = head;
head->regno = this_regno;
head->nregs = this_nregs;
head->need_caller_save_reg = 0;
head->cannot_rename = 0;
head->terminated = 0;
VEC_safe_push (du_head_p, heap, id_to_chain, head);
head->id = current_id++;
bitmap_initialize (&head->conflicts, &bitmap_default_obstack);
bitmap_copy (&head->conflicts, &open_chains_set);
mark_conflict (open_chains, head->id);
/* Since we're tracking this as a chain now, remove it from the
list of conflicting live hard registers and track it in
live_in_chains instead. */
nregs = head->nregs;
while (nregs-- > 0)
{
SET_HARD_REG_BIT (live_in_chains, head->regno + nregs);
CLEAR_HARD_REG_BIT (live_hard_regs, head->regno + nregs);
}
COPY_HARD_REG_SET (head->hard_conflicts, live_hard_regs);
bitmap_set_bit (&open_chains_set, head->id);
open_chains = head;
if (dump_file)
{
fprintf (dump_file, "Creating chain %s (%d)",
reg_names[head->regno], head->id);
if (insn != NULL_RTX)
fprintf (dump_file, " at insn %d", INSN_UID (insn));
fprintf (dump_file, "\n");
}
if (insn == NULL_RTX)
{
head->first = head->last = NULL;
return;
}
this_du = XOBNEW (&rename_obstack, struct du_chain);
head->first = head->last = this_du;
this_du->next_use = 0;
this_du->loc = loc;
this_du->insn = insn;
this_du->cl = cl;
}
static void
scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action,
enum op_type type)
{
struct du_head **p;
rtx x = *loc;
enum machine_mode mode = GET_MODE (x);
unsigned this_regno = REGNO (x);
unsigned this_nregs = hard_regno_nregs[this_regno][mode];
if (action == mark_write)
{
if (type == OP_OUT)
create_new_chain (this_regno, this_nregs, loc, insn, cl);
return;
}
if ((type == OP_OUT) != (action == terminate_write || action == mark_access))
return;
for (p = &open_chains; *p;)
{
struct du_head *head = *p;
struct du_head *next = head->next_chain;
int exact_match = (head->regno == this_regno
&& head->nregs == this_nregs);
int superset = (this_regno <= head->regno
&& this_regno + this_nregs >= head->regno + head->nregs);
int subset = (this_regno >= head->regno
&& this_regno + this_nregs <= head->regno + head->nregs);
if (head->terminated
|| head->regno + head->nregs <= this_regno
|| this_regno + this_nregs <= head->regno)
{
p = &head->next_chain;
continue;
}
if (action == mark_read || action == mark_access)
{
/* ??? Class NO_REGS can happen if the md file makes use of
EXTRA_CONSTRAINTS to match registers. Which is arguably
wrong, but there we are. */
if (cl == NO_REGS || (!exact_match && !DEBUG_INSN_P (insn)))
{
if (dump_file)
fprintf (dump_file,
"Cannot rename chain %s (%d) at insn %d (%s)\n",
reg_names[head->regno], head->id, INSN_UID (insn),
scan_actions_name[(int) action]);
head->cannot_rename = 1;
if (superset)
{
unsigned nregs = this_nregs;
head->regno = this_regno;
head->nregs = this_nregs;
while (nregs-- > 0)
SET_HARD_REG_BIT (live_in_chains, head->regno + nregs);
if (dump_file)
fprintf (dump_file,
"Widening register in chain %s (%d) at insn %d\n",
reg_names[head->regno], head->id, INSN_UID (insn));
}
else if (!subset)
{
fail_current_block = true;
if (dump_file)
fprintf (dump_file,
"Failing basic block due to unhandled overlap\n");
}
}
else
{
struct du_chain *this_du;
this_du = XOBNEW (&rename_obstack, struct du_chain);
this_du->next_use = 0;
this_du->loc = loc;
this_du->insn = insn;
this_du->cl = cl;
if (head->first == NULL)
head->first = this_du;
else
head->last->next_use = this_du;
head->last = this_du;
}
/* Avoid adding the same location in a DEBUG_INSN multiple times,
which could happen with non-exact overlap. */
if (DEBUG_INSN_P (insn))
return;
/* Otherwise, find any other chains that do not match exactly;
ensure they all get marked unrenamable. */
p = &head->next_chain;
continue;
}
/* Whether the terminated chain can be used for renaming
depends on the action and this being an exact match.
In either case, we remove this element from open_chains. */
if ((action == terminate_dead || action == terminate_write)
&& superset)
{
unsigned nregs;
head->terminated = 1;
head->next_chain = closed_chains;
closed_chains = head;
bitmap_clear_bit (&open_chains_set, head->id);
nregs = head->nregs;
while (nregs-- > 0)
CLEAR_HARD_REG_BIT (live_in_chains, head->regno + nregs);
*p = next;
if (dump_file)
fprintf (dump_file,
"Closing chain %s (%d) at insn %d (%s)\n",
reg_names[head->regno], head->id, INSN_UID (insn),
scan_actions_name[(int) action]);
}
else if (action == terminate_dead || action == terminate_write)
{
/* In this case, tracking liveness gets too hard. Fail the
entire basic block. */
if (dump_file)
fprintf (dump_file,
"Failing basic block due to unhandled overlap\n");
fail_current_block = true;
return;
}
else
{
head->cannot_rename = 1;
if (dump_file)
fprintf (dump_file,
"Cannot rename chain %s (%d) at insn %d (%s)\n",
reg_names[head->regno], head->id, INSN_UID (insn),
scan_actions_name[(int) action]);
p = &head->next_chain;
}
}
}
/* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
BASE_REG_CLASS depending on how the register is being considered. */
static void
scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl,
enum scan_actions action, enum machine_mode mode)
{
rtx x = *loc;
RTX_CODE code = GET_CODE (x);
const char *fmt;
int i, j;
if (action == mark_write || action == mark_access)
return;
switch (code)
{
case PLUS:
{
rtx orig_op0 = XEXP (x, 0);
rtx orig_op1 = XEXP (x, 1);
RTX_CODE code0 = GET_CODE (orig_op0);
RTX_CODE code1 = GET_CODE (orig_op1);
rtx op0 = orig_op0;
rtx op1 = orig_op1;
rtx *locI = NULL;
rtx *locB = NULL;
enum rtx_code index_code = SCRATCH;
if (GET_CODE (op0) == SUBREG)
{
op0 = SUBREG_REG (op0);
code0 = GET_CODE (op0);
}
if (GET_CODE (op1) == SUBREG)
{
op1 = SUBREG_REG (op1);
code1 = GET_CODE (op1);
}
if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
|| code0 == ZERO_EXTEND || code1 == MEM)
{
locI = &XEXP (x, 0);
locB = &XEXP (x, 1);
index_code = GET_CODE (*locI);
}
else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
|| code1 == ZERO_EXTEND || code0 == MEM)
{
locI = &XEXP (x, 1);
locB = &XEXP (x, 0);
index_code = GET_CODE (*locI);
}
else if (code0 == CONST_INT || code0 == CONST
|| code0 == SYMBOL_REF || code0 == LABEL_REF)
{
locB = &XEXP (x, 1);
index_code = GET_CODE (XEXP (x, 0));
}
else if (code1 == CONST_INT || code1 == CONST
|| code1 == SYMBOL_REF || code1 == LABEL_REF)
{
locB = &XEXP (x, 0);
index_code = GET_CODE (XEXP (x, 1));
}
else if (code0 == REG && code1 == REG)
{
int index_op;
unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
if (REGNO_OK_FOR_INDEX_P (regno1)
&& regno_ok_for_base_p (regno0, mode, PLUS, REG))
index_op = 1;
else if (REGNO_OK_FOR_INDEX_P (regno0)
&& regno_ok_for_base_p (regno1, mode, PLUS, REG))
index_op = 0;
else if (regno_ok_for_base_p (regno0, mode, PLUS, REG)
|| REGNO_OK_FOR_INDEX_P (regno1))
index_op = 1;
else if (regno_ok_for_base_p (regno1, mode, PLUS, REG))
index_op = 0;
else
index_op = 1;
locI = &XEXP (x, index_op);
locB = &XEXP (x, !index_op);
index_code = GET_CODE (*locI);
}
else if (code0 == REG)
{
locI = &XEXP (x, 0);
locB = &XEXP (x, 1);
index_code = GET_CODE (*locI);
}
else if (code1 == REG)
{
locI = &XEXP (x, 1);
locB = &XEXP (x, 0);
index_code = GET_CODE (*locI);
}
if (locI)
scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode);
if (locB)
scan_rtx_address (insn, locB, base_reg_class (mode, PLUS, index_code),
action, mode);
return;
}
case POST_INC:
case POST_DEC:
case POST_MODIFY:
case PRE_INC:
case PRE_DEC:
case PRE_MODIFY:
#ifndef AUTO_INC_DEC
/* If the target doesn't claim to handle autoinc, this must be
something special, like a stack push. Kill this chain. */
action = mark_all_read;
#endif
break;
case MEM:
scan_rtx_address (insn, &XEXP (x, 0),
base_reg_class (GET_MODE (x), MEM, SCRATCH), action,
GET_MODE (x));
return;
case REG:
scan_rtx_reg (insn, loc, cl, action, OP_IN);
return;
default:
break;
}
fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
scan_rtx_address (insn, &XEXP (x, i), cl, action, mode);
else if (fmt[i] == 'E')
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
scan_rtx_address (insn, &XVECEXP (x, i, j), cl, action, mode);
}
}
static void
scan_rtx (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action,
enum op_type type)
{
const char *fmt;
rtx x = *loc;
enum rtx_code code = GET_CODE (x);
int i, j;
code = GET_CODE (x);
switch (code)
{
case CONST:
case CONST_INT:
case CONST_DOUBLE:
case CONST_FIXED:
case CONST_VECTOR:
case SYMBOL_REF:
case LABEL_REF:
case CC0:
case PC:
return;
case REG:
scan_rtx_reg (insn, loc, cl, action, type);
return;
case MEM:
scan_rtx_address (insn, &XEXP (x, 0),
base_reg_class (GET_MODE (x), MEM, SCRATCH), action,
GET_MODE (x));
return;
case SET:
scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN);
scan_rtx (insn, &SET_DEST (x), cl, action,
(GET_CODE (PATTERN (insn)) == COND_EXEC
&& verify_reg_tracked (SET_DEST (x))) ? OP_INOUT : OP_OUT);
return;
case STRICT_LOW_PART:
scan_rtx (insn, &XEXP (x, 0), cl, action,
verify_reg_tracked (XEXP (x, 0)) ? OP_INOUT : OP_OUT);
return;
case ZERO_EXTRACT:
case SIGN_EXTRACT:
scan_rtx (insn, &XEXP (x, 0), cl, action,
(type == OP_IN ? OP_IN :
verify_reg_tracked (XEXP (x, 0)) ? OP_INOUT : OP_OUT));
scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN);
scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN);