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regmap.c
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regmap.c
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// SPDX-License-Identifier: GPL-2.0
//
// Register map access API
//
// Copyright 2011 Wolfson Microelectronics plc
//
// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/export.h>
#include <linux/mutex.h>
#include <linux/err.h>
#include <linux/property.h>
#include <linux/rbtree.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/log2.h>
#include <linux/hwspinlock.h>
#include <asm/unaligned.h>
#define CREATE_TRACE_POINTS
#include "trace.h"
#include "internal.h"
/*
* Sometimes for failures during very early init the trace
* infrastructure isn't available early enough to be used. For this
* sort of problem defining LOG_DEVICE will add printks for basic
* register I/O on a specific device.
*/
#undef LOG_DEVICE
#ifdef LOG_DEVICE
static inline bool regmap_should_log(struct regmap *map)
{
return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
}
#else
static inline bool regmap_should_log(struct regmap *map) { return false; }
#endif
static int _regmap_update_bits(struct regmap *map, unsigned int reg,
unsigned int mask, unsigned int val,
bool *change, bool force_write);
static int _regmap_bus_reg_read(void *context, unsigned int reg,
unsigned int *val);
static int _regmap_bus_read(void *context, unsigned int reg,
unsigned int *val);
static int _regmap_bus_formatted_write(void *context, unsigned int reg,
unsigned int val);
static int _regmap_bus_reg_write(void *context, unsigned int reg,
unsigned int val);
static int _regmap_bus_raw_write(void *context, unsigned int reg,
unsigned int val);
bool regmap_reg_in_ranges(unsigned int reg,
const struct regmap_range *ranges,
unsigned int nranges)
{
const struct regmap_range *r;
int i;
for (i = 0, r = ranges; i < nranges; i++, r++)
if (regmap_reg_in_range(reg, r))
return true;
return false;
}
EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
bool regmap_check_range_table(struct regmap *map, unsigned int reg,
const struct regmap_access_table *table)
{
/* Check "no ranges" first */
if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
return false;
/* In case zero "yes ranges" are supplied, any reg is OK */
if (!table->n_yes_ranges)
return true;
return regmap_reg_in_ranges(reg, table->yes_ranges,
table->n_yes_ranges);
}
EXPORT_SYMBOL_GPL(regmap_check_range_table);
bool regmap_writeable(struct regmap *map, unsigned int reg)
{
if (map->max_register && reg > map->max_register)
return false;
if (map->writeable_reg)
return map->writeable_reg(map->dev, reg);
if (map->wr_table)
return regmap_check_range_table(map, reg, map->wr_table);
return true;
}
bool regmap_cached(struct regmap *map, unsigned int reg)
{
int ret;
unsigned int val;
if (map->cache_type == REGCACHE_NONE)
return false;
if (!map->cache_ops)
return false;
if (map->max_register && reg > map->max_register)
return false;
map->lock(map->lock_arg);
ret = regcache_read(map, reg, &val);
map->unlock(map->lock_arg);
if (ret)
return false;
return true;
}
bool regmap_readable(struct regmap *map, unsigned int reg)
{
if (!map->reg_read)
return false;
if (map->max_register && reg > map->max_register)
return false;
if (map->format.format_write)
return false;
if (map->readable_reg)
return map->readable_reg(map->dev, reg);
if (map->rd_table)
return regmap_check_range_table(map, reg, map->rd_table);
return true;
}
bool regmap_volatile(struct regmap *map, unsigned int reg)
{
if (!map->format.format_write && !regmap_readable(map, reg))
return false;
if (map->volatile_reg)
return map->volatile_reg(map->dev, reg);
if (map->volatile_table)
return regmap_check_range_table(map, reg, map->volatile_table);
if (map->cache_ops)
return false;
else
return true;
}
bool regmap_precious(struct regmap *map, unsigned int reg)
{
if (!regmap_readable(map, reg))
return false;
if (map->precious_reg)
return map->precious_reg(map->dev, reg);
if (map->precious_table)
return regmap_check_range_table(map, reg, map->precious_table);
return false;
}
bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
{
if (map->writeable_noinc_reg)
return map->writeable_noinc_reg(map->dev, reg);
if (map->wr_noinc_table)
return regmap_check_range_table(map, reg, map->wr_noinc_table);
return true;
}
bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
{
if (map->readable_noinc_reg)
return map->readable_noinc_reg(map->dev, reg);
if (map->rd_noinc_table)
return regmap_check_range_table(map, reg, map->rd_noinc_table);
return true;
}
static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
size_t num)
{
unsigned int i;
for (i = 0; i < num; i++)
if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
return false;
return true;
}
static void regmap_format_12_20_write(struct regmap *map,
unsigned int reg, unsigned int val)
{
u8 *out = map->work_buf;
out[0] = reg >> 4;
out[1] = (reg << 4) | (val >> 16);
out[2] = val >> 8;
out[3] = val;
}
static void regmap_format_2_6_write(struct regmap *map,
unsigned int reg, unsigned int val)
{
u8 *out = map->work_buf;
*out = (reg << 6) | val;
}
static void regmap_format_4_12_write(struct regmap *map,
unsigned int reg, unsigned int val)
{
__be16 *out = map->work_buf;
*out = cpu_to_be16((reg << 12) | val);
}
static void regmap_format_7_9_write(struct regmap *map,
unsigned int reg, unsigned int val)
{
__be16 *out = map->work_buf;
*out = cpu_to_be16((reg << 9) | val);
}
static void regmap_format_7_17_write(struct regmap *map,
unsigned int reg, unsigned int val)
{
u8 *out = map->work_buf;
out[2] = val;
out[1] = val >> 8;
out[0] = (val >> 16) | (reg << 1);
}
static void regmap_format_10_14_write(struct regmap *map,
unsigned int reg, unsigned int val)
{
u8 *out = map->work_buf;
out[2] = val;
out[1] = (val >> 8) | (reg << 6);
out[0] = reg >> 2;
}
static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
{
u8 *b = buf;
b[0] = val << shift;
}
static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
{
put_unaligned_be16(val << shift, buf);
}
static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
{
put_unaligned_le16(val << shift, buf);
}
static void regmap_format_16_native(void *buf, unsigned int val,
unsigned int shift)
{
u16 v = val << shift;
memcpy(buf, &v, sizeof(v));
}
static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
{
u8 *b = buf;
val <<= shift;
b[0] = val >> 16;
b[1] = val >> 8;
b[2] = val;
}
static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
{
put_unaligned_be32(val << shift, buf);
}
static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
{
put_unaligned_le32(val << shift, buf);
}
static void regmap_format_32_native(void *buf, unsigned int val,
unsigned int shift)
{
u32 v = val << shift;
memcpy(buf, &v, sizeof(v));
}
#ifdef CONFIG_64BIT
static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
{
put_unaligned_be64((u64) val << shift, buf);
}
static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
{
put_unaligned_le64((u64) val << shift, buf);
}
static void regmap_format_64_native(void *buf, unsigned int val,
unsigned int shift)
{
u64 v = (u64) val << shift;
memcpy(buf, &v, sizeof(v));
}
#endif
static void regmap_parse_inplace_noop(void *buf)
{
}
static unsigned int regmap_parse_8(const void *buf)
{
const u8 *b = buf;
return b[0];
}
static unsigned int regmap_parse_16_be(const void *buf)
{
return get_unaligned_be16(buf);
}
static unsigned int regmap_parse_16_le(const void *buf)
{
return get_unaligned_le16(buf);
}
static void regmap_parse_16_be_inplace(void *buf)
{
u16 v = get_unaligned_be16(buf);
memcpy(buf, &v, sizeof(v));
}
static void regmap_parse_16_le_inplace(void *buf)
{
u16 v = get_unaligned_le16(buf);
memcpy(buf, &v, sizeof(v));
}
static unsigned int regmap_parse_16_native(const void *buf)
{
u16 v;
memcpy(&v, buf, sizeof(v));
return v;
}
static unsigned int regmap_parse_24(const void *buf)
{
const u8 *b = buf;
unsigned int ret = b[2];
ret |= ((unsigned int)b[1]) << 8;
ret |= ((unsigned int)b[0]) << 16;
return ret;
}
static unsigned int regmap_parse_32_be(const void *buf)
{
return get_unaligned_be32(buf);
}
static unsigned int regmap_parse_32_le(const void *buf)
{
return get_unaligned_le32(buf);
}
static void regmap_parse_32_be_inplace(void *buf)
{
u32 v = get_unaligned_be32(buf);
memcpy(buf, &v, sizeof(v));
}
static void regmap_parse_32_le_inplace(void *buf)
{
u32 v = get_unaligned_le32(buf);
memcpy(buf, &v, sizeof(v));
}
static unsigned int regmap_parse_32_native(const void *buf)
{
u32 v;
memcpy(&v, buf, sizeof(v));
return v;
}
#ifdef CONFIG_64BIT
static unsigned int regmap_parse_64_be(const void *buf)
{
return get_unaligned_be64(buf);
}
static unsigned int regmap_parse_64_le(const void *buf)
{
return get_unaligned_le64(buf);
}
static void regmap_parse_64_be_inplace(void *buf)
{
u64 v = get_unaligned_be64(buf);
memcpy(buf, &v, sizeof(v));
}
static void regmap_parse_64_le_inplace(void *buf)
{
u64 v = get_unaligned_le64(buf);
memcpy(buf, &v, sizeof(v));
}
static unsigned int regmap_parse_64_native(const void *buf)
{
u64 v;
memcpy(&v, buf, sizeof(v));
return v;
}
#endif
static void regmap_lock_hwlock(void *__map)
{
struct regmap *map = __map;
hwspin_lock_timeout(map->hwlock, UINT_MAX);
}
static void regmap_lock_hwlock_irq(void *__map)
{
struct regmap *map = __map;
hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
}
static void regmap_lock_hwlock_irqsave(void *__map)
{
struct regmap *map = __map;
hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
&map->spinlock_flags);
}
static void regmap_unlock_hwlock(void *__map)
{
struct regmap *map = __map;
hwspin_unlock(map->hwlock);
}
static void regmap_unlock_hwlock_irq(void *__map)
{
struct regmap *map = __map;
hwspin_unlock_irq(map->hwlock);
}
static void regmap_unlock_hwlock_irqrestore(void *__map)
{
struct regmap *map = __map;
hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
}
static void regmap_lock_unlock_none(void *__map)
{
}
static void regmap_lock_mutex(void *__map)
{
struct regmap *map = __map;
mutex_lock(&map->mutex);
}
static void regmap_unlock_mutex(void *__map)
{
struct regmap *map = __map;
mutex_unlock(&map->mutex);
}
static void regmap_lock_spinlock(void *__map)
__acquires(&map->spinlock)
{
struct regmap *map = __map;
unsigned long flags;
spin_lock_irqsave(&map->spinlock, flags);
map->spinlock_flags = flags;
}
static void regmap_unlock_spinlock(void *__map)
__releases(&map->spinlock)
{
struct regmap *map = __map;
spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
}
static void regmap_lock_raw_spinlock(void *__map)
__acquires(&map->raw_spinlock)
{
struct regmap *map = __map;
unsigned long flags;
raw_spin_lock_irqsave(&map->raw_spinlock, flags);
map->raw_spinlock_flags = flags;
}
static void regmap_unlock_raw_spinlock(void *__map)
__releases(&map->raw_spinlock)
{
struct regmap *map = __map;
raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
}
static void dev_get_regmap_release(struct device *dev, void *res)
{
/*
* We don't actually have anything to do here; the goal here
* is not to manage the regmap but to provide a simple way to
* get the regmap back given a struct device.
*/
}
static bool _regmap_range_add(struct regmap *map,
struct regmap_range_node *data)
{
struct rb_root *root = &map->range_tree;
struct rb_node **new = &(root->rb_node), *parent = NULL;
while (*new) {
struct regmap_range_node *this =
rb_entry(*new, struct regmap_range_node, node);
parent = *new;
if (data->range_max < this->range_min)
new = &((*new)->rb_left);
else if (data->range_min > this->range_max)
new = &((*new)->rb_right);
else
return false;
}
rb_link_node(&data->node, parent, new);
rb_insert_color(&data->node, root);
return true;
}
static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
unsigned int reg)
{
struct rb_node *node = map->range_tree.rb_node;
while (node) {
struct regmap_range_node *this =
rb_entry(node, struct regmap_range_node, node);
if (reg < this->range_min)
node = node->rb_left;
else if (reg > this->range_max)
node = node->rb_right;
else
return this;
}
return NULL;
}
static void regmap_range_exit(struct regmap *map)
{
struct rb_node *next;
struct regmap_range_node *range_node;
next = rb_first(&map->range_tree);
while (next) {
range_node = rb_entry(next, struct regmap_range_node, node);
next = rb_next(&range_node->node);
rb_erase(&range_node->node, &map->range_tree);
kfree(range_node);
}
kfree(map->selector_work_buf);
}
static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
{
if (config->name) {
const char *name = kstrdup_const(config->name, GFP_KERNEL);
if (!name)
return -ENOMEM;
kfree_const(map->name);
map->name = name;
}
return 0;
}
int regmap_attach_dev(struct device *dev, struct regmap *map,
const struct regmap_config *config)
{
struct regmap **m;
int ret;
map->dev = dev;
ret = regmap_set_name(map, config);
if (ret)
return ret;
regmap_debugfs_exit(map);
regmap_debugfs_init(map);
/* Add a devres resource for dev_get_regmap() */
m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
if (!m) {
regmap_debugfs_exit(map);
return -ENOMEM;
}
*m = map;
devres_add(dev, m);
return 0;
}
EXPORT_SYMBOL_GPL(regmap_attach_dev);
static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
const struct regmap_config *config)
{
enum regmap_endian endian;
/* Retrieve the endianness specification from the regmap config */
endian = config->reg_format_endian;
/* If the regmap config specified a non-default value, use that */
if (endian != REGMAP_ENDIAN_DEFAULT)
return endian;
/* Retrieve the endianness specification from the bus config */
if (bus && bus->reg_format_endian_default)
endian = bus->reg_format_endian_default;
/* If the bus specified a non-default value, use that */
if (endian != REGMAP_ENDIAN_DEFAULT)
return endian;
/* Use this if no other value was found */
return REGMAP_ENDIAN_BIG;
}
enum regmap_endian regmap_get_val_endian(struct device *dev,
const struct regmap_bus *bus,
const struct regmap_config *config)
{
struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
enum regmap_endian endian;
/* Retrieve the endianness specification from the regmap config */
endian = config->val_format_endian;
/* If the regmap config specified a non-default value, use that */
if (endian != REGMAP_ENDIAN_DEFAULT)
return endian;
/* If the firmware node exist try to get endianness from it */
if (fwnode_property_read_bool(fwnode, "big-endian"))
endian = REGMAP_ENDIAN_BIG;
else if (fwnode_property_read_bool(fwnode, "little-endian"))
endian = REGMAP_ENDIAN_LITTLE;
else if (fwnode_property_read_bool(fwnode, "native-endian"))
endian = REGMAP_ENDIAN_NATIVE;
/* If the endianness was specified in fwnode, use that */
if (endian != REGMAP_ENDIAN_DEFAULT)
return endian;
/* Retrieve the endianness specification from the bus config */
if (bus && bus->val_format_endian_default)
endian = bus->val_format_endian_default;
/* If the bus specified a non-default value, use that */
if (endian != REGMAP_ENDIAN_DEFAULT)
return endian;
/* Use this if no other value was found */
return REGMAP_ENDIAN_BIG;
}
EXPORT_SYMBOL_GPL(regmap_get_val_endian);
struct regmap *__regmap_init(struct device *dev,
const struct regmap_bus *bus,
void *bus_context,
const struct regmap_config *config,
struct lock_class_key *lock_key,
const char *lock_name)
{
struct regmap *map;
int ret = -EINVAL;
enum regmap_endian reg_endian, val_endian;
int i, j;
if (!config)
goto err;
map = kzalloc(sizeof(*map), GFP_KERNEL);
if (map == NULL) {
ret = -ENOMEM;
goto err;
}
ret = regmap_set_name(map, config);
if (ret)
goto err_map;
ret = -EINVAL; /* Later error paths rely on this */
if (config->disable_locking) {
map->lock = map->unlock = regmap_lock_unlock_none;
map->can_sleep = config->can_sleep;
regmap_debugfs_disable(map);
} else if (config->lock && config->unlock) {
map->lock = config->lock;
map->unlock = config->unlock;
map->lock_arg = config->lock_arg;
map->can_sleep = config->can_sleep;
} else if (config->use_hwlock) {
map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
if (!map->hwlock) {
ret = -ENXIO;
goto err_name;
}
switch (config->hwlock_mode) {
case HWLOCK_IRQSTATE:
map->lock = regmap_lock_hwlock_irqsave;
map->unlock = regmap_unlock_hwlock_irqrestore;
break;
case HWLOCK_IRQ:
map->lock = regmap_lock_hwlock_irq;
map->unlock = regmap_unlock_hwlock_irq;
break;
default:
map->lock = regmap_lock_hwlock;
map->unlock = regmap_unlock_hwlock;
break;
}
map->lock_arg = map;
} else {
if ((bus && bus->fast_io) ||
config->fast_io) {
if (config->use_raw_spinlock) {
raw_spin_lock_init(&map->raw_spinlock);
map->lock = regmap_lock_raw_spinlock;
map->unlock = regmap_unlock_raw_spinlock;
lockdep_set_class_and_name(&map->raw_spinlock,
lock_key, lock_name);
} else {
spin_lock_init(&map->spinlock);
map->lock = regmap_lock_spinlock;
map->unlock = regmap_unlock_spinlock;
lockdep_set_class_and_name(&map->spinlock,
lock_key, lock_name);
}
} else {
mutex_init(&map->mutex);
map->lock = regmap_lock_mutex;
map->unlock = regmap_unlock_mutex;
map->can_sleep = true;
lockdep_set_class_and_name(&map->mutex,
lock_key, lock_name);
}
map->lock_arg = map;
}
/*
* When we write in fast-paths with regmap_bulk_write() don't allocate
* scratch buffers with sleeping allocations.
*/
if ((bus && bus->fast_io) || config->fast_io)
map->alloc_flags = GFP_ATOMIC;
else
map->alloc_flags = GFP_KERNEL;
map->reg_base = config->reg_base;
map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
map->format.pad_bytes = config->pad_bits / 8;
map->format.reg_downshift = config->reg_downshift;
map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
config->val_bits + config->pad_bits, 8);
map->reg_shift = config->pad_bits % 8;
if (config->reg_stride)
map->reg_stride = config->reg_stride;
else
map->reg_stride = 1;
if (is_power_of_2(map->reg_stride))
map->reg_stride_order = ilog2(map->reg_stride);
else
map->reg_stride_order = -1;
map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
if (bus) {
map->max_raw_read = bus->max_raw_read;
map->max_raw_write = bus->max_raw_write;
} else if (config->max_raw_read && config->max_raw_write) {
map->max_raw_read = config->max_raw_read;
map->max_raw_write = config->max_raw_write;
}
map->dev = dev;
map->bus = bus;
map->bus_context = bus_context;
map->max_register = config->max_register;
map->wr_table = config->wr_table;
map->rd_table = config->rd_table;
map->volatile_table = config->volatile_table;
map->precious_table = config->precious_table;
map->wr_noinc_table = config->wr_noinc_table;
map->rd_noinc_table = config->rd_noinc_table;
map->writeable_reg = config->writeable_reg;
map->readable_reg = config->readable_reg;
map->volatile_reg = config->volatile_reg;
map->precious_reg = config->precious_reg;
map->writeable_noinc_reg = config->writeable_noinc_reg;
map->readable_noinc_reg = config->readable_noinc_reg;
map->cache_type = config->cache_type;
spin_lock_init(&map->async_lock);
INIT_LIST_HEAD(&map->async_list);
INIT_LIST_HEAD(&map->async_free);
init_waitqueue_head(&map->async_waitq);
if (config->read_flag_mask ||
config->write_flag_mask ||
config->zero_flag_mask) {
map->read_flag_mask = config->read_flag_mask;
map->write_flag_mask = config->write_flag_mask;
} else if (bus) {
map->read_flag_mask = bus->read_flag_mask;
}
if (config && config->read && config->write) {
map->reg_read = _regmap_bus_read;
/* Bulk read/write */
map->read = config->read;
map->write = config->write;
reg_endian = REGMAP_ENDIAN_NATIVE;
val_endian = REGMAP_ENDIAN_NATIVE;
} else if (!bus) {
map->reg_read = config->reg_read;
map->reg_write = config->reg_write;
map->reg_update_bits = config->reg_update_bits;
map->defer_caching = false;
goto skip_format_initialization;
} else if (!bus->read || !bus->write) {
map->reg_read = _regmap_bus_reg_read;
map->reg_write = _regmap_bus_reg_write;
map->reg_update_bits = bus->reg_update_bits;
map->defer_caching = false;
goto skip_format_initialization;
} else {
map->reg_read = _regmap_bus_read;
map->reg_update_bits = bus->reg_update_bits;
/* Bulk read/write */
map->read = bus->read;
map->write = bus->write;
reg_endian = regmap_get_reg_endian(bus, config);
val_endian = regmap_get_val_endian(dev, bus, config);
}
switch (config->reg_bits + map->reg_shift) {
case 2:
switch (config->val_bits) {
case 6:
map->format.format_write = regmap_format_2_6_write;
break;
default:
goto err_hwlock;
}
break;
case 4:
switch (config->val_bits) {
case 12:
map->format.format_write = regmap_format_4_12_write;
break;
default:
goto err_hwlock;
}
break;
case 7:
switch (config->val_bits) {
case 9:
map->format.format_write = regmap_format_7_9_write;
break;
case 17:
map->format.format_write = regmap_format_7_17_write;
break;
default:
goto err_hwlock;
}
break;
case 10:
switch (config->val_bits) {
case 14:
map->format.format_write = regmap_format_10_14_write;
break;
default:
goto err_hwlock;
}
break;
case 12:
switch (config->val_bits) {
case 20:
map->format.format_write = regmap_format_12_20_write;
break;
default:
goto err_hwlock;
}
break;
case 8:
map->format.format_reg = regmap_format_8;
break;
case 16:
switch (reg_endian) {
case REGMAP_ENDIAN_BIG:
map->format.format_reg = regmap_format_16_be;
break;
case REGMAP_ENDIAN_LITTLE:
map->format.format_reg = regmap_format_16_le;
break;
case REGMAP_ENDIAN_NATIVE:
map->format.format_reg = regmap_format_16_native;
break;
default:
goto err_hwlock;
}
break;
case 24:
if (reg_endian != REGMAP_ENDIAN_BIG)
goto err_hwlock;
map->format.format_reg = regmap_format_24;
break;
case 32:
switch (reg_endian) {
case REGMAP_ENDIAN_BIG:
map->format.format_reg = regmap_format_32_be;