Increase pixel clock - If pixel clock is not set correctly it is not …

…divisable by one of the clocks and device limits to around 50FPS. This number allows fps up to the refresh rate of panel. Which is the correct function
matthawk60 · Mar 1, 2012 · 4cd39cd · 4cd39cd · clemsyn · Mar 4, 2012
1 parent db2d5a8
commit 4cd39cd
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/arch/arm/mach-tegra/board-smba1002-gpu.c b/arch/arm/mach-tegra/board-smba1002-gpu.c
@@ -171,7 +171,7 @@ static int smba1002_hdmi_disable(void)
 
 static struct tegra_dc_mode smba1002_panel_modes[] = {
 	{
-		.pclk = 42430000,
+		.pclk = 68419300,    //42430000,
 		.h_ref_to_sync = 4,
 		.v_ref_to_sync = 2,
 		.h_sync_width = 136,