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pcie_7x_0.xci
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pcie_7x_0.xci
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{
"schema": "xilinx.com:schema:json_instance:1.0",
"ip_inst": {
"xci_name": "pcie_7x_0",
"component_reference": "xilinx.com:ip:pcie_7x:3.3",
"ip_revision": "20",
"gen_directory": "../../../../pcileech_squirrel.gen/sources_1/ip/pcie_7x_0",
"parameters": {
"component_parameters": {
"mode_selection": [ { "value": "Advanced", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"pcie_id_if": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Use_Class_Code_Lookup_Assistant": [ { "value": "false", "resolve_type": "user", "usage": "all" } ],
"Component_Name": [ { "value": "pcie_7x_0", "resolve_type": "user", "usage": "all" } ],
"Device_Port_Type": [ { "value": "PCI_Express_Endpoint_device", "resolve_type": "user", "usage": "all" } ],
"Maximum_Link_Width": [ { "value": "X1", "resolve_type": "user", "usage": "all" } ],
"Link_Speed": [ { "value": "5.0_GT/s", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Interface_Width": [ { "value": "64_bit", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"User_Clk_Freq": [ { "value": "62.5", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Bar0_Enabled": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar0_Type": [ { "value": "Memory", "resolve_type": "user", "usage": "all" } ],
"Bar0_64bit": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar0_Prefetchable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar0_Scale": [ { "value": "Kilobytes", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Bar0_Size": [ { "value": "4", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Bar1_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar1_Type": [ { "value": "N/A", "resolve_type": "user", "usage": "all" } ],
"Bar1_64bit": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar1_Prefetchable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar1_Scale": [ { "value": "Kilobytes", "resolve_type": "user", "usage": "all" } ],
"Bar1_Size": [ { "value": "2", "resolve_type": "user", "usage": "all" } ],
"Bar2_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar2_Type": [ { "value": "N/A", "resolve_type": "user", "usage": "all" } ],
"Bar2_64bit": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar2_Prefetchable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar2_Scale": [ { "value": "Kilobytes", "resolve_type": "user", "usage": "all" } ],
"Bar2_Size": [ { "value": "2", "resolve_type": "user", "usage": "all" } ],
"Bar3_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar3_Type": [ { "value": "N/A", "resolve_type": "user", "usage": "all" } ],
"Bar3_64bit": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar3_Prefetchable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar3_Scale": [ { "value": "Kilobytes", "resolve_type": "user", "usage": "all" } ],
"Bar3_Size": [ { "value": "2", "resolve_type": "user", "usage": "all" } ],
"Bar4_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar4_Type": [ { "value": "N/A", "resolve_type": "user", "usage": "all" } ],
"Bar4_64bit": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar4_Prefetchable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar4_Scale": [ { "value": "Kilobytes", "resolve_type": "user", "usage": "all" } ],
"Bar4_Size": [ { "value": "2", "resolve_type": "user", "usage": "all" } ],
"Bar5_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar5_Type": [ { "value": "N/A", "resolve_type": "user", "usage": "all" } ],
"Bar5_Prefetchable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Bar5_Scale": [ { "value": "Kilobytes", "resolve_type": "user", "usage": "all" } ],
"Bar5_Size": [ { "value": "2", "resolve_type": "user", "usage": "all" } ],
"Expansion_Rom_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Expansion_Rom_Scale": [ { "value": "Kilobytes", "resolve_type": "user", "usage": "all" } ],
"Expansion_Rom_Size": [ { "value": "2", "resolve_type": "user", "usage": "all" } ],
"IO_Base_Limit_Registers": [ { "value": "Disabled", "resolve_type": "user", "usage": "all" } ],
"Prefetchable_Memory_Base_Limit_Registers": [ { "value": "Disabled", "resolve_type": "user", "usage": "all" } ],
"Vendor_ID": [ { "value": "10EE", "resolve_type": "user", "usage": "all" } ],
"Device_ID": [ { "value": "0666", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Revision_ID": [ { "value": "02", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Subsystem_Vendor_ID": [ { "value": "10EE", "resolve_type": "user", "usage": "all" } ],
"Subsystem_ID": [ { "value": "0007", "resolve_type": "user", "usage": "all" } ],
"Class_Code_Base": [ { "value": "02", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Class_Code_Sub": [ { "value": "00", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Class_Code_Interface": [ { "value": "00", "resolve_type": "user", "usage": "all" } ],
"Base_Class_Menu": [ { "value": "Network_controller", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Sub_Class_Interface_Menu": [ { "value": "Ethernet_controller", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Cardbus_CIS_Pointer": [ { "value": "00000000", "resolve_type": "user", "usage": "all" } ],
"PCIe_Cap_Slot_Implemented": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Max_Payload_Size": [ { "value": "512_bytes", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Extended_Tag_Field": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Extended_Tag_Default": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Phantom_Functions": [ { "value": "No_function_number_bits_used", "resolve_type": "user", "usage": "all" } ],
"Acceptable_L0s_Latency": [ { "value": "No_limit", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Acceptable_L1_Latency": [ { "value": "No_limit", "resolve_type": "user", "usage": "all" } ],
"Cpl_Finite": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Cpl_Timeout_Disable_Sup": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Cpl_Timeout_Range": [ { "value": "Range_B", "resolve_type": "user", "usage": "all" } ],
"Buf_Opt_BMA": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Perf_Level": [ { "value": "High", "resolve_type": "user", "usage": "all" } ],
"Dll_Link_Active_Cap": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"RCB": [ { "value": "64_byte", "resolve_type": "user", "usage": "all" } ],
"Trgt_Link_Speed": [ { "value": "4'h2", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Hw_Auton_Spd_Disable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"De_emph": [ { "value": "-3.5", "resolve_type": "user", "usage": "all" } ],
"Enable_Slot_Clock_Cfg": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Root_Cap_CRS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_Attn_Butn": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_Pwr_Ctrl": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_MRL": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_Attn_Ind": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_Pwr_Ind": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_HotPlug_Surprise": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_HotPlug_Cap": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_Elec_Interlock": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_No_Cmd_Comp_Sup": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Slot_Cap_Pwr_Limit_Value": [ { "value": "0", "resolve_type": "user", "usage": "all" } ],
"Slot_Cap_Pwr_Limit_Scale": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Slot_Cap_Physical_Slot_Num": [ { "value": "0", "resolve_type": "user", "usage": "all" } ],
"IntX_Generation": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Legacy_Interrupt": [ { "value": "INTA", "resolve_type": "user", "usage": "all" } ],
"MSI_Enabled": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MSI_64b": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Multiple_Message_Capable": [ { "value": "1_vector", "resolve_type": "user", "usage": "all" } ],
"MSI_Vec_Mask": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MSIx_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MSIx_Table_Size": [ { "value": "1", "resolve_type": "user", "usage": "all" } ],
"MSIx_Table_Offset": [ { "value": "0", "resolve_type": "user", "usage": "all" } ],
"MSIx_Table_BIR": [ { "value": "BAR_0", "resolve_type": "user", "usage": "all" } ],
"MSIx_PBA_Offset": [ { "value": "0", "resolve_type": "user", "usage": "all" } ],
"MSIx_PBA_BIR": [ { "value": "BAR_0", "resolve_type": "user", "usage": "all" } ],
"Device_Specific_Initialization": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D1_Support": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D2_Support": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D0_PME_Support": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D1_PME_Support": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D2_PME_Support": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D3hot_PME_Support": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D3cold_PME_Support": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"No_Soft_Reset": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"D0_Power_Consumed": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D0_Power_Consumed_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D1_Power_Consumed": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D1_Power_Consumed_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D2_Power_Consumed": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D2_Power_Consumed_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D3_Power_Consumed": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D3_Power_Consumed_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D0_Power_Dissipated": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D0_Power_Dissipated_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D1_Power_Dissipated": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D1_Power_Dissipated_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D2_Power_Dissipated": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D2_Power_Dissipated_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D3_Power_Dissipated": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"D3_Power_Dissipated_Factor": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"DSN_Enabled": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"VC_Cap_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"VC_Cap_Reject_Snoop": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"VSEC_Enabled": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"PCI_CFG_Space": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"PCI_CFG_Space_Addr": [ { "value": "2A", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
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"abstraction_type": "xilinx.com:interface:axis_rtl:1.0",
"mode": "master",
"parameters": {
"TDATA_NUM_BYTES": [ { "value": "8", "value_src": "auto", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"TDEST_WIDTH": [ { "value": "0", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"TID_WIDTH": [ { "value": "0", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"TUSER_WIDTH": [ { "value": "22", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TREADY": [ { "value": "1", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TSTRB": [ { "value": "0", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TKEEP": [ { "value": "1", "value_src": "auto", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TLAST": [ { "value": "1", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"LAYERED_METADATA": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"TDATA": [ { "physical_name": "m_axis_rx_tdata" } ],
"TKEEP": [ { "physical_name": "m_axis_rx_tkeep" } ],
"TLAST": [ { "physical_name": "m_axis_rx_tlast" } ],
"TREADY": [ { "physical_name": "m_axis_rx_tready" } ],
"TUSER": [ { "physical_name": "m_axis_rx_tuser" } ],
"TVALID": [ { "physical_name": "m_axis_rx_tvalid" } ]
}
},
"s_axis_tx": {
"vlnv": "xilinx.com:interface:axis:1.0",
"abstraction_type": "xilinx.com:interface:axis_rtl:1.0",
"mode": "slave",
"parameters": {
"TDATA_NUM_BYTES": [ { "value": "8", "value_src": "auto", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"TDEST_WIDTH": [ { "value": "0", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"TID_WIDTH": [ { "value": "0", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"TUSER_WIDTH": [ { "value": "4", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TREADY": [ { "value": "1", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TSTRB": [ { "value": "0", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TKEEP": [ { "value": "1", "value_src": "auto", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_TLAST": [ { "value": "1", "value_src": "constant", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"LAYERED_METADATA": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"TDATA": [ { "physical_name": "s_axis_tx_tdata" } ],
"TKEEP": [ { "physical_name": "s_axis_tx_tkeep" } ],
"TLAST": [ { "physical_name": "s_axis_tx_tlast" } ],
"TREADY": [ { "physical_name": "s_axis_tx_tready" } ],
"TUSER": [ { "physical_name": "s_axis_tx_tuser" } ],
"TVALID": [ { "physical_name": "s_axis_tx_tvalid" } ]
}
},
"pcie_7x_mgt": {
"vlnv": "xilinx.com:interface:pcie_7x_mgt:1.0",
"abstraction_type": "xilinx.com:interface:pcie_7x_mgt_rtl:1.0",
"mode": "master",
"port_maps": {
"rxn": [ { "physical_name": "pci_exp_rxn" } ],
"rxp": [ { "physical_name": "pci_exp_rxp" } ],
"txn": [ { "physical_name": "pci_exp_txn" } ],
"txp": [ { "physical_name": "pci_exp_txp" } ]
}
},
"drp": {
"vlnv": "xilinx.com:interface:drp:1.0",
"abstraction_type": "xilinx.com:interface:drp_rtl:1.0",
"mode": "slave",
"port_maps": {
"DADDR": [ { "physical_name": "pcie_drp_addr" } ],
"DEN": [ { "physical_name": "pcie_drp_en" } ],
"DI": [ { "physical_name": "pcie_drp_di" } ],
"DO": [ { "physical_name": "pcie_drp_do" } ],
"DRDY": [ { "physical_name": "pcie_drp_rdy" } ],
"DWE": [ { "physical_name": "pcie_drp_we" } ]
}
},
"CLK.sys_clk": {
"vlnv": "xilinx.com:signal:clock:1.0",
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
"mode": "slave",
"parameters": {
"FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"CLK": [ { "physical_name": "sys_clk" } ]
}
},
"CLK.user_clk_out": {
"vlnv": "xilinx.com:signal:clock:1.0",
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
"mode": "master",
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "m_axis_rx:s_axis_tx", "value_src": "constant", "usage": "all" } ],
"FREQ_HZ": [ { "value": "125000000", "value_src": "constant", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "user_reset_out", "value_src": "constant", "usage": "all" } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"CLK": [ { "physical_name": "user_clk_out" } ]
}
},
"RST.sys_rst_n": {
"vlnv": "xilinx.com:signal:reset:1.0",
"abstraction_type": "xilinx.com:signal:reset_rtl:1.0",
"mode": "slave",
"parameters": {
"POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "usage": "all" } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"RST": [ { "physical_name": "sys_rst_n" } ]
}
},
"RST.user_reset_out": {
"vlnv": "xilinx.com:signal:reset:1.0",
"abstraction_type": "xilinx.com:signal:reset_rtl:1.0",
"mode": "master",
"parameters": {
"POLARITY": [ { "value": "ACTIVE_HIGH", "value_src": "constant", "usage": "all" } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"RST": [ { "physical_name": "user_reset_out" } ]
}
},
"pcie2_cfg_interrupt": {
"vlnv": "xilinx.com:interface:pcie2_cfg_interrupt:1.0",
"abstraction_type": "xilinx.com:interface:pcie2_cfg_interrupt_rtl:1.0",
"mode": "slave",
"port_maps": {
"assert": [ { "physical_name": "cfg_interrupt_assert" } ],
"interrupt": [ { "physical_name": "cfg_interrupt" } ],
"mmenable": [ { "physical_name": "cfg_interrupt_mmenable" } ],
"msienable": [ { "physical_name": "cfg_interrupt_msienable" } ],
"msixenable": [ { "physical_name": "cfg_interrupt_msixenable" } ],
"msixfm": [ { "physical_name": "cfg_interrupt_msixfm" } ],
"pciecap_interrupt_msgnum": [ { "physical_name": "cfg_pciecap_interrupt_msgnum" } ],
"rdy": [ { "physical_name": "cfg_interrupt_rdy" } ],
"read_data": [ { "physical_name": "cfg_interrupt_do" } ],
"stat": [ { "physical_name": "cfg_interrupt_stat" } ],
"write_data": [ { "physical_name": "cfg_interrupt_di" } ]
}
},
"pcie2_cfg_status": {
"vlnv": "xilinx.com:interface:pcie2_cfg_status:1.0",
"abstraction_type": "xilinx.com:interface:pcie2_cfg_status_rtl:1.0",
"mode": "master",
"port_maps": {
"aer_rooterr_corr_err_received": [ { "physical_name": "cfg_aer_rooterr_corr_err_received" } ],
"aer_rooterr_corr_err_reporting_en": [ { "physical_name": "cfg_aer_rooterr_corr_err_reporting_en" } ],
"aer_rooterr_fatal_err_received": [ { "physical_name": "cfg_aer_rooterr_fatal_err_received" } ],
"aer_rooterr_fatal_err_reporting_en": [ { "physical_name": "cfg_aer_rooterr_fatal_err_reporting_en" } ],
"aer_rooterr_non_fatal_err_received": [ { "physical_name": "cfg_aer_rooterr_non_fatal_err_received" } ],
"aer_rooterr_non_fatal_err_reporting_en": [ { "physical_name": "cfg_aer_rooterr_non_fatal_err_reporting_en" } ],
"bridge_serr_en": [ { "physical_name": "cfg_bridge_serr_en" } ],
"bus_number": [ { "physical_name": "cfg_bus_number" } ],
"command": [ { "physical_name": "cfg_command" } ],
"dcommand": [ { "physical_name": "cfg_dcommand" } ],
"dcommand2": [ { "physical_name": "cfg_dcommand2" } ],
"device_number": [ { "physical_name": "cfg_device_number" } ],
"dstatus": [ { "physical_name": "cfg_dstatus" } ],
"function_number": [ { "physical_name": "cfg_function_number" } ],
"lcommand": [ { "physical_name": "cfg_lcommand" } ],
"lstatus": [ { "physical_name": "cfg_lstatus" } ],
"pcie_link_state": [ { "physical_name": "cfg_pcie_link_state" } ],
"pmcsr_pme_en": [ { "physical_name": "cfg_pmcsr_pme_en" } ],
"pmcsr_pme_status": [ { "physical_name": "cfg_pmcsr_pme_status" } ],
"pmcsr_powerstate": [ { "physical_name": "cfg_pmcsr_powerstate" } ],
"received_func_lvl_rst": [ { "physical_name": "cfg_received_func_lvl_rst" } ],
"root_control_pme_int_en": [ { "physical_name": "cfg_root_control_pme_int_en" } ],
"root_control_syserr_corr_err_en": [ { "physical_name": "cfg_root_control_syserr_corr_err_en" } ],
"root_control_syserr_fatal_err_en": [ { "physical_name": "cfg_root_control_syserr_fatal_err_en" } ],
"root_control_syserr_non_fatal_err_en": [ { "physical_name": "cfg_root_control_syserr_non_fatal_err_en" } ],
"slot_control_electromech_il_ctl_pulse": [ { "physical_name": "cfg_slot_control_electromech_il_ctl_pulse" } ],
"status": [ { "physical_name": "cfg_status" } ],
"turnoff": [ { "physical_name": "cfg_to_turnoff" } ],
"tx_buf_av": [ { "physical_name": "tx_buf_av" } ],
"tx_cfg_req": [ { "physical_name": "tx_cfg_req" } ],
"tx_err_drop": [ { "physical_name": "tx_err_drop" } ],
"vc_tcvc_map": [ { "physical_name": "cfg_vc_tcvc_map" } ]
}
},
"pcie2_cfg_control": {
"vlnv": "xilinx.com:interface:pcie2_cfg_control:1.0",
"abstraction_type": "xilinx.com:interface:pcie2_cfg_control_rtl:1.0",
"mode": "slave",
"port_maps": {
"ds_bus_number": [ { "physical_name": "cfg_ds_bus_number" } ],
"ds_device_number": [ { "physical_name": "cfg_ds_device_number" } ],
"ds_function_number": [ { "physical_name": "cfg_ds_function_number" } ],
"dsn": [ { "physical_name": "cfg_dsn" } ],
"pm_force_state": [ { "physical_name": "cfg_pm_force_state" } ],
"pm_force_state_en": [ { "physical_name": "cfg_pm_force_state_en" } ],
"pm_halt_aspm_l0s": [ { "physical_name": "cfg_pm_halt_aspm_l0s" } ],
"pm_halt_aspm_l1": [ { "physical_name": "cfg_pm_halt_aspm_l1" } ],
"pm_send_pme_to": [ { "physical_name": "cfg_pm_send_pme_to" } ],
"pm_wake": [ { "physical_name": "cfg_pm_wake" } ],
"rx_np_ok": [ { "physical_name": "rx_np_ok" } ],
"rx_np_req": [ { "physical_name": "rx_np_req" } ],
"trn_pending": [ { "physical_name": "cfg_trn_pending" } ],
"turnoff_ok": [ { "physical_name": "cfg_turnoff_ok" } ],
"tx_cfg_gnt": [ { "physical_name": "tx_cfg_gnt" } ]
}
},
"pcie_cfg_mgmt": {
"vlnv": "xilinx.com:interface:pcie_cfg_mgmt:1.0",
"abstraction_type": "xilinx.com:interface:pcie_cfg_mgmt_rtl:1.0",
"mode": "slave",
"port_maps": {
"ADDR": [ { "physical_name": "cfg_mgmt_dwaddr" } ],
"BYTE_EN": [ { "physical_name": "cfg_mgmt_byte_en" } ],
"READ_DATA": [ { "physical_name": "cfg_mgmt_do" } ],
"READ_EN": [ { "physical_name": "cfg_mgmt_rd_en" } ],
"READ_WRITE_DONE": [ { "physical_name": "cfg_mgmt_rd_wr_done" } ],
"READONLY": [ { "physical_name": "cfg_mgmt_wr_readonly" } ],
"TYPE1_CFG_REG_ACCESS": [ { "physical_name": "cfg_mgmt_wr_rw1c_as_rw" } ],
"WRITE_DATA": [ { "physical_name": "cfg_mgmt_di" } ],
"WRITE_EN": [ { "physical_name": "cfg_mgmt_wr_en" } ]
}
},
"pcie2_pl": {
"vlnv": "xilinx.com:interface:pcie2_pl:1.0",
"abstraction_type": "xilinx.com:interface:pcie2_pl_rtl:1.0",
"mode": "slave",
"port_maps": {
"directed_change_done": [ { "physical_name": "pl_directed_change_done" } ],
"directed_link_auton": [ { "physical_name": "pl_directed_link_auton" } ],
"directed_link_change": [ { "physical_name": "pl_directed_link_change" } ],
"directed_link_speed": [ { "physical_name": "pl_directed_link_speed" } ],
"directed_link_width": [ { "physical_name": "pl_directed_link_width" } ],
"downstream_deemph_source": [ { "physical_name": "pl_downstream_deemph_source" } ],
"initial_link_width": [ { "physical_name": "pl_initial_link_width" } ],
"lane_reversal_mode": [ { "physical_name": "pl_lane_reversal_mode" } ],
"link_gen2_cap": [ { "physical_name": "pl_link_gen2_cap" } ],
"link_partner_gen2_supported": [ { "physical_name": "pl_link_partner_gen2_supported" } ],
"link_upcfg_cap": [ { "physical_name": "pl_link_upcfg_cap" } ],
"ltssm_state": [ { "physical_name": "pl_ltssm_state" } ],
"phy_lnk_up": [ { "physical_name": "pl_phy_lnk_up" } ],
"received_hot_rst": [ { "physical_name": "pl_received_hot_rst" } ],
"rx_pm_state": [ { "physical_name": "pl_rx_pm_state" } ],
"sel_lnk_rate": [ { "physical_name": "pl_sel_lnk_rate" } ],
"sel_lnk_width": [ { "physical_name": "pl_sel_lnk_width" } ],
"transmit_hot_rst": [ { "physical_name": "pl_transmit_hot_rst" } ],
"tx_pm_state": [ { "physical_name": "pl_tx_pm_state" } ],
"upstream_prefer_deemph": [ { "physical_name": "pl_upstream_prefer_deemph" } ]
}
}
}
}
}
}