RISC-V Support

[nderjung]

Add support for RISC-V architecture.

Summary of objectives

• Introduce initial riscv64 support #461
• Add SMP support.
• Do code restructuring during/after platform rearchitecting.
• Add any other features that may be currently missing from the RISC-V port and are present in other architectures.

Depends on: #586

[dorin-ionita]

hello,

this one looks interesting to me and since I can't see anyone taking this ticket already, I might as well give it a shot myself.

BR,
Dorin

[mwbasha]

@dorin-ionita I am interested in the RISC-V port of unikraft, and since the patches are sent using the mailing list, I would like to know the progress.
Now I have Allwinner D1 RISC-V 64-bit single-core, which board are you using for demonstration?! and which RISC-V are you porting for now, 32-bit oder 64-bit? and which platform are you testing against? (AFAK Xen doesn't have RISC-V port available yet).
P.S. if you didn't start yet, or you are going to postpone it, I am interested to take this issue#60.
Thanks
Basha

[nderjung]

Hi @mwbasha,

Thanks for your interest in bringing Unikraft to RISC-V architectures! We have an active channel on our Discord server where we are discussing on-going progress. Please join if you can! (:

Thanks! 🐒