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The pages above 4-GiB won't work with hardware that uses 32-bit addresses.
Therefore, it will be useful if generic pages are allocated above 4-GiB if available, to maximize the number of pages usable by such hardware.
On IA-32 with PAE (and AMD64 before switching to long mode), CR3 is 32 bits wide so the relevant table must be located under 4-GiB as well.
I'd rather build this into the generic page allocator because it is a situation that can happen on more than one architecture. Also, it will allow for slightly more compact storage.
I should also move the map and the stack at the end of the allocation space.
The text was updated successfully, but these errors were encountered:
The pages above 4-GiB won't work with hardware that uses 32-bit addresses.
Therefore, it will be useful if generic pages are allocated above 4-GiB if available, to maximize the number of pages usable by such hardware.
On IA-32 with PAE (and AMD64 before switching to long mode), CR3 is 32 bits wide so the relevant table must be located under 4-GiB as well.
I'd rather build this into the generic page allocator because it is a situation that can happen on more than one architecture. Also, it will allow for slightly more compact storage.
I should also move the map and the stack at the end of the allocation space.
The text was updated successfully, but these errors were encountered: