Cmake/Verilator Warning prevents cmake config from completing

[M4a1x]

Hi there!

I'm trying to follow the tutorial on marcos_extras to set up the software. Unfortunately I get a warning from Verilator that prevents the Cmake config from building:

Non-blocking assignment '<=' in combinational logic process. This will be executed as a blocking assignment '='!

I installed the necessary dependencies on the OS level and setup a python .venv with the given dependencies (numpy, scipy, matplotlib, msgpack) as well. Here are my installed software versions:

cmake 3.26.2
Verilator 4.226 2022-08-31 rev UNKNOWN.REV
Python 3.11.2

The output of cmake is as follows

Full CMake 3.26.2 Output

marga (2501b95) via 🐍 v3.11.2 (.venv)
❯ mkdir build
marga (2501b95) via 🐍 v3.11.2 (.venv)
❯ cd build/
marga/build (2501b95) via 🐍 v3.11.2 (.venv)
❯ cmake ../src/
-- The C compiler identification is GNU 13.0.1
-- The CXX compiler identification is GNU 13.0.1
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Check for working C compiler: /usr/lib64/ccache/cc - skipped
-- Detecting C compile features
-- Detecting C compile features - done
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Check for working CXX compiler: /usr/lib64/ccache/c++ - skipped
-- Detecting CXX compile features
-- Detecting CXX compile features - done
-- Performing Test _faligned_new
-- Performing Test _faligned_new - Success
-- Performing Test _fbracket_depth_4096
-- Performing Test _fbracket_depth_4096 - Failed
-- Performing Test _fcf_protection_none
-- Performing Test _fcf_protection_none - Success
-- Performing Test _mno_cet
-- Performing Test _mno_cet - Failed
-- Performing Test _Qunused_arguments
-- Performing Test _Qunused_arguments - Failed
-- Performing Test _Wno_bool_operation
-- Performing Test _Wno_bool_operation - Success
-- Performing Test _Wno_tautological_bitwise_compare
-- Performing Test _Wno_tautological_bitwise_compare - Success
-- Performing Test _Wno_parentheses_equality
-- Performing Test _Wno_parentheses_equality - Success
-- Performing Test _Wno_sign_compare
-- Performing Test _Wno_sign_compare - Success
-- Performing Test _Wno_uninitialized
-- Performing Test _Wno_uninitialized - Success
-- Performing Test _Wno_unused_but_set_variable
-- Performing Test _Wno_unused_but_set_variable - Success
-- Performing Test _Wno_unused_parameter
-- Performing Test _Wno_unused_parameter - Success
-- Performing Test _Wno_unused_variable
-- Performing Test _Wno_unused_variable - Success
-- Performing Test _Wno_shadow
-- Performing Test _Wno_shadow - Success
-- Performing Test _mt
-- Performing Test _mt - Failed
-- Performing Test _pthread
-- Performing Test _pthread - Success
-- Performing Test _lpthread
-- Performing Test _lpthread - Success
-- Performing Test _latomic
-- Performing Test _latomic - Success
-- Executing Verilator...
Verilator command: "/usr/bin/verilator_bin --compiler gcc --prefix Vmarga_model --Mdir /home/mstabel/Projects/marcos_pack/marga/build/CMakeFiles/marga_sim.dir/Vmarga_model.dir --make cmake --cc -y ../hdl -Wall -Wno-UNUSED -Wno-PINCONNECTEMPTY -Wno-PINMISSING --cc -O3 --threads 4 --trace-fst --trace-depth 4 ../hdl/marga_model.sv"
Output:
%Warning-COMBDLY: ../hdl/ad5781_model.sv:96:17: Non-blocking assignment '<=' in combinational logic process
                                              : ... This will be executed as a blocking assignment '='!
   96 |  3'b111: vout_r <= dac_reg[19:2];
      |                 ^~
                  ../hdl/marga.sv:359:1: ... note: In file included from marga.sv
                  ../hdl/mardecode.sv:632:1: ... note: In file included from mardecode.sv
                  ../hdl/mardecode.sv:27:1: ... note: In file included from mardecode.sv
                  ../hdl/marga.sv:40:1: ... note: In file included from marga.sv
                  ../hdl/../hdl/marga_model.sv:26:1: ... note: In file included from marga_model.sv
                  ... For warning description see https://verilator.org/warn/COMBDLY?v=4.226
                  ... Use "/* verilator lint_off COMBDLY */" and lint_on around source to disable this message.
                  *** See https://verilator.org/warn/COMBDLY before disabling this,
                  else you may end up with different sim results.
%Error: Exiting due to 1 warning(s)

CMake Error at /usr/share/verilator/verilator-config.cmake:233 (message):
  Verilator command failed (return code=1)
Call Stack (most recent call first):
  CMakeLists.txt:41 (verilate)


-- Configuring incomplete, errors occurred!

I also took a look at the debugging guide, but it looks like that assumes that cmake ran without issues. Unfortunately, I'm not too confident in my HDL Abilities to judge if this warning is an issue.

Simply replacing all <= with = in that case fixes the issue and also the module tests from marcos_client run without issue. I thought I´d best let you know. If you want I can open a PR with the 5 changed lines.

Cheers!