第二部run_fpga.sh 的错误

[wenlvp]

Compiling for FPGA. This process may take a long time, please be patient.
Error (184036): Cannot place the following 204 DSP cells -- a legal placement which satisfies all the DSP requirements could not be found
Error: An error occurred during placement
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 644 warnings
Error: Can't run the Timing Analyzer (quartus_sta) -- Fitter (quartus_fit) failed or was not run. Run the Fitter (quartus_fit) successfully before running the Timing Analyzer (create_timing_netlist).
Error: Quartus Prime Timing Analyzer was unsuccessful. 1 error, 0 warnings
Error: Quartus Fitter has failed! Breaking execution...
Error (23035): Tcl error:
Error (23031): Evaluation of Tcl script import_compile.tcl unsuccessful
Error: Quartus Prime Compiler Database Interface was unsuccessful. 3 errors, 0 warnings
Error: Compiler Error, not able to generate hardware

请问 这个项目不板卡编译的时候报的错 怎么解决呢？

[wenlvp]

(caffe-fzp) [root@localhost project]# sh run_fpga.sh
rm -rf *.xclbin *.rpt .xtxt .json .dir .aoco .aocr .exe xocc sdaccel ./conv ./device/.ll ./device/.o ./host/.o ../common/.o *.log *.jou *.mon conv_pipe/ __all_sources.cl efi_testbench.sv Makefile.efisim
aoc: Selected default target board f10a_sr2x8g
aoc: Running OpenCL parser....
aoc: OpenCL parser completed successfully.
aoc: Linking Object files....
aoc: Optimizing and doing static analysis of code...

!===========================================================================
! The report below may be inaccurate. A more comprehensive
! resource usage report can be found at conv_pipe/reports/report.html
!===========================================================================

+--------------------------------------------------------------------+
; Estimated Resource Usage Summary ;
+----------------------------------------+---------------------------+
; Resource + Usage ;
+----------------------------------------+---------------------------+
; Logic utilization ; 61% ;
; ALUTs ; 32% ;
; Dedicated logic registers ; 31% ;
; Memory blocks ; 67% ;
; DSP blocks ; 4% ;
+----------------------------------------+---------------------------;
aoc: First stage compilation completed successfully.

[wenlvp]

(caffe-fzp) [root@localhost project]# sh run_fpga.sh
rm -rf *.xclbin *.rpt .xtxt .json .dir .aoco .aocr .exe xocc sdaccel ./conv ./device/.ll ./device/.o ./host/.o ../common/.o *.log *.jou *.mon conv_pipe/ __all_sources.cl efi_testbench.sv Makefile.efisim
aoc: Selected default target board f10a_sr2x8g
aoc: Running OpenCL parser....
aoc: OpenCL parser completed successfully.
aoc: Linking Object files....
aoc: Optimizing and doing static analysis of code...

!===========================================================================
! The report below may be inaccurate. A more comprehensive
! resource usage report can be found at conv_pipe/reports/report.html
!===========================================================================

+--------------------------------------------------------------------+
; Estimated Resource Usage Summary ;
+----------------------------------------+---------------------------+
; Resource + Usage ;
+----------------------------------------+---------------------------+
; Logic utilization ; 61% ;
; ALUTs ; 32% ;
; Dedicated logic registers ; 31% ;
; Memory blocks ; 67% ;
; DSP blocks ; 4% ;
+----------------------------------------+---------------------------;
aoc: First stage compilation completed successfully.

Compiling for FPGA. This process may take a long time, please be patient.
Error (184036): Cannot place the following 204 DSP cells -- a legal placement which satisfies all the DSP requirements could not be found
Error: An error occurred during placement
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 644 warnings
Error: Can't run the Timing Analyzer (quartus_sta) -- Fitter (quartus_fit) failed or was not run. Run the Fitter (quartus_fit) successfully before running the Timing Analyzer (create_timing_netlist).
Error: Quartus Prime Timing Analyzer was unsuccessful. 1 error, 0 warnings
Error: Quartus Fitter has failed! Breaking execution...
Error (23035): Tcl error:
Error (23031): Evaluation of Tcl script import_compile.tcl unsuccessful
Error: Quartus Prime Compiler Database Interface was unsuccessful. 3 errors, 0 warnings
Error: Compiler Error, not able to generate hardware

请问 这个项目不板卡编译的时候报的错 怎么解决呢？

[ppphj]

@williamyang4978 你好，请问你解决了这个问题吗

[ppphj]

@wenlvp 您好，请问您解决这个问题了吗

[williamyang4978]

@wenlvp @ppphj 你们用的FPGA是什么型号？我用的是intel的A10gx1150 platform，可能是您的FPGA的DSP资源不够所致。

[ppphj]

@williamyang4978 我使用的板卡型号不同，但芯片同样是Arria 10 GX1150