ld.scr

OUTPUT_FORMAT("elf32-h8300")
OUTPUT_ARCH(h8300h)
ENTRY("_start")

MEMORY
{
  ramall(rwx)       : o = 0xffbf20, l = 0x004000 /* 16kb */
  softvec(rwx)      : o = 0xffbf20, l = 0x000040 /* 16kb */
  ram(rwx)          : o = 0xffc020, l = 0x003f00
  userstack(rw)     : o = 0xfff400, l = 0x000000
  bootstack(rw)     : o = 0xffff00, l = 0x000000
  intrstack(rw)     : o = 0xffff00, l = 0x000000 /* end of RAM */
}

SECTIONS
{
  .softvec : {
    _softvec = . ;
  } > softvec

  .text : {
    _text_start = . ;
    *(.text)
    _etext = . ;
  } > ram

  .rodata : {
    _rodata_start = . ;
    *(.strings)
    *(.rodata)
    *(.rodata.*)
    _erodata = . ;
  } > ram

  .data : {
    _data_start = . ;
    *(.data)
    _edata = . ;
  } > ram

  .bss : {
    _bss_start = . ;
    *(.bss)
    *(COMMON)
    _ebss = . ;
  } > ram

  . = ALIGN(4);
  _end = . ;

  .freearea : {
    _freearea = . ;
  } > ram
  
  .userstack : {
    _userstack = . ;
  } > userstack
  
  .bootstack : {
    _bootstack = . ;
  } > bootstack

  .intrstack : {
    _intrstack = . ;
  } > intrstack
}