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omap3-devkit8000-common.dtsi
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omap3-devkit8000-common.dtsi
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Author: Anil Kumar <anilk4.v@gmail.com>
*/
#include <dt-bindings/input/input.h>
#include "omap34xx.dtsi"
/ {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
leds {
compatible = "gpio-leds";
heartbeat {
label = "devkit8000::led1";
gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */
default-state = "on";
linux,default-trigger = "heartbeat";
};
mmc {
label = "devkit8000::led2";
gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */
default-state = "on";
linux,default-trigger = "none";
};
usr {
label = "devkit8000::led3";
gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */
default-state = "on";
linux,default-trigger = "usr";
};
pmu_stat {
label = "devkit8000::pmu_stat";
gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
};
};
sound {
compatible = "ti,omap-twl4030";
ti,model = "devkit8000";
ti,mcbsp = <&mcbsp2>;
ti,audio-routing =
"Ext Spk", "PREDRIVEL",
"Ext Spk", "PREDRIVER",
"MAINMIC", "Main Mic",
"Main Mic", "Mic Bias 1";
};
gpio_keys {
compatible = "gpio-keys";
user {
label = "user";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
linux,code = <BTN_EXTRA>;
wakeup-source;
};
};
tfp410: encoder0 {
compatible = "ti,tfp410";
powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tfp410_in: endpoint {
remote-endpoint = <&dpi_dvi_out>;
};
};
port@1 {
reg = <1>;
tfp410_out: endpoint {
remote-endpoint = <&dvi_connector_in>;
};
};
};
};
dvi0: connector0 {
compatible = "dvi-connector";
label = "dvi";
digital;
ddc-i2c-bus = <&i2c2>;
port {
dvi_connector_in: endpoint {
remote-endpoint = <&tfp410_out>;
};
};
};
tv0: connector1 {
compatible = "svideo-connector";
label = "tv";
port {
tv_connector_in: endpoint {
remote-endpoint = <&venc_out>;
};
};
};
};
&i2c1 {
clock-frequency = <2600000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
twl_audio: audio {
compatible = "ti,twl4030-audio";
codec {
};
};
};
};
&i2c2 {
clock-frequency = <400000>;
};
&i2c3 {
status = "disabled";
};
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
&mmc1 {
vmmc-supply = <&vmmc1>;
vqmmc-supply = <&vsim>;
bus-width = <8>;
};
&mmc2 {
status = "disabled";
};
&mmc3 {
status = "disabled";
};
/* Unusable as clockevent because if unreliable oscillator, allow to idle */
&timer1_target {
/delete-property/ti,no-reset-on-init;
/delete-property/ti,no-idle;
timer@0 {
/delete-property/ti,timer-alwon;
};
};
/* Preferred timer for clockevent */
&timer12_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
/* Always clocked by secure_32k_fck */
};
};
&twl_gpio {
ti,use-leds;
/*
* pulldowns:
* BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
* BIT(15), BIT(16), BIT(17)
*/
ti,pulldowns = <0x03a1c6>;
};
&twl_keypad {
linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
MATRIX_KEY(1, 0, KEY_2)
MATRIX_KEY(2, 0, KEY_3)
MATRIX_KEY(0, 1, KEY_4)
MATRIX_KEY(1, 1, KEY_5)
MATRIX_KEY(2, 1, KEY_6)
MATRIX_KEY(3, 1, KEY_F5)
MATRIX_KEY(0, 2, KEY_7)
MATRIX_KEY(1, 2, KEY_8)
MATRIX_KEY(2, 2, KEY_9)
MATRIX_KEY(3, 2, KEY_F6)
MATRIX_KEY(0, 3, KEY_F7)
MATRIX_KEY(1, 3, KEY_0)
MATRIX_KEY(2, 3, KEY_F8)
MATRIX_KEY(4, 5, KEY_RESERVED)
MATRIX_KEY(4, 4, KEY_VOLUMEUP)
MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)
>;
};
&wdt2 {
status = "disabled";
};
&mcbsp2 {
status = "okay";
};
&gpmc {
ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "sw";
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-off-ns = <40>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
x-loader@0 {
label = "X-Loader";
reg = <0 0x80000>;
};
bootloaders@80000 {
label = "U-Boot";
reg = <0x80000 0x1e0000>;
};
bootloaders_env@260000 {
label = "U-Boot Env";
reg = <0x260000 0x20000>;
};
kernel@280000 {
label = "Kernel";
reg = <0x280000 0x400000>;
};
filesystem@680000 {
label = "File System";
reg = <0x680000 0xf980000>;
};
};
ethernet@6,0 {
compatible = "davicom,dm9000";
reg = <6 0x000 2
6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
bank-width = <2>;
interrupt-parent = <&gpio1>;
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
davicom,no-eeprom;
gpmc,mux-add-data = <0>;
gpmc,device-width = <1>;
gpmc,wait-pin = <0>;
gpmc,cycle2cycle-samecsen = <1>;
gpmc,cycle2cycle-diffcsen = <1>;
gpmc,cs-on-ns = <6>;
gpmc,cs-rd-off-ns = <180>;
gpmc,cs-wr-off-ns = <180>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <18>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
gpmc,we-on-ns = <54>;
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <144>;
gpmc,page-burst-access-ns = <24>;
gpmc,bus-turnaround-ns = <90>;
gpmc,cycle2cycle-delay-ns = <90>;
gpmc,wait-monitoring-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
gpmc,wr-access-ns = <0>;
};
};
&omap3_pmx_core {
dss_dpi_pins: pinmux_dss_dpi_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
>;
};
};
&vpll1 {
/* Needed for DSS */
regulator-name = "vdds_dsi";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
&dss {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dss_dpi_pins>;
vdds_dsi-supply = <&vpll1>;
vdda_dac-supply = <&vdac>;
port {
#address-cells = <1>;
#size-cells = <0>;
dpi_dvi_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&tfp410_in>;
data-lines = <24>;
};
endpoint@1 {
reg = <1>;
};
};
};
&venc {
status = "okay";
vdda-supply = <&vdac>;
port {
venc_out: endpoint {
remote-endpoint = <&tv_connector_in>;
ti,channels = <2>;
};
};
};