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qla_attr.c
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qla_attr.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* QLogic Fibre Channel HBA Driver
* Copyright (c) 2003-2014 QLogic Corporation
*/
#include "qla_def.h"
#include "qla_target.h"
#include <linux/kthread.h>
#include <linux/vmalloc.h>
#include <linux/slab.h>
#include <linux/delay.h>
static int qla24xx_vport_disable(struct fc_vport *, bool);
/* SYSFS attributes --------------------------------------------------------- */
static ssize_t
qla2x00_sysfs_read_fw_dump(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
int rval = 0;
if (!(ha->fw_dump_reading || ha->mctp_dump_reading ||
ha->mpi_fw_dump_reading))
return 0;
mutex_lock(&ha->optrom_mutex);
if (IS_P3P_TYPE(ha)) {
if (off < ha->md_template_size) {
rval = memory_read_from_buffer(buf, count,
&off, ha->md_tmplt_hdr, ha->md_template_size);
} else {
off -= ha->md_template_size;
rval = memory_read_from_buffer(buf, count,
&off, ha->md_dump, ha->md_dump_size);
}
} else if (ha->mctp_dumped && ha->mctp_dump_reading) {
rval = memory_read_from_buffer(buf, count, &off, ha->mctp_dump,
MCTP_DUMP_SIZE);
} else if (ha->mpi_fw_dumped && ha->mpi_fw_dump_reading) {
rval = memory_read_from_buffer(buf, count, &off,
ha->mpi_fw_dump,
ha->mpi_fw_dump_len);
} else if (ha->fw_dump_reading) {
rval = memory_read_from_buffer(buf, count, &off, ha->fw_dump,
ha->fw_dump_len);
} else {
rval = 0;
}
mutex_unlock(&ha->optrom_mutex);
return rval;
}
static ssize_t
qla2x00_sysfs_write_fw_dump(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
int reading;
if (off != 0)
return (0);
reading = simple_strtol(buf, NULL, 10);
switch (reading) {
case 0:
if (!ha->fw_dump_reading)
break;
ql_log(ql_log_info, vha, 0x705d,
"Firmware dump cleared on (%ld).\n", vha->host_no);
if (IS_P3P_TYPE(ha)) {
qla82xx_md_free(vha);
qla82xx_md_prep(vha);
}
ha->fw_dump_reading = 0;
ha->fw_dumped = false;
break;
case 1:
if (ha->fw_dumped && !ha->fw_dump_reading) {
ha->fw_dump_reading = 1;
ql_log(ql_log_info, vha, 0x705e,
"Raw firmware dump ready for read on (%ld).\n",
vha->host_no);
}
break;
case 2:
qla2x00_alloc_fw_dump(vha);
break;
case 3:
if (IS_QLA82XX(ha)) {
qla82xx_idc_lock(ha);
qla82xx_set_reset_owner(vha);
qla82xx_idc_unlock(ha);
} else if (IS_QLA8044(ha)) {
qla8044_idc_lock(ha);
qla82xx_set_reset_owner(vha);
qla8044_idc_unlock(ha);
} else {
qla2x00_system_error(vha);
}
break;
case 4:
if (IS_P3P_TYPE(ha)) {
if (ha->md_tmplt_hdr)
ql_dbg(ql_dbg_user, vha, 0x705b,
"MiniDump supported with this firmware.\n");
else
ql_dbg(ql_dbg_user, vha, 0x709d,
"MiniDump not supported with this firmware.\n");
}
break;
case 5:
if (IS_P3P_TYPE(ha))
set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
break;
case 6:
if (!ha->mctp_dump_reading)
break;
ql_log(ql_log_info, vha, 0x70c1,
"MCTP dump cleared on (%ld).\n", vha->host_no);
ha->mctp_dump_reading = 0;
ha->mctp_dumped = 0;
break;
case 7:
if (ha->mctp_dumped && !ha->mctp_dump_reading) {
ha->mctp_dump_reading = 1;
ql_log(ql_log_info, vha, 0x70c2,
"Raw mctp dump ready for read on (%ld).\n",
vha->host_no);
}
break;
case 8:
if (!ha->mpi_fw_dump_reading)
break;
ql_log(ql_log_info, vha, 0x70e7,
"MPI firmware dump cleared on (%ld).\n", vha->host_no);
ha->mpi_fw_dump_reading = 0;
ha->mpi_fw_dumped = 0;
break;
case 9:
if (ha->mpi_fw_dumped && !ha->mpi_fw_dump_reading) {
ha->mpi_fw_dump_reading = 1;
ql_log(ql_log_info, vha, 0x70e8,
"Raw MPI firmware dump ready for read on (%ld).\n",
vha->host_no);
}
break;
case 10:
if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
ql_log(ql_log_info, vha, 0x70e9,
"Issuing MPI firmware dump on host#%ld.\n",
vha->host_no);
ha->isp_ops->mpi_fw_dump(vha, 0);
}
break;
}
return count;
}
static struct bin_attribute sysfs_fw_dump_attr = {
.attr = {
.name = "fw_dump",
.mode = S_IRUSR | S_IWUSR,
},
.size = 0,
.read = qla2x00_sysfs_read_fw_dump,
.write = qla2x00_sysfs_write_fw_dump,
};
static ssize_t
qla2x00_sysfs_read_nvram(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
uint32_t faddr;
struct active_regions active_regions = { };
if (!capable(CAP_SYS_ADMIN))
return 0;
mutex_lock(&ha->optrom_mutex);
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&ha->optrom_mutex);
return -EAGAIN;
}
if (!IS_NOCACHE_VPD_TYPE(ha)) {
mutex_unlock(&ha->optrom_mutex);
goto skip;
}
faddr = ha->flt_region_nvram;
if (IS_QLA28XX(ha)) {
qla28xx_get_aux_images(vha, &active_regions);
if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
faddr = ha->flt_region_nvram_sec;
}
ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
mutex_unlock(&ha->optrom_mutex);
skip:
return memory_read_from_buffer(buf, count, &off, ha->nvram,
ha->nvram_size);
}
static ssize_t
qla2x00_sysfs_write_nvram(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
uint16_t cnt;
if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size ||
!ha->isp_ops->write_nvram)
return -EINVAL;
/* Checksum NVRAM. */
if (IS_FWI2_CAPABLE(ha)) {
__le32 *iter = (__force __le32 *)buf;
uint32_t chksum;
chksum = 0;
for (cnt = 0; cnt < ((count >> 2) - 1); cnt++, iter++)
chksum += le32_to_cpu(*iter);
chksum = ~chksum + 1;
*iter = cpu_to_le32(chksum);
} else {
uint8_t *iter;
uint8_t chksum;
iter = (uint8_t *)buf;
chksum = 0;
for (cnt = 0; cnt < count - 1; cnt++)
chksum += *iter++;
chksum = ~chksum + 1;
*iter = chksum;
}
if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0x705f,
"HBA not online, failing NVRAM update.\n");
return -EAGAIN;
}
mutex_lock(&ha->optrom_mutex);
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&ha->optrom_mutex);
return -EAGAIN;
}
/* Write NVRAM. */
ha->isp_ops->write_nvram(vha, buf, ha->nvram_base, count);
ha->isp_ops->read_nvram(vha, ha->nvram, ha->nvram_base,
count);
mutex_unlock(&ha->optrom_mutex);
ql_dbg(ql_dbg_user, vha, 0x7060,
"Setting ISP_ABORT_NEEDED\n");
/* NVRAM settings take effect immediately. */
set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
qla2xxx_wake_dpc(vha);
qla2x00_wait_for_chip_reset(vha);
return count;
}
static struct bin_attribute sysfs_nvram_attr = {
.attr = {
.name = "nvram",
.mode = S_IRUSR | S_IWUSR,
},
.size = 512,
.read = qla2x00_sysfs_read_nvram,
.write = qla2x00_sysfs_write_nvram,
};
static ssize_t
qla2x00_sysfs_read_optrom(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
ssize_t rval = 0;
mutex_lock(&ha->optrom_mutex);
if (ha->optrom_state != QLA_SREADING)
goto out;
rval = memory_read_from_buffer(buf, count, &off, ha->optrom_buffer,
ha->optrom_region_size);
out:
mutex_unlock(&ha->optrom_mutex);
return rval;
}
static ssize_t
qla2x00_sysfs_write_optrom(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
mutex_lock(&ha->optrom_mutex);
if (ha->optrom_state != QLA_SWRITING) {
mutex_unlock(&ha->optrom_mutex);
return -EINVAL;
}
if (off > ha->optrom_region_size) {
mutex_unlock(&ha->optrom_mutex);
return -ERANGE;
}
if (off + count > ha->optrom_region_size)
count = ha->optrom_region_size - off;
memcpy(&ha->optrom_buffer[off], buf, count);
mutex_unlock(&ha->optrom_mutex);
return count;
}
static struct bin_attribute sysfs_optrom_attr = {
.attr = {
.name = "optrom",
.mode = S_IRUSR | S_IWUSR,
},
.size = 0,
.read = qla2x00_sysfs_read_optrom,
.write = qla2x00_sysfs_write_optrom,
};
static ssize_t
qla2x00_sysfs_write_optrom_ctl(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
uint32_t start = 0;
uint32_t size = ha->optrom_size;
int val, valid;
ssize_t rval = count;
if (off)
return -EINVAL;
if (unlikely(pci_channel_offline(ha->pdev)))
return -EAGAIN;
if (sscanf(buf, "%d:%x:%x", &val, &start, &size) < 1)
return -EINVAL;
if (start > ha->optrom_size)
return -EINVAL;
if (size > ha->optrom_size - start)
size = ha->optrom_size - start;
mutex_lock(&ha->optrom_mutex);
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&ha->optrom_mutex);
return -EAGAIN;
}
switch (val) {
case 0:
if (ha->optrom_state != QLA_SREADING &&
ha->optrom_state != QLA_SWRITING) {
rval = -EINVAL;
goto out;
}
ha->optrom_state = QLA_SWAITING;
ql_dbg(ql_dbg_user, vha, 0x7061,
"Freeing flash region allocation -- 0x%x bytes.\n",
ha->optrom_region_size);
vfree(ha->optrom_buffer);
ha->optrom_buffer = NULL;
break;
case 1:
if (ha->optrom_state != QLA_SWAITING) {
rval = -EINVAL;
goto out;
}
ha->optrom_region_start = start;
ha->optrom_region_size = size;
ha->optrom_state = QLA_SREADING;
ha->optrom_buffer = vzalloc(ha->optrom_region_size);
if (ha->optrom_buffer == NULL) {
ql_log(ql_log_warn, vha, 0x7062,
"Unable to allocate memory for optrom retrieval "
"(%x).\n", ha->optrom_region_size);
ha->optrom_state = QLA_SWAITING;
rval = -ENOMEM;
goto out;
}
if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0x7063,
"HBA not online, failing NVRAM update.\n");
rval = -EAGAIN;
goto out;
}
ql_dbg(ql_dbg_user, vha, 0x7064,
"Reading flash region -- 0x%x/0x%x.\n",
ha->optrom_region_start, ha->optrom_region_size);
ha->isp_ops->read_optrom(vha, ha->optrom_buffer,
ha->optrom_region_start, ha->optrom_region_size);
break;
case 2:
if (ha->optrom_state != QLA_SWAITING) {
rval = -EINVAL;
goto out;
}
/*
* We need to be more restrictive on which FLASH regions are
* allowed to be updated via user-space. Regions accessible
* via this method include:
*
* ISP21xx/ISP22xx/ISP23xx type boards:
*
* 0x000000 -> 0x020000 -- Boot code.
*
* ISP2322/ISP24xx type boards:
*
* 0x000000 -> 0x07ffff -- Boot code.
* 0x080000 -> 0x0fffff -- Firmware.
*
* ISP25xx type boards:
*
* 0x000000 -> 0x07ffff -- Boot code.
* 0x080000 -> 0x0fffff -- Firmware.
* 0x120000 -> 0x12ffff -- VPD and HBA parameters.
*
* > ISP25xx type boards:
*
* None -- should go through BSG.
*/
valid = 0;
if (ha->optrom_size == OPTROM_SIZE_2300 && start == 0)
valid = 1;
else if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
valid = 1;
if (!valid) {
ql_log(ql_log_warn, vha, 0x7065,
"Invalid start region 0x%x/0x%x.\n", start, size);
rval = -EINVAL;
goto out;
}
ha->optrom_region_start = start;
ha->optrom_region_size = size;
ha->optrom_state = QLA_SWRITING;
ha->optrom_buffer = vzalloc(ha->optrom_region_size);
if (ha->optrom_buffer == NULL) {
ql_log(ql_log_warn, vha, 0x7066,
"Unable to allocate memory for optrom update "
"(%x)\n", ha->optrom_region_size);
ha->optrom_state = QLA_SWAITING;
rval = -ENOMEM;
goto out;
}
ql_dbg(ql_dbg_user, vha, 0x7067,
"Staging flash region write -- 0x%x/0x%x.\n",
ha->optrom_region_start, ha->optrom_region_size);
break;
case 3:
if (ha->optrom_state != QLA_SWRITING) {
rval = -EINVAL;
goto out;
}
if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0x7068,
"HBA not online, failing flash update.\n");
rval = -EAGAIN;
goto out;
}
ql_dbg(ql_dbg_user, vha, 0x7069,
"Writing flash region -- 0x%x/0x%x.\n",
ha->optrom_region_start, ha->optrom_region_size);
rval = ha->isp_ops->write_optrom(vha, ha->optrom_buffer,
ha->optrom_region_start, ha->optrom_region_size);
if (rval)
rval = -EIO;
break;
default:
rval = -EINVAL;
}
out:
mutex_unlock(&ha->optrom_mutex);
return rval;
}
static struct bin_attribute sysfs_optrom_ctl_attr = {
.attr = {
.name = "optrom_ctl",
.mode = S_IWUSR,
},
.size = 0,
.write = qla2x00_sysfs_write_optrom_ctl,
};
static ssize_t
qla2x00_sysfs_read_vpd(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
uint32_t faddr;
struct active_regions active_regions = { };
if (unlikely(pci_channel_offline(ha->pdev)))
return -EAGAIN;
if (!capable(CAP_SYS_ADMIN))
return -EINVAL;
if (!IS_NOCACHE_VPD_TYPE(ha))
goto skip;
faddr = ha->flt_region_vpd << 2;
if (IS_QLA28XX(ha)) {
qla28xx_get_aux_images(vha, &active_regions);
if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
faddr = ha->flt_region_vpd_sec << 2;
ql_dbg(ql_dbg_init, vha, 0x7070,
"Loading %s nvram image.\n",
active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
"primary" : "secondary");
}
mutex_lock(&ha->optrom_mutex);
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&ha->optrom_mutex);
return -EAGAIN;
}
ha->isp_ops->read_optrom(vha, ha->vpd, faddr, ha->vpd_size);
mutex_unlock(&ha->optrom_mutex);
ha->isp_ops->read_optrom(vha, ha->vpd, faddr, ha->vpd_size);
skip:
return memory_read_from_buffer(buf, count, &off, ha->vpd, ha->vpd_size);
}
static ssize_t
qla2x00_sysfs_write_vpd(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
uint8_t *tmp_data;
if (unlikely(pci_channel_offline(ha->pdev)))
return 0;
if (qla2x00_chip_is_down(vha))
return 0;
if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size ||
!ha->isp_ops->write_nvram)
return 0;
if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0x706a,
"HBA not online, failing VPD update.\n");
return -EAGAIN;
}
mutex_lock(&ha->optrom_mutex);
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&ha->optrom_mutex);
return -EAGAIN;
}
/* Write NVRAM. */
ha->isp_ops->write_nvram(vha, buf, ha->vpd_base, count);
ha->isp_ops->read_nvram(vha, ha->vpd, ha->vpd_base, count);
/* Update flash version information for 4Gb & above. */
if (!IS_FWI2_CAPABLE(ha)) {
mutex_unlock(&ha->optrom_mutex);
return -EINVAL;
}
tmp_data = vmalloc(256);
if (!tmp_data) {
mutex_unlock(&ha->optrom_mutex);
ql_log(ql_log_warn, vha, 0x706b,
"Unable to allocate memory for VPD information update.\n");
return -ENOMEM;
}
ha->isp_ops->get_flash_version(vha, tmp_data);
vfree(tmp_data);
mutex_unlock(&ha->optrom_mutex);
return count;
}
static struct bin_attribute sysfs_vpd_attr = {
.attr = {
.name = "vpd",
.mode = S_IRUSR | S_IWUSR,
},
.size = 0,
.read = qla2x00_sysfs_read_vpd,
.write = qla2x00_sysfs_write_vpd,
};
static ssize_t
qla2x00_sysfs_read_sfp(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
int rval;
if (!capable(CAP_SYS_ADMIN) || off != 0 || count < SFP_DEV_SIZE)
return 0;
mutex_lock(&vha->hw->optrom_mutex);
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&vha->hw->optrom_mutex);
return 0;
}
rval = qla2x00_read_sfp_dev(vha, buf, count);
mutex_unlock(&vha->hw->optrom_mutex);
if (rval)
return -EIO;
return count;
}
static struct bin_attribute sysfs_sfp_attr = {
.attr = {
.name = "sfp",
.mode = S_IRUSR | S_IWUSR,
},
.size = SFP_DEV_SIZE,
.read = qla2x00_sysfs_read_sfp,
};
static ssize_t
qla2x00_sysfs_write_reset(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
int type;
uint32_t idc_control;
uint8_t *tmp_data = NULL;
if (off != 0)
return -EINVAL;
type = simple_strtol(buf, NULL, 10);
switch (type) {
case 0x2025c:
ql_log(ql_log_info, vha, 0x706e,
"Issuing ISP reset.\n");
if (vha->hw->flags.port_isolated) {
ql_log(ql_log_info, vha, 0x706e,
"Port is isolated, returning.\n");
return -EINVAL;
}
scsi_block_requests(vha->host);
if (IS_QLA82XX(ha)) {
ha->flags.isp82xx_no_md_cap = 1;
qla82xx_idc_lock(ha);
qla82xx_set_reset_owner(vha);
qla82xx_idc_unlock(ha);
} else if (IS_QLA8044(ha)) {
qla8044_idc_lock(ha);
idc_control = qla8044_rd_reg(ha,
QLA8044_IDC_DRV_CTRL);
qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL,
(idc_control | GRACEFUL_RESET_BIT1));
qla82xx_set_reset_owner(vha);
qla8044_idc_unlock(ha);
} else {
set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
qla2xxx_wake_dpc(vha);
}
qla2x00_wait_for_chip_reset(vha);
scsi_unblock_requests(vha->host);
break;
case 0x2025d:
if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
return -EPERM;
ql_log(ql_log_info, vha, 0x706f,
"Issuing MPI reset.\n");
if (IS_QLA83XX(ha)) {
uint32_t idc_control;
qla83xx_idc_lock(vha, 0);
__qla83xx_get_idc_control(vha, &idc_control);
idc_control |= QLA83XX_IDC_GRACEFUL_RESET;
__qla83xx_set_idc_control(vha, idc_control);
qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
QLA8XXX_DEV_NEED_RESET);
qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
qla83xx_idc_unlock(vha, 0);
break;
} else {
/* Make sure FC side is not in reset */
WARN_ON_ONCE(qla2x00_wait_for_hba_online(vha) !=
QLA_SUCCESS);
/* Issue MPI reset */
scsi_block_requests(vha->host);
if (qla81xx_restart_mpi_firmware(vha) != QLA_SUCCESS)
ql_log(ql_log_warn, vha, 0x7070,
"MPI reset failed.\n");
scsi_unblock_requests(vha->host);
break;
}
break;
case 0x2025e:
if (!IS_P3P_TYPE(ha) || vha != base_vha) {
ql_log(ql_log_info, vha, 0x7071,
"FCoE ctx reset not supported.\n");
return -EPERM;
}
ql_log(ql_log_info, vha, 0x7072,
"Issuing FCoE ctx reset.\n");
set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
qla2xxx_wake_dpc(vha);
qla2x00_wait_for_fcoe_ctx_reset(vha);
break;
case 0x2025f:
if (!IS_QLA8031(ha))
return -EPERM;
ql_log(ql_log_info, vha, 0x70bc,
"Disabling Reset by IDC control\n");
qla83xx_idc_lock(vha, 0);
__qla83xx_get_idc_control(vha, &idc_control);
idc_control |= QLA83XX_IDC_RESET_DISABLED;
__qla83xx_set_idc_control(vha, idc_control);
qla83xx_idc_unlock(vha, 0);
break;
case 0x20260:
if (!IS_QLA8031(ha))
return -EPERM;
ql_log(ql_log_info, vha, 0x70bd,
"Enabling Reset by IDC control\n");
qla83xx_idc_lock(vha, 0);
__qla83xx_get_idc_control(vha, &idc_control);
idc_control &= ~QLA83XX_IDC_RESET_DISABLED;
__qla83xx_set_idc_control(vha, idc_control);
qla83xx_idc_unlock(vha, 0);
break;
case 0x20261:
ql_dbg(ql_dbg_user, vha, 0x70e0,
"Updating cache versions without reset ");
tmp_data = vmalloc(256);
if (!tmp_data) {
ql_log(ql_log_warn, vha, 0x70e1,
"Unable to allocate memory for VPD information update.\n");
return -ENOMEM;
}
ha->isp_ops->get_flash_version(vha, tmp_data);
vfree(tmp_data);
break;
}
return count;
}
static struct bin_attribute sysfs_reset_attr = {
.attr = {
.name = "reset",
.mode = S_IWUSR,
},
.size = 0,
.write = qla2x00_sysfs_write_reset,
};
static ssize_t
qla2x00_issue_logo(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
int type;
port_id_t did;
if (!capable(CAP_SYS_ADMIN))
return 0;
if (unlikely(pci_channel_offline(vha->hw->pdev)))
return 0;
if (qla2x00_chip_is_down(vha))
return 0;
type = simple_strtol(buf, NULL, 10);
did.b.domain = (type & 0x00ff0000) >> 16;
did.b.area = (type & 0x0000ff00) >> 8;
did.b.al_pa = (type & 0x000000ff);
ql_log(ql_log_info, vha, 0xd04d, "portid=%02x%02x%02x done\n",
did.b.domain, did.b.area, did.b.al_pa);
ql_log(ql_log_info, vha, 0x70e4, "%s: %d\n", __func__, type);
qla24xx_els_dcmd_iocb(vha, ELS_DCMD_LOGO, did);
return count;
}
static struct bin_attribute sysfs_issue_logo_attr = {
.attr = {
.name = "issue_logo",
.mode = S_IWUSR,
},
.size = 0,
.write = qla2x00_issue_logo,
};
static ssize_t
qla2x00_sysfs_read_xgmac_stats(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
int rval;
uint16_t actual_size;
if (!capable(CAP_SYS_ADMIN) || off != 0 || count > XGMAC_DATA_SIZE)
return 0;
if (unlikely(pci_channel_offline(ha->pdev)))
return 0;
mutex_lock(&vha->hw->optrom_mutex);
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&vha->hw->optrom_mutex);
return 0;
}
if (ha->xgmac_data)
goto do_read;
ha->xgmac_data = dma_alloc_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
&ha->xgmac_data_dma, GFP_KERNEL);
if (!ha->xgmac_data) {
mutex_unlock(&vha->hw->optrom_mutex);
ql_log(ql_log_warn, vha, 0x7076,
"Unable to allocate memory for XGMAC read-data.\n");
return 0;
}
do_read:
actual_size = 0;
memset(ha->xgmac_data, 0, XGMAC_DATA_SIZE);
rval = qla2x00_get_xgmac_stats(vha, ha->xgmac_data_dma,
XGMAC_DATA_SIZE, &actual_size);
mutex_unlock(&vha->hw->optrom_mutex);
if (rval != QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0x7077,
"Unable to read XGMAC data (%x).\n", rval);
count = 0;
}
count = actual_size > count ? count : actual_size;
memcpy(buf, ha->xgmac_data, count);
return count;
}
static struct bin_attribute sysfs_xgmac_stats_attr = {
.attr = {
.name = "xgmac_stats",
.mode = S_IRUSR,
},
.size = 0,
.read = qla2x00_sysfs_read_xgmac_stats,
};
static ssize_t
qla2x00_sysfs_read_dcbx_tlv(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
struct device, kobj)));
struct qla_hw_data *ha = vha->hw;
int rval;
if (!capable(CAP_SYS_ADMIN) || off != 0 || count > DCBX_TLV_DATA_SIZE)
return 0;
mutex_lock(&vha->hw->optrom_mutex);
if (ha->dcbx_tlv)
goto do_read;
if (qla2x00_chip_is_down(vha)) {
mutex_unlock(&vha->hw->optrom_mutex);
return 0;
}
ha->dcbx_tlv = dma_alloc_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
&ha->dcbx_tlv_dma, GFP_KERNEL);
if (!ha->dcbx_tlv) {
mutex_unlock(&vha->hw->optrom_mutex);
ql_log(ql_log_warn, vha, 0x7078,
"Unable to allocate memory for DCBX TLV read-data.\n");
return -ENOMEM;
}
do_read:
memset(ha->dcbx_tlv, 0, DCBX_TLV_DATA_SIZE);
rval = qla2x00_get_dcbx_params(vha, ha->dcbx_tlv_dma,
DCBX_TLV_DATA_SIZE);
mutex_unlock(&vha->hw->optrom_mutex);
if (rval != QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0x7079,
"Unable to read DCBX TLV (%x).\n", rval);
return -EIO;
}
memcpy(buf, ha->dcbx_tlv, count);
return count;
}
static struct bin_attribute sysfs_dcbx_tlv_attr = {
.attr = {
.name = "dcbx_tlv",
.mode = S_IRUSR,
},
.size = 0,
.read = qla2x00_sysfs_read_dcbx_tlv,
};
static struct sysfs_entry {
char *name;