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gadget.c
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gadget.c
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// SPDX-License-Identifier: GPL-2.0
/*
* Cadence USBSS DRD Driver - gadget side.
*
* Copyright (C) 2018-2019 Cadence Design Systems.
* Copyright (C) 2017-2018 NXP
*
* Authors: Pawel Jez <pjez@cadence.com>,
* Pawel Laszczak <pawell@cadence.com>
* Peter Chen <peter.chen@nxp.com>
*/
/*
* Work around 1:
* At some situations, the controller may get stale data address in TRB
* at below sequences:
* 1. Controller read TRB includes data address
* 2. Software updates TRBs includes data address and Cycle bit
* 3. Controller read TRB which includes Cycle bit
* 4. DMA run with stale data address
*
* To fix this problem, driver needs to make the first TRB in TD as invalid.
* After preparing all TRBs driver needs to check the position of DMA and
* if the DMA point to the first just added TRB and doorbell is 1,
* then driver must defer making this TRB as valid. This TRB will be make
* as valid during adding next TRB only if DMA is stopped or at TRBERR
* interrupt.
*
* Issue has been fixed in DEV_VER_V3 version of controller.
*
* Work around 2:
* Controller for OUT endpoints has shared on-chip buffers for all incoming
* packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
* in correct order. If the first packet in the buffer will not be handled,
* then the following packets directed for other endpoints and functions
* will be blocked.
* Additionally the packets directed to one endpoint can block entire on-chip
* buffers. In this case transfer to other endpoints also will blocked.
*
* To resolve this issue after raising the descriptor missing interrupt
* driver prepares internal usb_request object and use it to arm DMA transfer.
*
* The problematic situation was observed in case when endpoint has been enabled
* but no usb_request were queued. Driver try detects such endpoints and will
* use this workaround only for these endpoint.
*
* Driver use limited number of buffer. This number can be set by macro
* CDNS3_WA2_NUM_BUFFERS.
*
* Such blocking situation was observed on ACM gadget. For this function
* host send OUT data packet but ACM function is not prepared for this packet.
* It's cause that buffer placed in on chip memory block transfer to other
* endpoints.
*
* Issue has been fixed in DEV_VER_V2 version of controller.
*
*/
#include <linux/dma-mapping.h>
#include <linux/usb/gadget.h>
#include <linux/module.h>
#include <linux/iopoll.h>
#include "core.h"
#include "gadget-export.h"
#include "gadget.h"
#include "trace.h"
#include "drd.h"
static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
struct usb_request *request,
gfp_t gfp_flags);
static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
struct usb_request *request);
static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
struct usb_request *request);
/**
* cdns3_clear_register_bit - clear bit in given register.
* @ptr: address of device controller register to be read and changed
* @mask: bits requested to clar
*/
static void cdns3_clear_register_bit(void __iomem *ptr, u32 mask)
{
mask = readl(ptr) & ~mask;
writel(mask, ptr);
}
/**
* cdns3_set_register_bit - set bit in given register.
* @ptr: address of device controller register to be read and changed
* @mask: bits requested to set
*/
void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
{
mask = readl(ptr) | mask;
writel(mask, ptr);
}
/**
* cdns3_ep_addr_to_index - Macro converts endpoint address to
* index of endpoint object in cdns3_device.eps[] container
* @ep_addr: endpoint address for which endpoint object is required
*
*/
u8 cdns3_ep_addr_to_index(u8 ep_addr)
{
return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
}
static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
struct cdns3_endpoint *priv_ep)
{
int dma_index;
dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
return dma_index / TRB_SIZE;
}
/**
* cdns3_next_request - returns next request from list
* @list: list containing requests
*
* Returns request or NULL if no requests in list
*/
struct usb_request *cdns3_next_request(struct list_head *list)
{
return list_first_entry_or_null(list, struct usb_request, list);
}
/**
* cdns3_next_align_buf - returns next buffer from list
* @list: list containing buffers
*
* Returns buffer or NULL if no buffers in list
*/
static struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
{
return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
}
/**
* cdns3_next_priv_request - returns next request from list
* @list: list containing requests
*
* Returns request or NULL if no requests in list
*/
static struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
{
return list_first_entry_or_null(list, struct cdns3_request, list);
}
/**
* select_ep - selects endpoint
* @priv_dev: extended gadget object
* @ep: endpoint address
*/
void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
{
if (priv_dev->selected_ep == ep)
return;
priv_dev->selected_ep = ep;
writel(ep, &priv_dev->regs->ep_sel);
}
/**
* cdns3_get_tdl - gets current tdl for selected endpoint.
* @priv_dev: extended gadget object
*
* Before calling this function the appropriate endpoint must
* be selected by means of cdns3_select_ep function.
*/
static int cdns3_get_tdl(struct cdns3_device *priv_dev)
{
if (priv_dev->dev_ver < DEV_VER_V3)
return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
else
return readl(&priv_dev->regs->ep_tdl);
}
dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
struct cdns3_trb *trb)
{
u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
return priv_ep->trb_pool_dma + offset;
}
static int cdns3_ring_size(struct cdns3_endpoint *priv_ep)
{
switch (priv_ep->type) {
case USB_ENDPOINT_XFER_ISOC:
return TRB_ISO_RING_SIZE;
case USB_ENDPOINT_XFER_CONTROL:
return TRB_CTRL_RING_SIZE;
default:
if (priv_ep->use_streams)
return TRB_STREAM_RING_SIZE;
else
return TRB_RING_SIZE;
}
}
static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
{
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
if (priv_ep->trb_pool) {
dma_free_coherent(priv_dev->sysdev,
cdns3_ring_size(priv_ep),
priv_ep->trb_pool, priv_ep->trb_pool_dma);
priv_ep->trb_pool = NULL;
}
}
/**
* cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
* @priv_ep: endpoint object
*
* Function will return 0 on success or -ENOMEM on allocation error
*/
int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
{
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
int ring_size = cdns3_ring_size(priv_ep);
int num_trbs = ring_size / TRB_SIZE;
struct cdns3_trb *link_trb;
if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size)
cdns3_free_trb_pool(priv_ep);
if (!priv_ep->trb_pool) {
priv_ep->trb_pool = dma_alloc_coherent(priv_dev->sysdev,
ring_size,
&priv_ep->trb_pool_dma,
GFP_DMA32 | GFP_ATOMIC);
if (!priv_ep->trb_pool)
return -ENOMEM;
priv_ep->alloc_ring_size = ring_size;
}
memset(priv_ep->trb_pool, 0, ring_size);
priv_ep->num_trbs = num_trbs;
if (!priv_ep->num)
return 0;
/* Initialize the last TRB as Link TRB */
link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
if (priv_ep->use_streams) {
/*
* For stream capable endpoints driver use single correct TRB.
* The last trb has zeroed cycle bit
*/
link_trb->control = 0;
} else {
link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma));
link_trb->control = cpu_to_le32(TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE);
}
return 0;
}
/**
* cdns3_ep_stall_flush - Stalls and flushes selected endpoint
* @priv_ep: endpoint object
*
* Endpoint must be selected before call to this function
*/
static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
{
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
int val;
trace_cdns3_halt(priv_ep, 1, 1);
writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
&priv_dev->regs->ep_cmd);
/* wait for DFLUSH cleared */
readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
!(val & EP_CMD_DFLUSH), 1, 1000);
priv_ep->flags |= EP_STALLED;
priv_ep->flags &= ~EP_STALL_PENDING;
}
/**
* cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
* @priv_dev: extended gadget object
*/
void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
{
int i;
writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
cdns3_allow_enable_l1(priv_dev, 0);
priv_dev->hw_configured_flag = 0;
priv_dev->onchip_used_size = 0;
priv_dev->out_mem_is_allocated = 0;
priv_dev->wait_for_setup = 0;
priv_dev->using_streams = 0;
for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
if (priv_dev->eps[i])
priv_dev->eps[i]->flags &= ~EP_CONFIGURED;
}
/**
* cdns3_ep_inc_trb - increment a trb index.
* @index: Pointer to the TRB index to increment.
* @cs: Cycle state
* @trb_in_seg: number of TRBs in segment
*
* The index should never point to the link TRB. After incrementing,
* if it is point to the link TRB, wrap around to the beginning and revert
* cycle state bit The
* link TRB is always at the last TRB entry.
*/
static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
{
(*index)++;
if (*index == (trb_in_seg - 1)) {
*index = 0;
*cs ^= 1;
}
}
/**
* cdns3_ep_inc_enq - increment endpoint's enqueue pointer
* @priv_ep: The endpoint whose enqueue pointer we're incrementing
*/
static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
{
priv_ep->free_trbs--;
cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
}
/**
* cdns3_ep_inc_deq - increment endpoint's dequeue pointer
* @priv_ep: The endpoint whose dequeue pointer we're incrementing
*/
static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
{
priv_ep->free_trbs++;
cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
}
static void cdns3_move_deq_to_next_trb(struct cdns3_request *priv_req)
{
struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
int current_trb = priv_req->start_trb;
while (current_trb != priv_req->end_trb) {
cdns3_ep_inc_deq(priv_ep);
current_trb = priv_ep->dequeue;
}
cdns3_ep_inc_deq(priv_ep);
}
/**
* cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
* @priv_dev: Extended gadget object
* @enable: Enable/disable permit to transition to L1.
*
* If bit USB_CONF_L1EN is set and device receive Extended Token packet,
* then controller answer with ACK handshake.
* If bit USB_CONF_L1DS is set and device receive Extended Token packet,
* then controller answer with NYET handshake.
*/
void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
{
if (enable)
writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
else
writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
}
enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
{
u32 reg;
reg = readl(&priv_dev->regs->usb_sts);
if (DEV_SUPERSPEED(reg))
return USB_SPEED_SUPER;
else if (DEV_HIGHSPEED(reg))
return USB_SPEED_HIGH;
else if (DEV_FULLSPEED(reg))
return USB_SPEED_FULL;
else if (DEV_LOWSPEED(reg))
return USB_SPEED_LOW;
return USB_SPEED_UNKNOWN;
}
/**
* cdns3_start_all_request - add to ring all request not started
* @priv_dev: Extended gadget object
* @priv_ep: The endpoint for whom request will be started.
*
* Returns return ENOMEM if transfer ring i not enough TRBs to start
* all requests.
*/
static int cdns3_start_all_request(struct cdns3_device *priv_dev,
struct cdns3_endpoint *priv_ep)
{
struct usb_request *request;
int ret = 0;
u8 pending_empty = list_empty(&priv_ep->pending_req_list);
/*
* If the last pending transfer is INTERNAL
* OR streams are enabled for this endpoint
* do NOT start new transfer till the last one is pending
*/
if (!pending_empty) {
struct cdns3_request *priv_req;
request = cdns3_next_request(&priv_ep->pending_req_list);
priv_req = to_cdns3_request(request);
if ((priv_req->flags & REQUEST_INTERNAL) ||
(priv_ep->flags & EP_TDLCHK_EN) ||
priv_ep->use_streams) {
dev_dbg(priv_dev->dev, "Blocking external request\n");
return ret;
}
}
while (!list_empty(&priv_ep->deferred_req_list)) {
request = cdns3_next_request(&priv_ep->deferred_req_list);
if (!priv_ep->use_streams) {
ret = cdns3_ep_run_transfer(priv_ep, request);
} else {
priv_ep->stream_sg_idx = 0;
ret = cdns3_ep_run_stream_transfer(priv_ep, request);
}
if (ret)
return ret;
list_del(&request->list);
list_add_tail(&request->list,
&priv_ep->pending_req_list);
if (request->stream_id != 0 || (priv_ep->flags & EP_TDLCHK_EN))
break;
}
priv_ep->flags &= ~EP_RING_FULL;
return ret;
}
/*
* WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
* driver try to detect whether endpoint need additional internal
* buffer for unblocking on-chip FIFO buffer. This flag will be cleared
* if before first DESCMISS interrupt the DMA will be armed.
*/
#define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
(reg) |= EP_STS_EN_DESCMISEN; \
} } while (0)
static void __cdns3_descmiss_copy_data(struct usb_request *request,
struct usb_request *descmiss_req)
{
int length = request->actual + descmiss_req->actual;
struct scatterlist *s = request->sg;
if (!s) {
if (length <= request->length) {
memcpy(&((u8 *)request->buf)[request->actual],
descmiss_req->buf,
descmiss_req->actual);
request->actual = length;
} else {
/* It should never occures */
request->status = -ENOMEM;
}
} else {
if (length <= sg_dma_len(s)) {
void *p = phys_to_virt(sg_dma_address(s));
memcpy(&((u8 *)p)[request->actual],
descmiss_req->buf,
descmiss_req->actual);
request->actual = length;
} else {
request->status = -ENOMEM;
}
}
}
/**
* cdns3_wa2_descmiss_copy_data copy data from internal requests to
* request queued by class driver.
* @priv_ep: extended endpoint object
* @request: request object
*/
static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
struct usb_request *request)
{
struct usb_request *descmiss_req;
struct cdns3_request *descmiss_priv_req;
while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
int chunk_end;
descmiss_priv_req =
cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
descmiss_req = &descmiss_priv_req->request;
/* driver can't touch pending request */
if (descmiss_priv_req->flags & REQUEST_PENDING)
break;
chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
request->status = descmiss_req->status;
__cdns3_descmiss_copy_data(request, descmiss_req);
list_del_init(&descmiss_priv_req->list);
kfree(descmiss_req->buf);
cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
--priv_ep->wa2_counter;
if (!chunk_end)
break;
}
}
static struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
struct cdns3_endpoint *priv_ep,
struct cdns3_request *priv_req)
{
if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
priv_req->flags & REQUEST_INTERNAL) {
struct usb_request *req;
req = cdns3_next_request(&priv_ep->deferred_req_list);
priv_ep->descmis_req = NULL;
if (!req)
return NULL;
/* unmap the gadget request before copying data */
usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req,
priv_ep->dir);
cdns3_wa2_descmiss_copy_data(priv_ep, req);
if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
req->length != req->actual) {
/* wait for next part of transfer */
/* re-map the gadget request buffer*/
usb_gadget_map_request_by_dev(priv_dev->sysdev, req,
usb_endpoint_dir_in(priv_ep->endpoint.desc));
return NULL;
}
if (req->status == -EINPROGRESS)
req->status = 0;
list_del_init(&req->list);
cdns3_start_all_request(priv_dev, priv_ep);
return req;
}
return &priv_req->request;
}
static int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
struct cdns3_endpoint *priv_ep,
struct cdns3_request *priv_req)
{
int deferred = 0;
/*
* If transfer was queued before DESCMISS appear than we
* can disable handling of DESCMISS interrupt. Driver assumes that it
* can disable special treatment for this endpoint.
*/
if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
u32 reg;
cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
reg = readl(&priv_dev->regs->ep_sts_en);
reg &= ~EP_STS_EN_DESCMISEN;
trace_cdns3_wa2(priv_ep, "workaround disabled\n");
writel(reg, &priv_dev->regs->ep_sts_en);
}
if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
u8 pending_empty = list_empty(&priv_ep->pending_req_list);
u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
/*
* DESCMISS transfer has been finished, so data will be
* directly copied from internal allocated usb_request
* objects.
*/
if (pending_empty && !descmiss_empty &&
!(priv_req->flags & REQUEST_INTERNAL)) {
cdns3_wa2_descmiss_copy_data(priv_ep,
&priv_req->request);
trace_cdns3_wa2(priv_ep, "get internal stored data");
list_add_tail(&priv_req->request.list,
&priv_ep->pending_req_list);
cdns3_gadget_giveback(priv_ep, priv_req,
priv_req->request.status);
/*
* Intentionally driver returns positive value as
* correct value. It informs that transfer has
* been finished.
*/
return EINPROGRESS;
}
/*
* Driver will wait for completion DESCMISS transfer,
* before starts new, not DESCMISS transfer.
*/
if (!pending_empty && !descmiss_empty) {
trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
deferred = 1;
}
if (priv_req->flags & REQUEST_INTERNAL)
list_add_tail(&priv_req->list,
&priv_ep->wa2_descmiss_req_list);
}
return deferred;
}
static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
{
struct cdns3_request *priv_req;
while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
u8 chain;
priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
trace_cdns3_wa2(priv_ep, "removes eldest request");
kfree(priv_req->request.buf);
cdns3_gadget_ep_free_request(&priv_ep->endpoint,
&priv_req->request);
list_del_init(&priv_req->list);
--priv_ep->wa2_counter;
if (!chain)
break;
}
}
/**
* cdns3_wa2_descmissing_packet - handles descriptor missing event.
* @priv_ep: extended gadget object
*
* This function is used only for WA2. For more information see Work around 2
* description.
*/
static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
{
struct cdns3_request *priv_req;
struct usb_request *request;
u8 pending_empty = list_empty(&priv_ep->pending_req_list);
/* check for pending transfer */
if (!pending_empty) {
trace_cdns3_wa2(priv_ep, "Ignoring Descriptor missing IRQ\n");
return;
}
if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
}
trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS) {
trace_cdns3_wa2(priv_ep, "WA2 overflow\n");
cdns3_wa2_remove_old_request(priv_ep);
}
request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
GFP_ATOMIC);
if (!request)
goto err;
priv_req = to_cdns3_request(request);
priv_req->flags |= REQUEST_INTERNAL;
/* if this field is still assigned it indicate that transfer related
* with this request has not been finished yet. Driver in this
* case simply allocate next request and assign flag REQUEST_INTERNAL_CH
* flag to previous one. It will indicate that current request is
* part of the previous one.
*/
if (priv_ep->descmis_req)
priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
GFP_ATOMIC);
priv_ep->wa2_counter++;
if (!priv_req->request.buf) {
cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
goto err;
}
priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
priv_ep->descmis_req = priv_req;
__cdns3_gadget_ep_queue(&priv_ep->endpoint,
&priv_ep->descmis_req->request,
GFP_ATOMIC);
return;
err:
dev_err(priv_ep->cdns3_dev->dev,
"Failed: No sufficient memory for DESCMIS\n");
}
static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev)
{
u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
if (tdl) {
u16 reset_val = EP_CMD_TDL_MAX + 1 - tdl;
writel(EP_CMD_TDL_SET(reset_val) | EP_CMD_STDL,
&priv_dev->regs->ep_cmd);
}
}
static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev)
{
u32 ep_sts_reg;
/* select EP0-out */
cdns3_select_ep(priv_dev, 0);
ep_sts_reg = readl(&priv_dev->regs->ep_sts);
if (EP_STS_OUTQ_VAL(ep_sts_reg)) {
u32 outq_ep_num = EP_STS_OUTQ_NO(ep_sts_reg);
struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num];
if ((outq_ep->flags & EP_ENABLED) && !(outq_ep->use_streams) &&
outq_ep->type != USB_ENDPOINT_XFER_ISOC && outq_ep_num) {
u8 pending_empty = list_empty(&outq_ep->pending_req_list);
if ((outq_ep->flags & EP_QUIRK_EXTRA_BUF_DET) ||
(outq_ep->flags & EP_QUIRK_EXTRA_BUF_EN) ||
!pending_empty) {
} else {
u32 ep_sts_en_reg;
u32 ep_cmd_reg;
cdns3_select_ep(priv_dev, outq_ep->num |
outq_ep->dir);
ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
outq_ep->flags |= EP_TDLCHK_EN;
cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
EP_CFG_TDL_CHK);
cdns3_wa2_enable_detection(priv_dev, outq_ep,
ep_sts_en_reg);
writel(ep_sts_en_reg,
&priv_dev->regs->ep_sts_en);
/* reset tdl value to zero */
cdns3_wa2_reset_tdl(priv_dev);
/*
* Memory barrier - Reset tdl before ringing the
* doorbell.
*/
wmb();
if (EP_CMD_DRDY & ep_cmd_reg) {
trace_cdns3_wa2(outq_ep, "Enabling WA2 skipping doorbell\n");
} else {
trace_cdns3_wa2(outq_ep, "Enabling WA2 ringing doorbell\n");
/*
* ring doorbell to generate DESCMIS irq
*/
writel(EP_CMD_DRDY,
&priv_dev->regs->ep_cmd);
}
}
}
}
}
/**
* cdns3_gadget_giveback - call struct usb_request's ->complete callback
* @priv_ep: The endpoint to whom the request belongs to
* @priv_req: The request we're giving back
* @status: completion code for the request
*
* Must be called with controller's lock held and interrupts disabled. This
* function will unmap @req and call its ->complete() callback to notify upper
* layers that it has completed.
*/
void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
struct cdns3_request *priv_req,
int status)
{
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
struct usb_request *request = &priv_req->request;
list_del_init(&request->list);
if (request->status == -EINPROGRESS)
request->status = status;
usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request,
priv_ep->dir);
if ((priv_req->flags & REQUEST_UNALIGNED) &&
priv_ep->dir == USB_DIR_OUT && !request->status)
memcpy(request->buf, priv_req->aligned_buf->buf,
request->length);
priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
/* All TRBs have finished, clear the counter */
priv_req->finished_trb = 0;
trace_cdns3_gadget_giveback(priv_req);
if (priv_dev->dev_ver < DEV_VER_V2) {
request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
priv_req);
if (!request)
return;
}
if (request->complete) {
spin_unlock(&priv_dev->lock);
usb_gadget_giveback_request(&priv_ep->endpoint,
request);
spin_lock(&priv_dev->lock);
}
if (request->buf == priv_dev->zlp_buf)
cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
}
static void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
{
/* Work around for stale data address in TRB*/
if (priv_ep->wa1_set) {
trace_cdns3_wa1(priv_ep, "restore cycle bit");
priv_ep->wa1_set = 0;
priv_ep->wa1_trb_index = 0xFFFF;
if (priv_ep->wa1_cycle_bit) {
priv_ep->wa1_trb->control =
priv_ep->wa1_trb->control | cpu_to_le32(0x1);
} else {
priv_ep->wa1_trb->control =
priv_ep->wa1_trb->control & cpu_to_le32(~0x1);
}
}
}
static void cdns3_free_aligned_request_buf(struct work_struct *work)
{
struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
aligned_buf_wq);
struct cdns3_aligned_buf *buf, *tmp;
unsigned long flags;
spin_lock_irqsave(&priv_dev->lock, flags);
list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
if (!buf->in_use) {
list_del(&buf->list);
/*
* Re-enable interrupts to free DMA capable memory.
* Driver can't free this memory with disabled
* interrupts.
*/
spin_unlock_irqrestore(&priv_dev->lock, flags);
dma_free_coherent(priv_dev->sysdev, buf->size,
buf->buf, buf->dma);
kfree(buf);
spin_lock_irqsave(&priv_dev->lock, flags);
}
}
spin_unlock_irqrestore(&priv_dev->lock, flags);
}
static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
{
struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
struct cdns3_aligned_buf *buf;
/* check if buffer is aligned to 8. */
if (!((uintptr_t)priv_req->request.buf & 0x7))
return 0;
buf = priv_req->aligned_buf;
if (!buf || priv_req->request.length > buf->size) {
buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
if (!buf)
return -ENOMEM;
buf->size = priv_req->request.length;
buf->buf = dma_alloc_coherent(priv_dev->sysdev,
buf->size,
&buf->dma,
GFP_ATOMIC);
if (!buf->buf) {
kfree(buf);
return -ENOMEM;
}
if (priv_req->aligned_buf) {
trace_cdns3_free_aligned_request(priv_req);
priv_req->aligned_buf->in_use = 0;
queue_work(system_freezable_wq,
&priv_dev->aligned_buf_wq);
}
buf->in_use = 1;
priv_req->aligned_buf = buf;
list_add_tail(&buf->list,
&priv_dev->aligned_buf_list);
}
if (priv_ep->dir == USB_DIR_IN) {
memcpy(buf->buf, priv_req->request.buf,
priv_req->request.length);
}
priv_req->flags |= REQUEST_UNALIGNED;
trace_cdns3_prepare_aligned_request(priv_req);
return 0;
}
static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
struct cdns3_trb *trb)
{
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
if (!priv_ep->wa1_set) {
u32 doorbell;
doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
if (doorbell) {
priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
priv_ep->wa1_set = 1;
priv_ep->wa1_trb = trb;
priv_ep->wa1_trb_index = priv_ep->enqueue;
trace_cdns3_wa1(priv_ep, "set guard");
return 0;
}
}
return 1;
}
static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
struct cdns3_endpoint *priv_ep)
{
int dma_index;
u32 doorbell;
doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
if (!doorbell || dma_index != priv_ep->wa1_trb_index)
cdns3_wa1_restore_cycle_bit(priv_ep);
}
static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
struct usb_request *request)