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renesas_usb3.c
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renesas_usb3.c
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// SPDX-License-Identifier: GPL-2.0
/*
* Renesas USB3.0 Peripheral driver (USB gadget)
*
* Copyright (C) 2015-2017 Renesas Electronics Corporation
*/
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/extcon-provider.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/sizes.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/sys_soc.h>
#include <linux/uaccess.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/of.h>
#include <linux/usb/role.h>
/* register definitions */
#define USB3_AXI_INT_STA 0x008
#define USB3_AXI_INT_ENA 0x00c
#define USB3_DMA_INT_STA 0x010
#define USB3_DMA_INT_ENA 0x014
#define USB3_DMA_CH0_CON(n) (0x030 + ((n) - 1) * 0x10) /* n = 1 to 4 */
#define USB3_DMA_CH0_PRD_ADR(n) (0x034 + ((n) - 1) * 0x10) /* n = 1 to 4 */
#define USB3_USB_COM_CON 0x200
#define USB3_USB20_CON 0x204
#define USB3_USB30_CON 0x208
#define USB3_USB_STA 0x210
#define USB3_DRD_CON 0x218
#define USB3_USB_INT_STA_1 0x220
#define USB3_USB_INT_STA_2 0x224
#define USB3_USB_INT_ENA_1 0x228
#define USB3_USB_INT_ENA_2 0x22c
#define USB3_STUP_DAT_0 0x230
#define USB3_STUP_DAT_1 0x234
#define USB3_USB_OTG_STA 0x268
#define USB3_USB_OTG_INT_STA 0x26c
#define USB3_USB_OTG_INT_ENA 0x270
#define USB3_P0_MOD 0x280
#define USB3_P0_CON 0x288
#define USB3_P0_STA 0x28c
#define USB3_P0_INT_STA 0x290
#define USB3_P0_INT_ENA 0x294
#define USB3_P0_LNG 0x2a0
#define USB3_P0_READ 0x2a4
#define USB3_P0_WRITE 0x2a8
#define USB3_PIPE_COM 0x2b0
#define USB3_PN_MOD 0x2c0
#define USB3_PN_RAMMAP 0x2c4
#define USB3_PN_CON 0x2c8
#define USB3_PN_STA 0x2cc
#define USB3_PN_INT_STA 0x2d0
#define USB3_PN_INT_ENA 0x2d4
#define USB3_PN_LNG 0x2e0
#define USB3_PN_READ 0x2e4
#define USB3_PN_WRITE 0x2e8
#define USB3_SSIFCMD 0x340
/* AXI_INT_ENA and AXI_INT_STA */
#define AXI_INT_DMAINT BIT(31)
#define AXI_INT_EPCINT BIT(30)
/* PRD's n = from 1 to 4 */
#define AXI_INT_PRDEN_CLR_STA_SHIFT(n) (16 + (n) - 1)
#define AXI_INT_PRDERR_STA_SHIFT(n) (0 + (n) - 1)
#define AXI_INT_PRDEN_CLR_STA(n) (1 << AXI_INT_PRDEN_CLR_STA_SHIFT(n))
#define AXI_INT_PRDERR_STA(n) (1 << AXI_INT_PRDERR_STA_SHIFT(n))
/* DMA_INT_ENA and DMA_INT_STA */
#define DMA_INT(n) BIT(n)
/* DMA_CH0_CONn */
#define DMA_CON_PIPE_DIR BIT(15) /* 1: In Transfer */
#define DMA_CON_PIPE_NO_SHIFT 8
#define DMA_CON_PIPE_NO_MASK GENMASK(12, DMA_CON_PIPE_NO_SHIFT)
#define DMA_COM_PIPE_NO(n) (((n) << DMA_CON_PIPE_NO_SHIFT) & \
DMA_CON_PIPE_NO_MASK)
#define DMA_CON_PRD_EN BIT(0)
/* LCLKSEL */
#define LCLKSEL_LSEL BIT(18)
/* USB_COM_CON */
#define USB_COM_CON_CONF BIT(24)
#define USB_COM_CON_PN_WDATAIF_NL BIT(23)
#define USB_COM_CON_PN_RDATAIF_NL BIT(22)
#define USB_COM_CON_PN_LSTTR_PP BIT(21)
#define USB_COM_CON_SPD_MODE BIT(17)
#define USB_COM_CON_EP0_EN BIT(16)
#define USB_COM_CON_DEV_ADDR_SHIFT 8
#define USB_COM_CON_DEV_ADDR_MASK GENMASK(14, USB_COM_CON_DEV_ADDR_SHIFT)
#define USB_COM_CON_DEV_ADDR(n) (((n) << USB_COM_CON_DEV_ADDR_SHIFT) & \
USB_COM_CON_DEV_ADDR_MASK)
#define USB_COM_CON_RX_DETECTION BIT(1)
#define USB_COM_CON_PIPE_CLR BIT(0)
/* USB20_CON */
#define USB20_CON_B2_PUE BIT(31)
#define USB20_CON_B2_SUSPEND BIT(24)
#define USB20_CON_B2_CONNECT BIT(17)
#define USB20_CON_B2_TSTMOD_SHIFT 8
#define USB20_CON_B2_TSTMOD_MASK GENMASK(10, USB20_CON_B2_TSTMOD_SHIFT)
#define USB20_CON_B2_TSTMOD(n) (((n) << USB20_CON_B2_TSTMOD_SHIFT) & \
USB20_CON_B2_TSTMOD_MASK)
#define USB20_CON_B2_TSTMOD_EN BIT(0)
/* USB30_CON */
#define USB30_CON_POW_SEL_SHIFT 24
#define USB30_CON_POW_SEL_MASK GENMASK(26, USB30_CON_POW_SEL_SHIFT)
#define USB30_CON_POW_SEL_IN_U3 BIT(26)
#define USB30_CON_POW_SEL_IN_DISCON 0
#define USB30_CON_POW_SEL_P2_TO_P0 BIT(25)
#define USB30_CON_POW_SEL_P0_TO_P3 BIT(24)
#define USB30_CON_POW_SEL_P0_TO_P2 0
#define USB30_CON_B3_PLLWAKE BIT(23)
#define USB30_CON_B3_CONNECT BIT(17)
#define USB30_CON_B3_HOTRST_CMP BIT(1)
/* USB_STA */
#define USB_STA_SPEED_MASK (BIT(2) | BIT(1))
#define USB_STA_SPEED_HS BIT(2)
#define USB_STA_SPEED_FS BIT(1)
#define USB_STA_SPEED_SS 0
#define USB_STA_VBUS_STA BIT(0)
/* DRD_CON */
#define DRD_CON_PERI_CON BIT(24)
#define DRD_CON_VBOUT BIT(0)
/* USB_INT_ENA_1 and USB_INT_STA_1 */
#define USB_INT_1_B3_PLLWKUP BIT(31)
#define USB_INT_1_B3_LUPSUCS BIT(30)
#define USB_INT_1_B3_DISABLE BIT(27)
#define USB_INT_1_B3_WRMRST BIT(21)
#define USB_INT_1_B3_HOTRST BIT(20)
#define USB_INT_1_B2_USBRST BIT(12)
#define USB_INT_1_B2_L1SPND BIT(11)
#define USB_INT_1_B2_SPND BIT(9)
#define USB_INT_1_B2_RSUM BIT(8)
#define USB_INT_1_SPEED BIT(1)
#define USB_INT_1_VBUS_CNG BIT(0)
/* USB_INT_ENA_2 and USB_INT_STA_2 */
#define USB_INT_2_PIPE(n) BIT(n)
/* USB_OTG_STA, USB_OTG_INT_STA and USB_OTG_INT_ENA */
#define USB_OTG_IDMON BIT(4)
/* P0_MOD */
#define P0_MOD_DIR BIT(6)
/* P0_CON and PN_CON */
#define PX_CON_BYTE_EN_MASK (BIT(10) | BIT(9))
#define PX_CON_BYTE_EN_SHIFT 9
#define PX_CON_BYTE_EN_BYTES(n) (((n) << PX_CON_BYTE_EN_SHIFT) & \
PX_CON_BYTE_EN_MASK)
#define PX_CON_SEND BIT(8)
/* P0_CON */
#define P0_CON_ST_RES_MASK (BIT(27) | BIT(26))
#define P0_CON_ST_RES_FORCE_STALL BIT(27)
#define P0_CON_ST_RES_NORMAL BIT(26)
#define P0_CON_ST_RES_FORCE_NRDY 0
#define P0_CON_OT_RES_MASK (BIT(25) | BIT(24))
#define P0_CON_OT_RES_FORCE_STALL BIT(25)
#define P0_CON_OT_RES_NORMAL BIT(24)
#define P0_CON_OT_RES_FORCE_NRDY 0
#define P0_CON_IN_RES_MASK (BIT(17) | BIT(16))
#define P0_CON_IN_RES_FORCE_STALL BIT(17)
#define P0_CON_IN_RES_NORMAL BIT(16)
#define P0_CON_IN_RES_FORCE_NRDY 0
#define P0_CON_RES_WEN BIT(7)
#define P0_CON_BCLR BIT(1)
/* P0_STA and PN_STA */
#define PX_STA_BUFSTS BIT(0)
/* P0_INT_ENA and P0_INT_STA */
#define P0_INT_STSED BIT(18)
#define P0_INT_STSST BIT(17)
#define P0_INT_SETUP BIT(16)
#define P0_INT_RCVNL BIT(8)
#define P0_INT_ERDY BIT(7)
#define P0_INT_FLOW BIT(6)
#define P0_INT_STALL BIT(2)
#define P0_INT_NRDY BIT(1)
#define P0_INT_BFRDY BIT(0)
#define P0_INT_ALL_BITS (P0_INT_STSED | P0_INT_SETUP | P0_INT_BFRDY)
/* PN_MOD */
#define PN_MOD_DIR BIT(6)
#define PN_MOD_TYPE_SHIFT 4
#define PN_MOD_TYPE_MASK GENMASK(5, PN_MOD_TYPE_SHIFT)
#define PN_MOD_TYPE(n) (((n) << PN_MOD_TYPE_SHIFT) & \
PN_MOD_TYPE_MASK)
#define PN_MOD_EPNUM_MASK GENMASK(3, 0)
#define PN_MOD_EPNUM(n) ((n) & PN_MOD_EPNUM_MASK)
/* PN_RAMMAP */
#define PN_RAMMAP_RAMAREA_SHIFT 29
#define PN_RAMMAP_RAMAREA_MASK GENMASK(31, PN_RAMMAP_RAMAREA_SHIFT)
#define PN_RAMMAP_RAMAREA_16KB BIT(31)
#define PN_RAMMAP_RAMAREA_8KB (BIT(30) | BIT(29))
#define PN_RAMMAP_RAMAREA_4KB BIT(30)
#define PN_RAMMAP_RAMAREA_2KB BIT(29)
#define PN_RAMMAP_RAMAREA_1KB 0
#define PN_RAMMAP_MPKT_SHIFT 16
#define PN_RAMMAP_MPKT_MASK GENMASK(26, PN_RAMMAP_MPKT_SHIFT)
#define PN_RAMMAP_MPKT(n) (((n) << PN_RAMMAP_MPKT_SHIFT) & \
PN_RAMMAP_MPKT_MASK)
#define PN_RAMMAP_RAMIF_SHIFT 14
#define PN_RAMMAP_RAMIF_MASK GENMASK(15, PN_RAMMAP_RAMIF_SHIFT)
#define PN_RAMMAP_RAMIF(n) (((n) << PN_RAMMAP_RAMIF_SHIFT) & \
PN_RAMMAP_RAMIF_MASK)
#define PN_RAMMAP_BASEAD_MASK GENMASK(13, 0)
#define PN_RAMMAP_BASEAD(offs) (((offs) >> 3) & PN_RAMMAP_BASEAD_MASK)
#define PN_RAMMAP_DATA(area, ramif, basead) ((PN_RAMMAP_##area) | \
(PN_RAMMAP_RAMIF(ramif)) | \
(PN_RAMMAP_BASEAD(basead)))
/* PN_CON */
#define PN_CON_EN BIT(31)
#define PN_CON_DATAIF_EN BIT(30)
#define PN_CON_RES_MASK (BIT(17) | BIT(16))
#define PN_CON_RES_FORCE_STALL BIT(17)
#define PN_CON_RES_NORMAL BIT(16)
#define PN_CON_RES_FORCE_NRDY 0
#define PN_CON_LAST BIT(11)
#define PN_CON_RES_WEN BIT(7)
#define PN_CON_CLR BIT(0)
/* PN_INT_STA and PN_INT_ENA */
#define PN_INT_LSTTR BIT(4)
#define PN_INT_BFRDY BIT(0)
/* USB3_SSIFCMD */
#define SSIFCMD_URES_U2 BIT(9)
#define SSIFCMD_URES_U1 BIT(8)
#define SSIFCMD_UDIR_U2 BIT(7)
#define SSIFCMD_UDIR_U1 BIT(6)
#define SSIFCMD_UREQ_U2 BIT(5)
#define SSIFCMD_UREQ_U1 BIT(4)
#define USB3_EP0_SS_MAX_PACKET_SIZE 512
#define USB3_EP0_HSFS_MAX_PACKET_SIZE 64
#define USB3_EP0_BUF_SIZE 8
#define USB3_MAX_NUM_PIPES 6 /* This includes PIPE 0 */
#define USB3_WAIT_US 3
#define USB3_DMA_NUM_SETTING_AREA 4
/*
* To avoid double-meaning of "0" (xferred 65536 bytes or received zlp if
* buffer size is 65536), this driver uses the maximum size per a entry is
* 32768 bytes.
*/
#define USB3_DMA_MAX_XFER_SIZE 32768
#define USB3_DMA_PRD_SIZE 4096
struct renesas_usb3;
/* Physical Region Descriptor Table */
struct renesas_usb3_prd {
u32 word1;
#define USB3_PRD1_E BIT(30) /* the end of chain */
#define USB3_PRD1_U BIT(29) /* completion of transfer */
#define USB3_PRD1_D BIT(28) /* Error occurred */
#define USB3_PRD1_INT BIT(27) /* Interrupt occurred */
#define USB3_PRD1_LST BIT(26) /* Last Packet */
#define USB3_PRD1_B_INC BIT(24)
#define USB3_PRD1_MPS_8 0
#define USB3_PRD1_MPS_16 BIT(21)
#define USB3_PRD1_MPS_32 BIT(22)
#define USB3_PRD1_MPS_64 (BIT(22) | BIT(21))
#define USB3_PRD1_MPS_512 BIT(23)
#define USB3_PRD1_MPS_1024 (BIT(23) | BIT(21))
#define USB3_PRD1_MPS_RESERVED (BIT(23) | BIT(22) | BIT(21))
#define USB3_PRD1_SIZE_MASK GENMASK(15, 0)
u32 bap;
};
#define USB3_DMA_NUM_PRD_ENTRIES (USB3_DMA_PRD_SIZE / \
sizeof(struct renesas_usb3_prd))
#define USB3_DMA_MAX_XFER_SIZE_ALL_PRDS (USB3_DMA_PRD_SIZE / \
sizeof(struct renesas_usb3_prd) * \
USB3_DMA_MAX_XFER_SIZE)
struct renesas_usb3_dma {
struct renesas_usb3_prd *prd;
dma_addr_t prd_dma;
int num; /* Setting area number (from 1 to 4) */
bool used;
};
struct renesas_usb3_request {
struct usb_request req;
struct list_head queue;
};
#define USB3_EP_NAME_SIZE 8
struct renesas_usb3_ep {
struct usb_ep ep;
struct renesas_usb3 *usb3;
struct renesas_usb3_dma *dma;
int num;
char ep_name[USB3_EP_NAME_SIZE];
struct list_head queue;
u32 rammap_val;
bool dir_in;
bool halt;
bool wedge;
bool started;
};
struct renesas_usb3_priv {
int ramsize_per_ramif; /* unit = bytes */
int num_ramif;
int ramsize_per_pipe; /* unit = bytes */
bool workaround_for_vbus; /* if true, don't check vbus signal */
};
struct renesas_usb3 {
void __iomem *reg;
struct usb_gadget gadget;
struct usb_gadget_driver *driver;
struct extcon_dev *extcon;
struct work_struct extcon_work;
struct phy *phy;
struct dentry *dentry;
struct usb_role_switch *role_sw;
struct device *host_dev;
struct work_struct role_work;
enum usb_role role;
struct renesas_usb3_ep *usb3_ep;
int num_usb3_eps;
struct renesas_usb3_dma dma[USB3_DMA_NUM_SETTING_AREA];
spinlock_t lock;
int disabled_count;
struct usb_request *ep0_req;
enum usb_role connection_state;
u16 test_mode;
u8 ep0_buf[USB3_EP0_BUF_SIZE];
bool softconnect;
bool workaround_for_vbus;
bool extcon_host; /* check id and set EXTCON_USB_HOST */
bool extcon_usb; /* check vbus and set EXTCON_USB */
bool forced_b_device;
bool start_to_connect;
bool role_sw_by_connector;
};
#define gadget_to_renesas_usb3(_gadget) \
container_of(_gadget, struct renesas_usb3, gadget)
#define renesas_usb3_to_gadget(renesas_usb3) (&renesas_usb3->gadget)
#define usb3_to_dev(_usb3) (_usb3->gadget.dev.parent)
#define usb_ep_to_usb3_ep(_ep) container_of(_ep, struct renesas_usb3_ep, ep)
#define usb3_ep_to_usb3(_usb3_ep) (_usb3_ep->usb3)
#define usb_req_to_usb3_req(_req) container_of(_req, \
struct renesas_usb3_request, req)
#define usb3_get_ep(usb3, n) ((usb3)->usb3_ep + (n))
#define usb3_for_each_ep(usb3_ep, usb3, i) \
for ((i) = 0, usb3_ep = usb3_get_ep(usb3, (i)); \
(i) < (usb3)->num_usb3_eps; \
(i)++, usb3_ep = usb3_get_ep(usb3, (i)))
#define usb3_get_dma(usb3, i) (&(usb3)->dma[i])
#define usb3_for_each_dma(usb3, dma, i) \
for ((i) = 0, dma = usb3_get_dma((usb3), (i)); \
(i) < USB3_DMA_NUM_SETTING_AREA; \
(i)++, dma = usb3_get_dma((usb3), (i)))
static const char udc_name[] = "renesas_usb3";
static bool use_dma = 1;
module_param(use_dma, bool, 0644);
MODULE_PARM_DESC(use_dma, "use dedicated DMAC");
static void usb3_write(struct renesas_usb3 *usb3, u32 data, u32 offs)
{
iowrite32(data, usb3->reg + offs);
}
static u32 usb3_read(struct renesas_usb3 *usb3, u32 offs)
{
return ioread32(usb3->reg + offs);
}
static void usb3_set_bit(struct renesas_usb3 *usb3, u32 bits, u32 offs)
{
u32 val = usb3_read(usb3, offs);
val |= bits;
usb3_write(usb3, val, offs);
}
static void usb3_clear_bit(struct renesas_usb3 *usb3, u32 bits, u32 offs)
{
u32 val = usb3_read(usb3, offs);
val &= ~bits;
usb3_write(usb3, val, offs);
}
static int usb3_wait(struct renesas_usb3 *usb3, u32 reg, u32 mask,
u32 expected)
{
int i;
for (i = 0; i < USB3_WAIT_US; i++) {
if ((usb3_read(usb3, reg) & mask) == expected)
return 0;
udelay(1);
}
dev_dbg(usb3_to_dev(usb3), "%s: timed out (%8x, %08x, %08x)\n",
__func__, reg, mask, expected);
return -EBUSY;
}
static void renesas_usb3_extcon_work(struct work_struct *work)
{
struct renesas_usb3 *usb3 = container_of(work, struct renesas_usb3,
extcon_work);
extcon_set_state_sync(usb3->extcon, EXTCON_USB_HOST, usb3->extcon_host);
extcon_set_state_sync(usb3->extcon, EXTCON_USB, usb3->extcon_usb);
}
static void usb3_enable_irq_1(struct renesas_usb3 *usb3, u32 bits)
{
usb3_set_bit(usb3, bits, USB3_USB_INT_ENA_1);
}
static void usb3_disable_irq_1(struct renesas_usb3 *usb3, u32 bits)
{
usb3_clear_bit(usb3, bits, USB3_USB_INT_ENA_1);
}
static void usb3_enable_pipe_irq(struct renesas_usb3 *usb3, int num)
{
usb3_set_bit(usb3, USB_INT_2_PIPE(num), USB3_USB_INT_ENA_2);
}
static void usb3_disable_pipe_irq(struct renesas_usb3 *usb3, int num)
{
usb3_clear_bit(usb3, USB_INT_2_PIPE(num), USB3_USB_INT_ENA_2);
}
static bool usb3_is_host(struct renesas_usb3 *usb3)
{
return !(usb3_read(usb3, USB3_DRD_CON) & DRD_CON_PERI_CON);
}
static void usb3_init_axi_bridge(struct renesas_usb3 *usb3)
{
/* Set AXI_INT */
usb3_write(usb3, ~0, USB3_DMA_INT_STA);
usb3_write(usb3, 0, USB3_DMA_INT_ENA);
usb3_set_bit(usb3, AXI_INT_DMAINT | AXI_INT_EPCINT, USB3_AXI_INT_ENA);
}
static void usb3_init_epc_registers(struct renesas_usb3 *usb3)
{
usb3_write(usb3, ~0, USB3_USB_INT_STA_1);
if (!usb3->workaround_for_vbus)
usb3_enable_irq_1(usb3, USB_INT_1_VBUS_CNG);
}
static bool usb3_wakeup_usb2_phy(struct renesas_usb3 *usb3)
{
if (!(usb3_read(usb3, USB3_USB20_CON) & USB20_CON_B2_SUSPEND))
return true; /* already waked it up */
usb3_clear_bit(usb3, USB20_CON_B2_SUSPEND, USB3_USB20_CON);
usb3_enable_irq_1(usb3, USB_INT_1_B2_RSUM);
return false;
}
static void usb3_usb2_pullup(struct renesas_usb3 *usb3, int pullup)
{
u32 bits = USB20_CON_B2_PUE | USB20_CON_B2_CONNECT;
if (usb3->softconnect && pullup)
usb3_set_bit(usb3, bits, USB3_USB20_CON);
else
usb3_clear_bit(usb3, bits, USB3_USB20_CON);
}
static void usb3_set_test_mode(struct renesas_usb3 *usb3)
{
u32 val = usb3_read(usb3, USB3_USB20_CON);
val &= ~USB20_CON_B2_TSTMOD_MASK;
val |= USB20_CON_B2_TSTMOD(usb3->test_mode);
usb3_write(usb3, val | USB20_CON_B2_TSTMOD_EN, USB3_USB20_CON);
if (!usb3->test_mode)
usb3_clear_bit(usb3, USB20_CON_B2_TSTMOD_EN, USB3_USB20_CON);
}
static void usb3_start_usb2_connection(struct renesas_usb3 *usb3)
{
usb3->disabled_count++;
usb3_set_bit(usb3, USB_COM_CON_EP0_EN, USB3_USB_COM_CON);
usb3_set_bit(usb3, USB_COM_CON_SPD_MODE, USB3_USB_COM_CON);
usb3_usb2_pullup(usb3, 1);
}
static int usb3_is_usb3_phy_in_u3(struct renesas_usb3 *usb3)
{
return usb3_read(usb3, USB3_USB30_CON) & USB30_CON_POW_SEL_IN_U3;
}
static bool usb3_wakeup_usb3_phy(struct renesas_usb3 *usb3)
{
if (!usb3_is_usb3_phy_in_u3(usb3))
return true; /* already waked it up */
usb3_set_bit(usb3, USB30_CON_B3_PLLWAKE, USB3_USB30_CON);
usb3_enable_irq_1(usb3, USB_INT_1_B3_PLLWKUP);
return false;
}
static u16 usb3_feature_get_un_enabled(struct renesas_usb3 *usb3)
{
u32 mask_u2 = SSIFCMD_UDIR_U2 | SSIFCMD_UREQ_U2;
u32 mask_u1 = SSIFCMD_UDIR_U1 | SSIFCMD_UREQ_U1;
u32 val = usb3_read(usb3, USB3_SSIFCMD);
u16 ret = 0;
/* Enables {U2,U1} if the bits of UDIR and UREQ are set to 0 */
if (!(val & mask_u2))
ret |= 1 << USB_DEV_STAT_U2_ENABLED;
if (!(val & mask_u1))
ret |= 1 << USB_DEV_STAT_U1_ENABLED;
return ret;
}
static void usb3_feature_u2_enable(struct renesas_usb3 *usb3, bool enable)
{
u32 bits = SSIFCMD_UDIR_U2 | SSIFCMD_UREQ_U2;
/* Enables U2 if the bits of UDIR and UREQ are set to 0 */
if (enable)
usb3_clear_bit(usb3, bits, USB3_SSIFCMD);
else
usb3_set_bit(usb3, bits, USB3_SSIFCMD);
}
static void usb3_feature_u1_enable(struct renesas_usb3 *usb3, bool enable)
{
u32 bits = SSIFCMD_UDIR_U1 | SSIFCMD_UREQ_U1;
/* Enables U1 if the bits of UDIR and UREQ are set to 0 */
if (enable)
usb3_clear_bit(usb3, bits, USB3_SSIFCMD);
else
usb3_set_bit(usb3, bits, USB3_SSIFCMD);
}
static void usb3_start_operation_for_usb3(struct renesas_usb3 *usb3)
{
usb3_set_bit(usb3, USB_COM_CON_EP0_EN, USB3_USB_COM_CON);
usb3_clear_bit(usb3, USB_COM_CON_SPD_MODE, USB3_USB_COM_CON);
usb3_set_bit(usb3, USB30_CON_B3_CONNECT, USB3_USB30_CON);
}
static void usb3_start_usb3_connection(struct renesas_usb3 *usb3)
{
usb3_start_operation_for_usb3(usb3);
usb3_set_bit(usb3, USB_COM_CON_RX_DETECTION, USB3_USB_COM_CON);
usb3_enable_irq_1(usb3, USB_INT_1_B3_LUPSUCS | USB_INT_1_B3_DISABLE |
USB_INT_1_SPEED);
}
static void usb3_stop_usb3_connection(struct renesas_usb3 *usb3)
{
usb3_clear_bit(usb3, USB30_CON_B3_CONNECT, USB3_USB30_CON);
}
static void usb3_transition_to_default_state(struct renesas_usb3 *usb3,
bool is_usb3)
{
usb3_set_bit(usb3, USB_INT_2_PIPE(0), USB3_USB_INT_ENA_2);
usb3_write(usb3, P0_INT_ALL_BITS, USB3_P0_INT_STA);
usb3_set_bit(usb3, P0_INT_ALL_BITS, USB3_P0_INT_ENA);
if (is_usb3)
usb3_enable_irq_1(usb3, USB_INT_1_B3_WRMRST |
USB_INT_1_B3_HOTRST);
else
usb3_enable_irq_1(usb3, USB_INT_1_B2_SPND |
USB_INT_1_B2_L1SPND | USB_INT_1_B2_USBRST);
}
static void usb3_connect(struct renesas_usb3 *usb3)
{
if (usb3_wakeup_usb3_phy(usb3))
usb3_start_usb3_connection(usb3);
}
static void usb3_reset_epc(struct renesas_usb3 *usb3)
{
usb3_clear_bit(usb3, USB_COM_CON_CONF, USB3_USB_COM_CON);
usb3_clear_bit(usb3, USB_COM_CON_EP0_EN, USB3_USB_COM_CON);
usb3_set_bit(usb3, USB_COM_CON_PIPE_CLR, USB3_USB_COM_CON);
usb3->test_mode = 0;
usb3_set_test_mode(usb3);
}
static void usb3_disconnect(struct renesas_usb3 *usb3)
{
usb3->disabled_count = 0;
usb3_usb2_pullup(usb3, 0);
usb3_clear_bit(usb3, USB30_CON_B3_CONNECT, USB3_USB30_CON);
usb3_reset_epc(usb3);
usb3_disable_irq_1(usb3, USB_INT_1_B2_RSUM | USB_INT_1_B3_PLLWKUP |
USB_INT_1_B3_LUPSUCS | USB_INT_1_B3_DISABLE |
USB_INT_1_SPEED | USB_INT_1_B3_WRMRST |
USB_INT_1_B3_HOTRST | USB_INT_1_B2_SPND |
USB_INT_1_B2_L1SPND | USB_INT_1_B2_USBRST);
usb3_clear_bit(usb3, USB_COM_CON_SPD_MODE, USB3_USB_COM_CON);
usb3_init_epc_registers(usb3);
if (usb3->driver)
usb3->driver->disconnect(&usb3->gadget);
}
static void usb3_check_vbus(struct renesas_usb3 *usb3)
{
if (usb3->workaround_for_vbus) {
usb3_connect(usb3);
} else {
usb3->extcon_usb = !!(usb3_read(usb3, USB3_USB_STA) &
USB_STA_VBUS_STA);
if (usb3->extcon_usb)
usb3_connect(usb3);
else
usb3_disconnect(usb3);
schedule_work(&usb3->extcon_work);
}
}
static void renesas_usb3_role_work(struct work_struct *work)
{
struct renesas_usb3 *usb3 =
container_of(work, struct renesas_usb3, role_work);
usb_role_switch_set_role(usb3->role_sw, usb3->role);
}
static void usb3_set_mode(struct renesas_usb3 *usb3, bool host)
{
if (host)
usb3_clear_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
else
usb3_set_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
}
static void usb3_set_mode_by_role_sw(struct renesas_usb3 *usb3, bool host)
{
if (usb3->role_sw) {
usb3->role = host ? USB_ROLE_HOST : USB_ROLE_DEVICE;
schedule_work(&usb3->role_work);
} else {
usb3_set_mode(usb3, host);
}
}
static void usb3_vbus_out(struct renesas_usb3 *usb3, bool enable)
{
if (enable)
usb3_set_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
else
usb3_clear_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
}
static void usb3_mode_config(struct renesas_usb3 *usb3, bool host, bool a_dev)
{
unsigned long flags;
spin_lock_irqsave(&usb3->lock, flags);
if (!usb3->role_sw_by_connector ||
usb3->connection_state != USB_ROLE_NONE) {
usb3_set_mode_by_role_sw(usb3, host);
usb3_vbus_out(usb3, a_dev);
}
/* for A-Peripheral or forced B-device mode */
if ((!host && a_dev) || usb3->start_to_connect)
usb3_connect(usb3);
spin_unlock_irqrestore(&usb3->lock, flags);
}
static bool usb3_is_a_device(struct renesas_usb3 *usb3)
{
return !(usb3_read(usb3, USB3_USB_OTG_STA) & USB_OTG_IDMON);
}
static void usb3_check_id(struct renesas_usb3 *usb3)
{
usb3->extcon_host = usb3_is_a_device(usb3);
if ((!usb3->role_sw_by_connector && usb3->extcon_host &&
!usb3->forced_b_device) || usb3->connection_state == USB_ROLE_HOST)
usb3_mode_config(usb3, true, true);
else
usb3_mode_config(usb3, false, false);
schedule_work(&usb3->extcon_work);
}
static void renesas_usb3_init_controller(struct renesas_usb3 *usb3)
{
usb3_init_axi_bridge(usb3);
usb3_init_epc_registers(usb3);
usb3_set_bit(usb3, USB_COM_CON_PN_WDATAIF_NL |
USB_COM_CON_PN_RDATAIF_NL | USB_COM_CON_PN_LSTTR_PP,
USB3_USB_COM_CON);
usb3_write(usb3, USB_OTG_IDMON, USB3_USB_OTG_INT_STA);
usb3_write(usb3, USB_OTG_IDMON, USB3_USB_OTG_INT_ENA);
usb3_check_id(usb3);
usb3_check_vbus(usb3);
}
static void renesas_usb3_stop_controller(struct renesas_usb3 *usb3)
{
usb3_disconnect(usb3);
usb3_write(usb3, 0, USB3_P0_INT_ENA);
usb3_write(usb3, 0, USB3_USB_OTG_INT_ENA);
usb3_write(usb3, 0, USB3_USB_INT_ENA_1);
usb3_write(usb3, 0, USB3_USB_INT_ENA_2);
usb3_write(usb3, 0, USB3_AXI_INT_ENA);
}
static void usb3_irq_epc_int_1_pll_wakeup(struct renesas_usb3 *usb3)
{
usb3_disable_irq_1(usb3, USB_INT_1_B3_PLLWKUP);
usb3_clear_bit(usb3, USB30_CON_B3_PLLWAKE, USB3_USB30_CON);
usb3_start_usb3_connection(usb3);
}
static void usb3_irq_epc_int_1_linkup_success(struct renesas_usb3 *usb3)
{
usb3_transition_to_default_state(usb3, true);
}
static void usb3_irq_epc_int_1_resume(struct renesas_usb3 *usb3)
{
usb3_disable_irq_1(usb3, USB_INT_1_B2_RSUM);
usb3_start_usb2_connection(usb3);
usb3_transition_to_default_state(usb3, false);
}
static void usb3_irq_epc_int_1_suspend(struct renesas_usb3 *usb3)
{
usb3_disable_irq_1(usb3, USB_INT_1_B2_SPND);
if (usb3->gadget.speed != USB_SPEED_UNKNOWN &&
usb3->gadget.state != USB_STATE_NOTATTACHED) {
if (usb3->driver && usb3->driver->suspend)
usb3->driver->suspend(&usb3->gadget);
usb_gadget_set_state(&usb3->gadget, USB_STATE_SUSPENDED);
}
}
static void usb3_irq_epc_int_1_disable(struct renesas_usb3 *usb3)
{
usb3_stop_usb3_connection(usb3);
if (usb3_wakeup_usb2_phy(usb3))
usb3_irq_epc_int_1_resume(usb3);
}
static void usb3_irq_epc_int_1_bus_reset(struct renesas_usb3 *usb3)
{
usb3_reset_epc(usb3);
if (usb3->disabled_count < 3)
usb3_start_usb3_connection(usb3);
else
usb3_start_usb2_connection(usb3);
}
static void usb3_irq_epc_int_1_vbus_change(struct renesas_usb3 *usb3)
{
usb3_check_vbus(usb3);
}
static void usb3_irq_epc_int_1_hot_reset(struct renesas_usb3 *usb3)
{
usb3_reset_epc(usb3);
usb3_set_bit(usb3, USB_COM_CON_EP0_EN, USB3_USB_COM_CON);
/* This bit shall be set within 12ms from the start of HotReset */
usb3_set_bit(usb3, USB30_CON_B3_HOTRST_CMP, USB3_USB30_CON);
}
static void usb3_irq_epc_int_1_warm_reset(struct renesas_usb3 *usb3)
{
usb3_reset_epc(usb3);
usb3_set_bit(usb3, USB_COM_CON_EP0_EN, USB3_USB_COM_CON);
usb3_start_operation_for_usb3(usb3);
usb3_enable_irq_1(usb3, USB_INT_1_SPEED);
}
static void usb3_irq_epc_int_1_speed(struct renesas_usb3 *usb3)
{
u32 speed = usb3_read(usb3, USB3_USB_STA) & USB_STA_SPEED_MASK;
switch (speed) {
case USB_STA_SPEED_SS:
usb3->gadget.speed = USB_SPEED_SUPER;
usb3->gadget.ep0->maxpacket = USB3_EP0_SS_MAX_PACKET_SIZE;
break;
case USB_STA_SPEED_HS:
usb3->gadget.speed = USB_SPEED_HIGH;
usb3->gadget.ep0->maxpacket = USB3_EP0_HSFS_MAX_PACKET_SIZE;
break;
case USB_STA_SPEED_FS:
usb3->gadget.speed = USB_SPEED_FULL;
usb3->gadget.ep0->maxpacket = USB3_EP0_HSFS_MAX_PACKET_SIZE;
break;
default:
usb3->gadget.speed = USB_SPEED_UNKNOWN;
break;
}
}
static void usb3_irq_epc_int_1(struct renesas_usb3 *usb3, u32 int_sta_1)
{
if (int_sta_1 & USB_INT_1_B3_PLLWKUP)
usb3_irq_epc_int_1_pll_wakeup(usb3);
if (int_sta_1 & USB_INT_1_B3_LUPSUCS)
usb3_irq_epc_int_1_linkup_success(usb3);
if (int_sta_1 & USB_INT_1_B3_HOTRST)
usb3_irq_epc_int_1_hot_reset(usb3);
if (int_sta_1 & USB_INT_1_B3_WRMRST)
usb3_irq_epc_int_1_warm_reset(usb3);
if (int_sta_1 & USB_INT_1_B3_DISABLE)
usb3_irq_epc_int_1_disable(usb3);
if (int_sta_1 & USB_INT_1_B2_USBRST)
usb3_irq_epc_int_1_bus_reset(usb3);
if (int_sta_1 & USB_INT_1_B2_RSUM)
usb3_irq_epc_int_1_resume(usb3);
if (int_sta_1 & USB_INT_1_B2_SPND)
usb3_irq_epc_int_1_suspend(usb3);
if (int_sta_1 & USB_INT_1_SPEED)
usb3_irq_epc_int_1_speed(usb3);
if (int_sta_1 & USB_INT_1_VBUS_CNG)
usb3_irq_epc_int_1_vbus_change(usb3);
}
static struct renesas_usb3_request *__usb3_get_request(struct renesas_usb3_ep
*usb3_ep)
{
return list_first_entry_or_null(&usb3_ep->queue,
struct renesas_usb3_request, queue);
}
static struct renesas_usb3_request *usb3_get_request(struct renesas_usb3_ep
*usb3_ep)
{
struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
struct renesas_usb3_request *usb3_req;
unsigned long flags;
spin_lock_irqsave(&usb3->lock, flags);
usb3_req = __usb3_get_request(usb3_ep);
spin_unlock_irqrestore(&usb3->lock, flags);
return usb3_req;
}
static void __usb3_request_done(struct renesas_usb3_ep *usb3_ep,
struct renesas_usb3_request *usb3_req,
int status)
{
struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
dev_dbg(usb3_to_dev(usb3), "giveback: ep%2d, %u, %u, %d\n",
usb3_ep->num, usb3_req->req.length, usb3_req->req.actual,
status);
usb3_req->req.status = status;
usb3_ep->started = false;
list_del_init(&usb3_req->queue);
spin_unlock(&usb3->lock);
usb_gadget_giveback_request(&usb3_ep->ep, &usb3_req->req);
spin_lock(&usb3->lock);
}
static void usb3_request_done(struct renesas_usb3_ep *usb3_ep,
struct renesas_usb3_request *usb3_req, int status)
{
struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
unsigned long flags;
spin_lock_irqsave(&usb3->lock, flags);
__usb3_request_done(usb3_ep, usb3_req, status);
spin_unlock_irqrestore(&usb3->lock, flags);
}
static void usb3_irq_epc_pipe0_status_end(struct renesas_usb3 *usb3)
{
struct renesas_usb3_ep *usb3_ep = usb3_get_ep(usb3, 0);
struct renesas_usb3_request *usb3_req = usb3_get_request(usb3_ep);
if (usb3_req)
usb3_request_done(usb3_ep, usb3_req, 0);
if (usb3->test_mode)
usb3_set_test_mode(usb3);
}
static void usb3_get_setup_data(struct renesas_usb3 *usb3,
struct usb_ctrlrequest *ctrl)
{
struct renesas_usb3_ep *usb3_ep = usb3_get_ep(usb3, 0);
u32 *data = (u32 *)ctrl;
*data++ = usb3_read(usb3, USB3_STUP_DAT_0);
*data = usb3_read(usb3, USB3_STUP_DAT_1);
/* update this driver's flag */
usb3_ep->dir_in = !!(ctrl->bRequestType & USB_DIR_IN);
}
static void usb3_set_p0_con_update_res(struct renesas_usb3 *usb3, u32 res)
{
u32 val = usb3_read(usb3, USB3_P0_CON);
val &= ~(P0_CON_ST_RES_MASK | P0_CON_OT_RES_MASK | P0_CON_IN_RES_MASK);
val |= res | P0_CON_RES_WEN;
usb3_write(usb3, val, USB3_P0_CON);
}
static void usb3_set_p0_con_for_ctrl_read_data(struct renesas_usb3 *usb3)
{
usb3_set_p0_con_update_res(usb3, P0_CON_ST_RES_FORCE_NRDY |
P0_CON_OT_RES_FORCE_STALL |
P0_CON_IN_RES_NORMAL);
}
static void usb3_set_p0_con_for_ctrl_read_status(struct renesas_usb3 *usb3)
{
usb3_set_p0_con_update_res(usb3, P0_CON_ST_RES_NORMAL |
P0_CON_OT_RES_FORCE_STALL |
P0_CON_IN_RES_NORMAL);
}
static void usb3_set_p0_con_for_ctrl_write_data(struct renesas_usb3 *usb3)
{
usb3_set_p0_con_update_res(usb3, P0_CON_ST_RES_FORCE_NRDY |
P0_CON_OT_RES_NORMAL |
P0_CON_IN_RES_FORCE_STALL);
}
static void usb3_set_p0_con_for_ctrl_write_status(struct renesas_usb3 *usb3)
{
usb3_set_p0_con_update_res(usb3, P0_CON_ST_RES_NORMAL |
P0_CON_OT_RES_NORMAL |
P0_CON_IN_RES_FORCE_STALL);
}
static void usb3_set_p0_con_for_no_data(struct renesas_usb3 *usb3)
{
usb3_set_p0_con_update_res(usb3, P0_CON_ST_RES_NORMAL |
P0_CON_OT_RES_FORCE_STALL |
P0_CON_IN_RES_FORCE_STALL);
}