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Alibaba_MIT_Speech_DFSMN.patch
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Alibaba_MIT_Speech_DFSMN.patch
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From beb50ec01b054bd3b5ea054c74bd6a918dc386a8 Mon Sep 17 00:00:00 2001
From: "sly.zsl" <sly.zsl@alibaba-inc.com>
Date: Mon, 4 Jun 2018 19:52:11 +0800
Subject: [PATCH] add DFSMN related codes and example scripts
---
egs/librispeech/s5/local/nnet/DFSMN_L.proto | 23 ++
egs/librispeech/s5/local/nnet/DFSMN_M.proto | 19 ++
egs/librispeech/s5/local/nnet/DFSMN_S.proto | 19 ++
egs/librispeech/s5/local/nnet/run_fsmn_ivector.sh | 144 +++++++++
src/cudamatrix/cu-device.cc | 17 ++
src/cudamatrix/cu-device.h | 2 +
src/cudamatrix/cu-kernels-ansi.h | 32 ++
src/cudamatrix/cu-kernels.cu | 335 +++++++++++++++++++++
src/cudamatrix/cu-kernels.h | 75 +++++
src/cudamatrix/cu-matrix.cc | 209 ++++++++++++-
src/cudamatrix/cu-matrix.h | 33 +-
src/featbin/Makefile | 2 +-
src/featbin/append-ivector-to-feats.cc | 231 ++++++++++++++
src/nnet/nnet-affine-transform.h | 28 +-
src/nnet/nnet-component.cc | 22 ++
src/nnet/nnet-component.h | 9 +-
src/nnet/nnet-deep-fsmn.h | 350 ++++++++++++++++++++++
src/nnet/nnet-fsmn.h | 211 +++++++++++++
src/nnet/nnet-linear-transform.h | 20 +-
src/nnet/nnet-nnet.cc | 25 ++
src/nnet/nnet-nnet.h | 4 +
src/nnet/nnet-uni-deep-fsmn.h | 319 ++++++++++++++++++++
src/nnet/nnet-uni-fsmn.h | 175 +++++++++++
23 files changed, 2282 insertions(+), 22 deletions(-)
create mode 100644 egs/librispeech/s5/local/nnet/DFSMN_L.proto
create mode 100644 egs/librispeech/s5/local/nnet/DFSMN_M.proto
create mode 100644 egs/librispeech/s5/local/nnet/DFSMN_S.proto
create mode 100644 egs/librispeech/s5/local/nnet/run_fsmn_ivector.sh
create mode 100644 src/featbin/append-ivector-to-feats.cc
create mode 100644 src/nnet/nnet-deep-fsmn.h
create mode 100644 src/nnet/nnet-fsmn.h
create mode 100644 src/nnet/nnet-uni-deep-fsmn.h
create mode 100644 src/nnet/nnet-uni-fsmn.h
diff --git a/egs/librispeech/s5/local/nnet/DFSMN_L.proto b/egs/librispeech/s5/local/nnet/DFSMN_L.proto
new file mode 100644
index 0000000..738b486
--- /dev/null
+++ b/egs/librispeech/s5/local/nnet/DFSMN_L.proto
@@ -0,0 +1,23 @@
+<NnetProto>
+<AffineTransform> <InputDim> 1020 <OutputDim> 2048 <Xavier> 1
+<ParametricRelu> <InputDim> 2048 <OutputDim> 2048
+<LinearTransform> <InputDim> 2048 <OutputDim> 512 <Xavier> 1
+<Fsmn> <InputDim> 512 <OutputDim> 512 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<AffineTransform> <InputDim> 512 <OutputDim> 2048 <Xavier> 1
+<ParametricRelu> <InputDim> 2048 <OutputDim> 2048
+<AffineTransform> <InputDim> 2048 <OutputDim> 2048 <Xavier> 1
+<ParametricRelu> <InputDim> 2048 <OutputDim> 2048
+<LinearTransform> <InputDim> 2048 <OutputDim> 512 <Xavier> 1
+<AffineTransform> <InputDim> 512 <OutputDim> 5777 <Xavier> 1
+<Softmax> <InputDim> 5777 <OutputDim> 5777
+</NnetProto>
+
diff --git a/egs/librispeech/s5/local/nnet/DFSMN_M.proto b/egs/librispeech/s5/local/nnet/DFSMN_M.proto
new file mode 100644
index 0000000..ea3ed45
--- /dev/null
+++ b/egs/librispeech/s5/local/nnet/DFSMN_M.proto
@@ -0,0 +1,19 @@
+<NnetProto>
+<AffineTransform> <InputDim> 1020 <OutputDim> 2048 <MaxNorm> 0.000000 <Xavier> 1
+<ParametricRelu> <InputDim> 2048 <OutputDim> 2048
+<LinearTransform> <InputDim> 2048 <OutputDim> 512 <ParamStddev> 0.010000 <Xavier> 1
+<Fsmn> <InputDim> 512 <OutputDim> 512 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 512 <OutputDim> 512 <HidSize> 2048 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<AffineTransform> <InputDim> 512 <OutputDim> 2048 <Xavier> 1
+<ParametricRelu> <InputDim> 2048 <OutputDim> 2048
+<AffineTransform> <InputDim> 2048 <OutputDim> 2048 <Xavier> 1
+<ParametricRelu> <InputDim> 2048 <OutputDim> 2048
+<LinearTransform> <InputDim> 2048 <OutputDim> 512 <Xavier> 1
+<AffineTransform> <InputDim> 512 <OutputDim> 5777 <Xavier> 1
+<Softmax> <InputDim> 5777 <OutputDim> 5777
+</NnetProto>
+
diff --git a/egs/librispeech/s5/local/nnet/DFSMN_S.proto b/egs/librispeech/s5/local/nnet/DFSMN_S.proto
new file mode 100644
index 0000000..cd2d026
--- /dev/null
+++ b/egs/librispeech/s5/local/nnet/DFSMN_S.proto
@@ -0,0 +1,19 @@
+<NnetProto>
+<AffineTransform> <InputDim> 1020 <OutputDim> 1024 <MaxNorm> 0.000000 <Xavier> 1
+<ParametricRelu> <InputDim> 1024 <OutputDim> 1024
+<LinearTransform> <InputDim> 1024 <OutputDim> 384 <ParamStddev> 0.010000 <Xavier> 1
+<Fsmn> <InputDim> 384 <OutputDim> 384 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 384 <OutputDim> 384 <HidSize> 1024 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 384 <OutputDim> 384 <HidSize> 1024 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 384 <OutputDim> 384 <HidSize> 1024 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 384 <OutputDim> 384 <HidSize> 1024 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<DeepFsmn> <InputDim> 384 <OutputDim> 384 <HidSize> 1024 <LOrder> 20 <ROrder> 20 <LStride> 2 <RStride> 2
+<AffineTransform> <InputDim> 384 <OutputDim> 1024 <Xavier> 1
+<ParametricRelu> <InputDim> 1024 <OutputDim> 1024
+<AffineTransform> <InputDim> 1024 <OutputDim> 1024 <Xavier> 1
+<ParametricRelu> <InputDim> 1024 <OutputDim> 1024
+<LinearTransform> <InputDim> 1024 <OutputDim> 384 <Xavier> 1
+<AffineTransform> <InputDim> 384 <OutputDim> 5777 <Xavier> 1
+<Softmax> <InputDim> 5777 <OutputDim> 5777
+</NnetProto>
+
diff --git a/egs/librispeech/s5/local/nnet/run_fsmn_ivector.sh b/egs/librispeech/s5/local/nnet/run_fsmn_ivector.sh
new file mode 100644
index 0000000..25416d9
--- /dev/null
+++ b/egs/librispeech/s5/local/nnet/run_fsmn_ivector.sh
@@ -0,0 +1,144 @@
+. ./path.sh
+. ./cmd.sh
+
+. utils/parse_options.sh || exit 1;
+
+set -e
+set -u
+set -o pipefail
+#########################
+
+dnn_model=$1
+
+stage=1
+
+##Make fbank features
+if [ $stage -le 1 ]; then
+ mkdir -p data_fbank
+
+ for x in train_960_cleaned test_other test_clean dev_other dev_clean; do
+ fbankdir=fbank/$x
+
+ cp -r data/$x data_fbank/$x
+ steps/make_fbank.sh --nj 30 --cmd "$train_cmd" --fbank-config conf/fbank.cfg \
+ data_fbank/$x exp/make_fbank/$x $fbankdir
+ steps/compute_cmvn_stats.sh data_fbank/$x exp/make_fbank/$x $fbankdir
+done
+fi
+###############
+if [ $stage -le 2 ]; then
+
+ steps/align_fmllr.sh --nj 30 --cmd "$train_cmd" \
+ data/train_960_cleaned data/lang exp/tri6b_cleaned exp/tri6b_cleaned_ali_train_960_cleaned
+ steps/align_fmllr.sh --nj 10 --cmd "$train_cmd" \
+ data/dev_clean data/lang exp/tri6b_cleaned exp/tri6b_cleaned_ali_dev_clean
+ steps/align_fmllr.sh --nj 10 --cmd "$train_cmd" \
+ data/dev_other data/lang exp/tri6b_cleaned exp/tri6b_cleaned_ali_dev_other
+fi
+#####CE-training
+lrate=0.00001
+dir=exp/tri7b_${dnn_model}
+data_fbk=data_fbank
+if [ $stage -le 3 ]; then
+ proto=local/nnet/${dnn_model}.proto
+
+ cat exp/nnet3_cleaned/ivectors_train_960_cleaned_hires/ivector_online.scp exp/nnet3_cleaned/ivectors_dev_clean_hires/ivector_online.scp \
+ exp/nnet3_cleaned/ivectors_dev_other_hires/ivector_online.scp > exp/nnet3_cleaned/ivectors_train_960_dev_hires/ivector_online.scp
+
+ $cuda_cmd $dir/_train_nnet.log \
+ steps/nnet/train_faster.sh --learn-rate $lrate --nnet-proto $proto \
+ --start_half_lr 5 --momentum 0.9 \
+ --train-tool "nnet-train-fsmn-streams" \
+ --feat-type plain --splice 1 \
+ --cmvn-opts "--norm-means=true --norm-vars=false" --delta_opts "--delta-order=2" \
+ --train-tool-opts "--minibatch-size=4096" \
+ --ivector scp:exp/nnet3_cleaned/ivectors_train_960_dev_hires/ivector_online.scp \
+ --ivector-append-tool "append-ivector-to-feats --online-ivector-period=10" \
+ $data_fbk/train_960_cleaned $data_fbk/dev_clean data/lang exp/tri6b_cleaned_ali_train_960_cleaned exp/tri6b_cleaned_ali_dev_clean $dir
+fi
+####Decode
+acwt=0.08
+if [ $stage -le 4 ]; then
+ gmm=exp/tri6b_cleaned
+ dataset="test_clean dev_clean test_other dev_other"
+ for set in $dataset
+ do
+ steps/nnet/decode.sh --nj 16 --cmd "$decode_cmd" \
+ scoring_opts "--min-lmwt 10 --max-lmwt 30" \
+ --config conf/decode.config --acwt $acwt \
+ $gmm/graph_tgsmall \
+ $data_fbk/$set $dir/decode_tgsmall_${set}
+
+ steps/lmrescore.sh --cmd "$decode_cmd" data/lang_test_{tgsmall,tgmed} \
+ $data_fbk/$set $dir/decode_{tgsmall,tgmed}_${set}
+
+ steps/lmrescore_const_arpa.sh \
+ scoring_opts "--min-lmwt 10 --max-lmwt 30" \
+ --cmd "$decode_cmd" data/lang_test_{tgsmall,tglarge} \
+ $data_fbk/$set $dir/decode_{tgsmall,tglarge}_${set}
+
+ steps/lmrescore_const_arpa.sh \
+ scoring_opts "--min-lmwt 10 --max-lmwt 30" \
+ --cmd "$decode_cmd" data/lang_test_{tgsmall,fglarge} \
+ $data_fbk/$set $dir/decode_{tgsmall,fglarge}_${set}
+ done
+
+ for set in $dataset;
+ do
+ for lm in fglarge tglarge tgmed tgsmall;
+ do
+ grep WER $dir/decode_${lm}_${set}*/wer* | ./utils/best_wer.sh
+ done
+ done
+fi
+
+nj=32
+if [ $stage -le 5 ]; then
+ steps/nnet/align.sh --nj $nj --cmd "$train_cmd" $data_fbk/train_960_cleaned data/lang $dir ${dir}_ali
+ steps/nnet/make_denlats.sh --nj $nj --cmd "$decode_cmd" --config conf/decode_dnn.config --acwt $acwt \
+ $data_fbk/train_960_cleaned data/lang $dir ${dir}_denlats
+fi
+
+####do smbr
+if [ $stage -le 5 ]; then
+ steps/nnet/train_mpe.sh --cmd "$cuda_cmd" --num-iters 2 --learn-rate 0.0000002 --acwt $acwt --do-smbr true \
+ $data_fbk/train_960_cleaned data/lang $dir ${dir}_ali ${dir}_denlats ${dir}_smbr
+fi
+
+###decode
+dir=${dir}_smbr
+acwt=0.03
+if [ $stage -le 6 ]; then
+ gmm=exp/tri6b_cleaned
+ dataset="test_clean dev_clean test_other dev_other"
+ for set in $dataset
+ do
+ steps/nnet/decode.sh --nj 16 --cmd "$decode_cmd" \
+ scoring_opts "--min-lmwt 10 --max-lmwt 30" \
+ --config conf/decode_dnn.config --acwt $acwt \
+ $gmm/graph_tgsmall \
+ $data_fbk/$set $dir/decode_tgsmall_${set}
+
+ steps/lmrescore.sh --cmd "$decode_cmd" data/lang_test_{tgsmall,tgmed} \
+ $data_fbk/$set $dir/decode_{tgsmall,tgmed}_${set}
+
+ steps/lmrescore_const_arpa.sh \
+ scoring_opts "--min-lmwt 10 --max-lmwt 30" \
+ --cmd "$decode_cmd" data/lang_test_{tgsmall,tglarge} \
+ $data_fbk/$set $dir/decode_{tgsmall,tglarge}_${set}
+
+ steps/lmrescore_const_arpa.sh \
+ scoring_opts "--min-lmwt 10 --max-lmwt 30" \
+ --cmd "$decode_cmd" data/lang_test_{tgsmall,fglarge} \
+ $data_fbk/$set $dir/decode_{tgsmall,fglarge}_${set}
+ done
+ for set in $dataset;
+ do
+ for lm in fglarge tglarge tgmed tgsmall;
+ do
+ grep WER $dir/decode_${lm}_${set}*/wer* | ./utils/best_wer.sh
+ done
+ done
+
+fi
+
diff --git a/src/cudamatrix/cu-device.cc b/src/cudamatrix/cu-device.cc
index c5114ed..1ac9d68 100644
--- a/src/cudamatrix/cu-device.cc
+++ b/src/cudamatrix/cu-device.cc
@@ -219,6 +219,23 @@ void CuDevice::SelectGpuId(std::string use_gpu) {
}
}
+void CuDevice::SetGpuId(int n) {
+ cudaError_t e = cudaSetDevice(n);
+ if (e == cudaSuccess) {
+ char name[128];
+ DeviceGetName(name,128,n);
+ int64 free, total;
+ std::string mem_stats;
+ mem_stats = GetFreeMemory(&free, &total);
+ KALDI_LOG << "cudaSetDevice(" << n << "): "
+ << name << "\t" << mem_stats;
+ FinalizeActiveGpu();
+ }
+ else{
+ KALDI_WARN << "Cannot select this device: return code " << e
+ << ", Error message: \"" << cudaGetErrorString(e) << "\"";
+ }
+}
void CuDevice::FinalizeActiveGpu() {
// The device at this point should have active GPU, so we can query its name
diff --git a/src/cudamatrix/cu-device.h b/src/cudamatrix/cu-device.h
index 9910535..c99b36b 100644
--- a/src/cudamatrix/cu-device.h
+++ b/src/cudamatrix/cu-device.h
@@ -98,6 +98,8 @@ class CuDevice {
return active_gpu_id_;
}
+ void SetGpuId(int n);
+
/// Returns true if either we have no GPU, or we have a GPU
/// and it supports double precision.
bool DoublePrecisionSupported();
diff --git a/src/cudamatrix/cu-kernels-ansi.h b/src/cudamatrix/cu-kernels-ansi.h
index 6b99a77..61c3d5f 100644
--- a/src/cudamatrix/cu-kernels-ansi.h
+++ b/src/cudamatrix/cu-kernels-ansi.h
@@ -6,6 +6,7 @@
// 2013 Xiaohui Zhang
// 2013-2015 Guoguo Chen
// 2016-2017 Shiyin Kang
+// 2018 Alibaba.Inc (Author: ShiLiang Zhang)
// See ../../COPYING for clarification regarding multiple authors
//
@@ -790,7 +791,38 @@ void cuda_uncompress_uint8(dim3 Gr, dim3 Bl, BaseFloat *dest,
int src_stride, float scale);
+//////////////////////////////////////////////////////
+//// FSMN kernel functions ///////
+////////////////////////////////////////////////////
+void cudaF_gen_memory(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, const float* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride);
+void cudaD_gen_memory(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, const double* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride);
+void cudaF_memory_err_back(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, const float* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride);
+void cudaD_memory_err_back(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, const double* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride);
+
+void cudaF_gen_uni_memory(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, float* flags,
+ MatrixDim d, int l_order, int l_stride);
+void cudaD_gen_uni_memory(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, float* flags,
+ MatrixDim d, int l_order, int l_stride);
+
+void cudaF_uni_memory_err_back(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, float* flags,
+ MatrixDim d, int l_order, int l_stride);
+void cudaD_uni_memory_err_back(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, float* flags,
+ MatrixDim d, int l_order, int l_stride);
+
+void cudaF_get_l_filter_err(dim3 Gr, dim3 Bl, float *mat_out, const float* diff, const float* mat_in, float* flags, MatrixDim d,
+ int l_order, int l_stride, float lr);
+void cudaD_get_l_filter_err(dim3 Gr, dim3 Bl, double *mat_out, const double* diff, const double* mat_in, float* flags, MatrixDim d,
+ int l_order, int l_stride, float lr);
+
+void cudaF_get_r_filter_err(dim3 Gr, dim3 Bl, float *mat_out, const float* diff, const float* mat_in, float* flags, MatrixDim d,
+ int r_order, int r_stride, float lr);
+void cudaD_get_r_filter_err(dim3 Gr, dim3 Bl, double *mat_out, const double* diff, const double* mat_in, float* flags, MatrixDim d,
+ int r_order, int r_stride, float lr);
} // extern "C"
#endif // HAVE_CUDA
diff --git a/src/cudamatrix/cu-kernels.cu b/src/cudamatrix/cu-kernels.cu
index 934a860..5591622 100644
--- a/src/cudamatrix/cu-kernels.cu
+++ b/src/cudamatrix/cu-kernels.cu
@@ -8,6 +8,8 @@
// 2013-2015 Guoguo Chen
// 2016-2017 Shiyin Kang
// 2017 Hossein Hadian, Daniel Galvez
+// 2018 Alibaba.Inc (Author: ShiLiang Zhang)
+
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -5445,3 +5447,336 @@ void cuda_uncompress_int16(dim3 Gr, dim3 Bl, BaseFloat *dest,
int src_stride, float scale) {
_cuda_uncompress<<<Gr, Bl>>>(dest, dim, src, src_stride, scale);
}
+
+//////////////////////////////////////////////////////
+//// FSMN kernel functions ///////
+////////////////////////////////////////////////////
+
+template<typename Real>
+__global__
+static void _gen_memory(Real* out, const Real* in, const Real *l_filter, const Real *r_filter, float *flags, MatrixDim d,
+ int l_order, int r_order, int l_stride, int r_stride)
+{
+ int32_cuda i = blockIdx.x * blockDim.x + threadIdx.x;
+ if(i < d.cols*d.rows)
+ {
+ int row = i/d.cols;
+ int col = i%d.cols;
+ Real value = 0.0;
+ int shift_index = 0;
+ int index = row*d.stride + col;
+ out[index] = in[index];
+ for (int order = 0; order < l_order; order++)
+ {
+ shift_index = row - order*l_stride;
+ if (shift_index >= 0 && flags[shift_index] == flags[row])
+ {
+ value += in[shift_index*d.stride + col] * l_filter[order*d.stride + col];
+ }
+ }
+ for (int order = 1; order <= r_order; order++)
+ {
+ shift_index = row + order*r_stride;
+ if (shift_index < d.rows && flags[shift_index] == flags[row])
+ {
+ value += in[shift_index*d.stride + col] * r_filter[(order - 1)*d.stride + col];
+ }
+ }
+ out[index] += value;
+ }
+}
+
+template<typename Real>
+__global__
+static void _memory_err_back(Real* out, const Real* in, const Real *l_filter, const Real *r_filter, float *flags, MatrixDim d,
+ int l_order, int r_order, int l_stride, int r_stride)
+{
+ int32_cuda i = blockIdx.x * blockDim.x + threadIdx.x;
+ if (i < d.cols*d.rows)
+ {
+ int row = i/d.cols;
+ int col = i%d.cols;
+ Real value = 0.0;
+ int shift_index = 0;
+ int index = row*d.stride + col;
+ out[index] = in[index];
+ for (int order = -r_order; order < 0; order++)
+ {
+ shift_index = row + order*r_stride;
+ if (shift_index >= 0 && flags[shift_index] == flags[row])
+ {
+ value += in[shift_index*d.stride + col] * r_filter[(-order - 1)*d.stride + col];
+ }
+ }
+ for (int order = 0; order < l_order; order++)
+ {
+ shift_index = row + order*l_stride;
+ if (shift_index < d.rows && flags[shift_index] == flags[row])
+ {
+ value += in[shift_index*d.stride + col] * l_filter[order*d.stride + col];
+ }
+ }
+ out[index] += value;
+ }
+}
+
+template<typename Real>
+__global__
+static void _gen_uni_memory(Real* out, const Real* in, const Real *l_filter, float *flags, MatrixDim d, int l_order, int l_stride)
+{
+ int32_cuda i = blockIdx.x * blockDim.x + threadIdx.x;
+ if (i < d.cols*d.rows)
+ {
+ int row = i / d.cols;
+ int col = i%d.cols;
+ Real value = 0.0;
+ int shift_index = 0;
+ int index = row*d.stride + col;
+ out[index] = in[index];
+ for (int order = 0; order < l_order; order++)
+ {
+ shift_index = row - order*l_stride;
+ if (shift_index >= 0 && flags[shift_index] == flags[row])
+ {
+ value += in[shift_index*d.stride + col] * l_filter[order*d.stride + col];
+ }
+ }
+ out[index] += value;
+ }
+}
+
+template<typename Real>
+__global__
+static void _uni_memory_err_back(Real* out, const Real* in, const Real *l_filter, float *flags, MatrixDim d, int l_order, int l_stride)
+{
+ int32_cuda i = blockIdx.x * blockDim.x + threadIdx.x;
+ if (i < d.cols*d.rows)
+ {
+ int row = i / d.cols;
+ int col = i%d.cols;
+ Real value = 0.0;
+ int shift_index = 0;
+ int index = row*d.stride + col;
+ out[index] = in[index];
+ for (int order = 0; order < l_order; order++)
+ {
+ shift_index = row + order*l_stride;
+ if (shift_index < d.rows && flags[shift_index] == flags[row])
+ {
+ value += in[shift_index*d.stride + col] * l_filter[order*d.stride + col];
+ }
+ }
+ out[index] += value;
+ }
+}
+
+template<typename Real>
+__global__
+static void _get_l_filter_err(Real* out, const Real* diff, const Real* in, float *flags, MatrixDim d, int l_order, int l_stride, float lr)
+{
+ int j = blockIdx.x;
+ int THREADS = blockDim.x;
+ if (j >= d.cols*l_order) return;
+
+ __shared__ Real aux[CU1DBLOCK];
+
+ int steps = (d.rows - 1)/THREADS + 1;
+ int order = j/d.cols;
+ int col = j%d.cols;
+ int shift = order * l_stride;
+ int index = order*d.stride + col;
+ //copy input to aux
+ int row = threadIdx.x - shift;
+
+ if (steps > 1)
+ {
+ if (row >= 0 && abs(flags[threadIdx.x] - flags[row])<1e-2)
+ {
+ aux[threadIdx.x] = in[col + row*d.stride] * diff[col + threadIdx.x*d.stride];
+ }
+ else
+ {
+ aux[threadIdx.x] = 0;
+ }
+ __syncthreads();
+ for (int i = 1; i<steps; ++i)
+ {
+ int index = threadIdx.x + i*THREADS;
+
+ if (index < d.rows && abs(flags[index] - flags[index - shift])<1e-2)
+ aux[threadIdx.x] += in[(index - shift)*d.stride + col] * diff[index*d.stride + col];
+ }
+ __syncthreads();
+ }
+ else
+ {
+ if (row >= 0 && threadIdx.x<d.rows && abs(flags[threadIdx.x] - flags[row])<1e-2)
+ {
+ aux[threadIdx.x] = in[col + row*d.stride] * diff[col + threadIdx.x*d.stride];
+ }
+ else
+ {
+ aux[threadIdx.x] = 0;
+ }
+ __syncthreads();
+ }
+
+ int nTotalThreads = THREADS;
+ __syncthreads();
+ while (nTotalThreads > 1) {
+ int halfPoint = ((1 + nTotalThreads) >> 1); // divide by two
+ // only the first half of the threads will be active.
+ if (threadIdx.x < halfPoint) {
+ // Get the shared value stored by another thread
+ if (threadIdx.x + halfPoint < nTotalThreads)
+ aux[threadIdx.x] += aux[threadIdx.x + halfPoint];
+ }
+ __syncthreads();
+ nTotalThreads = ((1 + nTotalThreads) >> 1); // divide by two.
+ }
+ Real sum = aux[0];
+ __syncthreads();
+ out[index] = out[index]-lr*sum;
+}
+
+template<typename Real>
+__global__
+static void _get_r_filter_err(Real* out, const Real* diff, const Real* in, float *flags, MatrixDim d, int r_order, int r_stride, float lr)
+{
+ int j = blockIdx.x;
+ int THREADS = blockDim.x;
+ if (j >= d.cols*r_order) return;
+
+ __shared__ Real aux[CU1DBLOCK];
+
+ int steps = (d.rows - 1) / THREADS + 1;
+ int order = j/d.cols;
+ int col = j%d.cols;
+ int shift = (order + 1) * r_stride;
+ int index = order*d.stride + col;
+ //copy input to aux
+ int row = threadIdx.x + shift;
+ if (steps > 1)
+ {
+ if (row <d.rows && abs(flags[threadIdx.x] - flags[row])<1e-2)
+ {
+ aux[threadIdx.x] = in[row*d.stride + col] * diff[threadIdx.x *d.stride + col];
+ }
+ else
+ {
+ aux[threadIdx.x] = 0;
+ }
+ __syncthreads();
+ for (int i = 1; i<steps; ++i)
+ {
+ int index = threadIdx.x + i*THREADS;
+ if (index + shift < d.rows && abs(flags[index] - flags[index + shift])<1e-2)
+ aux[threadIdx.x] += in[(index + shift)*d.stride + col] * diff[index*d.stride + col];
+ }
+ __syncthreads();
+ }
+ else
+ {
+ if (row <d.rows &&threadIdx.x<d.rows&& abs(flags[threadIdx.x] - flags[row])<1e-2)
+ {
+ aux[threadIdx.x] = in[row*d.stride + col] * diff[threadIdx.x *d.stride + col];
+ }
+ else
+ {
+ aux[threadIdx.x] = 0;
+ }
+ __syncthreads();
+ }
+ int nTotalThreads = THREADS;
+ __syncthreads();
+ while (nTotalThreads > 1) {
+ int halfPoint = ((1 + nTotalThreads) >> 1); // divide by two
+ // only the first half of the threads will be active.
+ if (threadIdx.x < halfPoint) {
+ // Get the shared value stored by another thread
+ if (threadIdx.x + halfPoint < nTotalThreads)
+ aux[threadIdx.x] += aux[threadIdx.x + halfPoint];
+ }
+ __syncthreads();
+ nTotalThreads = ((1 + nTotalThreads) >> 1); // divide by two.
+ }
+
+ Real sum = aux[0];
+ __syncthreads();
+ out[index] = out[index]-lr*sum;
+}
+
+
+
+void cudaF_gen_memory(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, const float* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ _gen_memory<<<Gr, Bl >>>(mat_out, mat_in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+void cudaD_gen_memory(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, const double* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ _gen_memory <<<Gr, Bl >> >(mat_out, mat_in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+void cudaF_memory_err_back(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, const float* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ _memory_err_back<<<Gr, Bl >>>(mat_out, mat_in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+void cudaD_memory_err_back(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, const double* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ _memory_err_back<<<Gr, Bl >>>(mat_out, mat_in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+void cudaF_gen_uni_memory(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ _gen_uni_memory << <Gr, Bl >> >(mat_out, mat_in, l_filter, flags, d, l_order, l_stride);
+}
+
+void cudaD_gen_uni_memory(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ _gen_uni_memory << <Gr, Bl >> >(mat_out, mat_in, l_filter, flags, d, l_order, l_stride);
+}
+
+void cudaF_uni_memory_err_back(dim3 Gr, dim3 Bl, float *mat_out, const float* mat_in, const float *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ _uni_memory_err_back << <Gr, Bl >> >(mat_out, mat_in, l_filter, flags, d, l_order, l_stride);
+}
+
+void cudaD_uni_memory_err_back(dim3 Gr, dim3 Bl, double *mat_out, const double* mat_in, const double *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ _uni_memory_err_back << <Gr, Bl >> >(mat_out, mat_in, l_filter, flags, d, l_order, l_stride);
+}
+
+void cudaF_get_l_filter_err(dim3 Gr, dim3 Bl, float *mat_out, const float *diff, const float* mat_in, float* flags, MatrixDim d,
+ int l_order, int l_stride, float lr)
+{
+ _get_l_filter_err <<<Gr, Bl >>>(mat_out, diff, mat_in, flags, d, l_order, l_stride, lr);
+}
+
+void cudaD_get_l_filter_err(dim3 Gr, dim3 Bl, double *mat_out, const double *diff, const double* mat_in, float* flags, MatrixDim d,
+ int l_order, int l_stride, float lr)
+{
+ _get_l_filter_err <<<Gr, Bl >>>(mat_out, diff, mat_in, flags, d, l_order, l_stride, lr);
+}
+
+void cudaF_get_r_filter_err(dim3 Gr, dim3 Bl, float *mat_out, const float *diff, const float* mat_in, float* flags, MatrixDim d,
+ int r_order, int r_stride, float lr)
+{
+ _get_r_filter_err <<<Gr, Bl >>>(mat_out, diff, mat_in, flags, d, r_order, r_stride, lr);
+}
+
+void cudaD_get_r_filter_err(dim3 Gr, dim3 Bl, double *mat_out, const double *diff, const double* mat_in, float* flags, MatrixDim d,
+ int r_order, int r_stride, float lr)
+{
+ _get_r_filter_err <<<Gr, Bl >>>(mat_out, diff, mat_in, flags, d, r_order, r_stride, lr);
+}
+
diff --git a/src/cudamatrix/cu-kernels.h b/src/cudamatrix/cu-kernels.h
index 8f719a8..e49d0ee 100644
--- a/src/cudamatrix/cu-kernels.h
+++ b/src/cudamatrix/cu-kernels.h
@@ -7,6 +7,7 @@
// 2013 Xiaohui Zhang
// 2013-2015 Guoguo Chen
// 2016-2017 Shiyin Kang
+// 2018 Alibaba.Inc (Author: ShiLiang Zhang)
// See ../../COPYING for clarification regarding multiple authors
//
@@ -1547,6 +1548,80 @@ inline void cuda_mat_uncompress(dim3 Gr, dim3 Bl, BaseFloat *dest,
cuda_uncompress_uint16(Gr, Bl, dest, dim, src, src_stride, scale);
}
+//////////////////////////////////////////////////////
+//// FSMN kernel functions ///////
+////////////////////////////////////////////////////
+inline void cuda_gen_memory(dim3 Gr, dim3 Bl, float *data, const float* in, const float *l_filter, const float* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ cudaF_gen_memory(Gr, Bl, data, in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+inline void cuda_gen_memory(dim3 Gr, dim3 Bl, double *data, const double* in, const double *l_filter, const double* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ cudaD_gen_memory(Gr, Bl, data, in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+inline void cuda_memory_err_back(dim3 Gr, dim3 Bl, float *data, const float* in, const float *l_filter, const float* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ cudaF_memory_err_back(Gr, Bl, data, in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+inline void cuda_memory_err_back(dim3 Gr, dim3 Bl, double *data, const double* in, const double *l_filter, const double* r_filter,
+ float* flags, MatrixDim d, int l_order, int r_order, int l_stride, int r_stride)
+{
+ cudaD_memory_err_back(Gr, Bl, data, in, l_filter, r_filter, flags, d, l_order, r_order, l_stride, r_stride);
+}
+
+inline void cuda_gen_uni_memory(dim3 Gr, dim3 Bl, float *data, const float* in, const float *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ cudaF_gen_uni_memory(Gr, Bl, data, in, l_filter, flags, d, l_order, l_stride);
+}
+
+inline void cuda_gen_uni_memory(dim3 Gr, dim3 Bl, double *data, const double* in, const double *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ cudaD_gen_uni_memory(Gr, Bl, data, in, l_filter, flags, d, l_order, l_stride);
+}
+
+inline void cuda_uni_memory_err_back(dim3 Gr, dim3 Bl, float *data, const float* in, const float *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ cudaF_uni_memory_err_back(Gr, Bl, data, in, l_filter, flags, d, l_order, l_stride);
+}
+
+inline void cuda_uni_memory_err_back(dim3 Gr, dim3 Bl, double *data, const double* in, const double *l_filter, float* flags, MatrixDim d,
+ int l_order, int l_stride)
+{
+ cudaD_uni_memory_err_back(Gr, Bl, data, in, l_filter, flags, d, l_order, l_stride);
+}
+
+inline void cuda_get_l_filter_err(dim3 Gr, dim3 Bl, float *data, const float *diff, const float* in, float* flags, MatrixDim d,
+ int l_order, int l_stride, float lr)
+{
+ cudaF_get_l_filter_err(Gr, Bl, data, diff, in, flags, d, l_order, l_stride, lr);
+}
+
+inline void cuda_get_l_filter_err(dim3 Gr, dim3 Bl, double *data, const double *diff, const double* in, float* flags, MatrixDim d,
+ int l_order, int l_stride, float lr)
+{
+ cudaD_get_l_filter_err(Gr, Bl, data, diff, in, flags, d, l_order, l_stride, lr);
+}
+
+inline void cuda_get_r_filter_err(dim3 Gr, dim3 Bl, float *data, const float *diff, const float* in, float* flags, MatrixDim d,
+ int r_order, int r_stride, float lr)
+{
+ cudaF_get_r_filter_err(Gr, Bl, data, diff, in, flags, d, r_order, r_stride, lr);
+}
+
+inline void cuda_get_r_filter_err(dim3 Gr, dim3 Bl, double *data, const double *diff, const double* in, float* flags, MatrixDim d,
+ int r_order, int r_stride, float lr)
+{
+ cudaD_get_r_filter_err(Gr, Bl, data, diff, in, flags, d, r_order, r_stride, lr);
+}
} // namespace kaldi
diff --git a/src/cudamatrix/cu-matrix.cc b/src/cudamatrix/cu-matrix.cc
index beccd9d..423b2e2 100644
--- a/src/cudamatrix/cu-matrix.cc
+++ b/src/cudamatrix/cu-matrix.cc
@@ -8,6 +8,8 @@
// 2013-2015 Guoguo Chen
// 2016-2017 Shiyin Kang
// 2017 Hossein Hadian
+// 2018 Alibaba.Inc (Author: ShiLiang Zhang)
+
// See ../../COPYING for clarification regarding multiple authors
//
@@ -3422,6 +3424,208 @@ void CuMatrixBase<Real>::EqualElementMask(const CuMatrixBase<Real> &mat, CuMatri
}
}
+//////////////////////////////////////////////////////
+//// FSMN kernel functions ///////
+////////////////////////////////////////////////////
+template<typename Real>
+void CuMatrixBase<Real>::GenMemory(const CuMatrixBase<Real>& in, const CuMatrixBase<Real>& l_filter, const CuMatrixBase<Real>& r_filter,
+ CuVectorBase<BaseFloat> &flags, int l_order, int r_order, int l_stride, int r_stride) {
+ // Check the inputs:
+ KALDI_ASSERT(in.NumRows() == NumRows() && in.NumCols() == NumCols());
+
+#if HAVE_CUDA == 1
+ if (CuDevice::Instantiate().Enabled()) {
+ CuTimer tim;
+
+ KALDI_ASSERT(num_cols_ == in.NumCols());
+ KALDI_ASSERT(num_rows_ == in.NumRows());
+
+ dim3 dimBlock(CU1DBLOCK);
+
+ dim3 dimGrid(n_blocks(in.NumCols()*in.NumRows(), CU1DBLOCK));
+
+ cuda_gen_memory(dimGrid, dimBlock, this->data_, in.data_, l_filter.data_, r_filter.data_, flags.Data(),
+ in.Dim(), l_order, r_order, l_stride, r_stride);
+ CU_SAFE_CALL(cudaGetLastError());
+
+ CuDevice::Instantiate().AccuProfile(__func__, tim);
+ }else
+#endif
+ {
+ Real *data = this->data_;
+ const Real *src_data = in.data_;
+ const Real *LF = l_filter.data_;
+ const Real *RF = r_filter.data_;
+ int shift_index = 0;
+ int rows = NumRows();
+ int cols = NumCols();
+ int stride = in.Stride();
+ for (int32 r = 0; r < rows; r++) {
+ for (int32 c = 0; c < cols; c++) {
+ int index = r*stride + c;
+ data[index] = src_data[index];
+ for (int order = 0; order < l_order; order++)
+ {
+ shift_index = r - order*l_stride;
+ if (shift_index >= 0)
+ {
+ data[index] += src_data[shift_index*stride + c] * LF[order*stride + c];
+ }
+ }
+ for (int order = 1; order < r_order + 1; order++)
+ {
+ shift_index = r + order*r_stride;
+ if (shift_index < rows)
+ {
+ data[index] += src_data[shift_index*stride + c] * RF[(order - 1)*stride + c];
+ }
+ }
+ }
+ }
+ }
+}
+
+template<typename Real>
+void CuMatrixBase<Real>::MemoryErrBack(const CuMatrixBase<Real>& in, const CuMatrixBase<Real>& l_filter, const CuMatrixBase<Real>& r_filter,
+ CuVectorBase<BaseFloat> &flags, int l_order, int r_order, int l_stride, int r_stride) {
+#if HAVE_CUDA == 1
+ if (CuDevice::Instantiate().Enabled()) {
+ CuTimer tim;
+
+ KALDI_ASSERT(num_cols_ == in.NumCols());
+ KALDI_ASSERT(num_rows_ == in.NumRows());
+
+ dim3 dimBlock(CU1DBLOCK);
+ dim3 dimGrid(n_blocks(in.NumCols()*in.NumRows(), CU1DBLOCK));
+
+ cuda_memory_err_back(dimGrid, dimBlock, this->data_, in.data_, l_filter.data_, r_filter.data_, flags.Data(),
+ in.Dim(), l_order, r_order, l_stride, r_stride);
+
+ CU_SAFE_CALL(cudaGetLastError());
+
+ CuDevice::Instantiate().AccuProfile(__func__, tim);
+ }else
+#endif
+ {
+ //add CPU function
+ }
+}
+
+template<typename Real>
+void CuMatrixBase<Real>::GenUniMemory(const CuMatrixBase<Real>& in, const CuMatrixBase<Real>& l_filter, CuVectorBase<BaseFloat> &flags,
+ int l_order, int l_stride) {
+
+ //Check the inputs:
+ KALDI_ASSERT(in.NumRows() == NumRows() && in.NumCols() == NumCols());
+
+#if HAVE_CUDA == 1
+ if (CuDevice::Instantiate().Enabled()) {
+ CuTimer tim;
+
+ KALDI_ASSERT(num_cols_ == in.NumCols());
+ KALDI_ASSERT(num_rows_ == in.NumRows());
+
+ dim3 dimBlock(CU1DBLOCK);
+
+ dim3 dimGrid(n_blocks(in.NumCols()*in.NumRows(), CU1DBLOCK));
+
+ cuda_gen_uni_memory(dimGrid, dimBlock, this->data_, in.data_, l_filter.data_, flags.Data(), in.Dim(), l_order, l_stride);
+ CU_SAFE_CALL(cudaGetLastError());
+
+ CuDevice::Instantiate().AccuProfile(__func__, tim);
+ }
+ else
+#endif
+ {
+ Real *data = this->data_;
+ const Real *src_data = in.data_;
+ const Real *LF = l_filter.data_;
+ int shift_index = 0;
+ int rows = NumRows();
+ int cols = NumCols();
+ int stride = in.Stride();
+ for (int32 r = 0; r < rows; r++) {
+ for (int32 c = 0; c < cols; c++) {
+ int index = r*stride + c;
+ data[index] = src_data[index];
+ for (int order = 0; order < l_order; order++)
+ {
+ shift_index = r - order*l_stride;
+ if (shift_index >= 0)
+ {
+ data[index] += src_data[shift_index*stride + c] * LF[order*stride + c];
+ }
+ }
+ }
+ }
+ }
+}
+
+template<typename Real>
+void CuMatrixBase<Real>::UniMemoryErrBack(const CuMatrixBase<Real>& in, const CuMatrixBase<Real>& l_filter, CuVectorBase<BaseFloat> &flags,
+ int l_order, int l_stride) {
+#if HAVE_CUDA == 1
+ if (CuDevice::Instantiate().Enabled()) {
+ CuTimer tim;
+
+ KALDI_ASSERT(num_cols_ == in.NumCols());
+ KALDI_ASSERT(num_rows_ == in.NumRows());
+
+ dim3 dimBlock(CU1DBLOCK);
+ dim3 dimGrid(n_blocks(in.NumCols()*in.NumRows(), CU1DBLOCK));
+
+ cuda_uni_memory_err_back(dimGrid, dimBlock, this->data_, in.data_, l_filter.data_, flags.Data(), in.Dim(), l_order, l_stride);
+
+ CU_SAFE_CALL(cudaGetLastError());
+
+ CuDevice::Instantiate().AccuProfile(__func__, tim);
+ }
+#endif
+}
+
+
+template<typename Real>
+void CuMatrixBase<Real>::GetLfilterErr(const CuMatrixBase<Real>& diff, const CuMatrixBase<Real>& in, CuVectorBase<BaseFloat> &flags,
+ int l_order, int l_stride, float lr) {
+#if HAVE_CUDA == 1
+ if (CuDevice::Instantiate().Enabled()) {
+ CuTimer tim;
+
+ KALDI_ASSERT(num_cols_ == diff.NumCols());
+ KALDI_ASSERT(num_rows_ == l_order);
+
+ dim3 dimBlock(CU1DBLOCK);
+ dim3 dimGrid(diff.NumCols()*l_order);
+
+ cuda_get_l_filter_err(dimGrid, dimBlock, this->data_, diff.data_, in.data_, flags.Data(), diff.Dim(), l_order, l_stride, lr);
+ CU_SAFE_CALL(cudaGetLastError());
+
+ CuDevice::Instantiate().AccuProfile(__func__, tim);
+ }
+#endif