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pR3000A.c
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pR3000A.c
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/* Pcsx - Pc Psx Emulator
* Copyright (C) 1999-2003 Pcsx Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <gccore.h>
#include <malloc.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <sys/types.h>
#include "../psxcommon.h"
#include "ppc.h"
#include "reguse.h"
#include "pR3000A.h"
#include "../r3000a.h"
#include "../psxhle.h"
#include "../Gamecube/DEBUG.h"
#include "../Gamecube/MEM2.h"
#include <ogc/lwp_heap.h>
//#define printFunctionLog() { \
// sprintf(txtbuffer, "recFunction %s\n", __FUNCTION__); \
// printFunctionName(); \
//}
#define printFunctionLog()
/* variable declarations */
static u32 psxRecLUT[0x010000];
//static char recMem[RECMEM_SIZE] __attribute__((aligned(32))); /* the recompiled blocks will be here */
static char *recMem = RECMEM2_LO; /* the recompiled blocks will be here */
static char recRAM[0x200000] __attribute__((aligned(32))); /* and the ptr to the blocks here */
static char recROM[0x080000] __attribute__((aligned(32))); /* and here */
static u32 pc; /* recompiler pc */
static u32 pcold; /* recompiler oldpc */
static int count; /* recompiler intruction count */
static int branch; /* set for branch */
static u32 target; /* branch target */
static u32 resp;
static u32 cop2readypc = 0;
static u32 idlecyclecount = 0;
static iRegisters iRegs[34];
// added xjsxjs197 start
static iRegisters iRegsTmp[34];
// added xjsxjs197 end
int psxCP2time[64] = {
2 , 16, 1 , 1 , 1 , 1 , 8 , 1 , // 00
1 , 1 , 1 , 1 , 6 , 1 , 1 , 1 , // 08
8 , 8 , 8 , 19, 13, 1 , 44, 1 , // 10
1 , 1 , 1 , 17, 11, 1 , 14, 1 , // 18
30, 1 , 1 , 1 , 1 , 1 , 1 , 1 , // 20
5 , 8 , 17, 1 , 1 , 5 , 6 , 1 , // 28
23, 1 , 1 , 1 , 1 , 1 , 1 , 1 , // 30
1 , 1 , 1 , 1 , 1 , 6 , 5 , 39 // 38
};
static void (*recBSC[64])();
static void (*recSPC[64])();
static void (*recREG[32])();
static void (*recCP0[32])();
static void (*recCP2[64])();
static void (*recCP2BSC[32])();
static HWRegister HWRegisters[NUM_HW_REGISTERS];
// added xjsxjs197 start
static HWRegister HWRegistersTmp[NUM_HW_REGISTERS];
// added xjsxjs197 end
static int HWRegUseCount;
static int DstCPUReg;
static int UniqueRegAlloc;
static int GetFreeHWReg();
static void InvalidateCPURegs();
static void DisposeHWReg(int index);
static void FlushHWReg(int index);
static void FlushAllHWReg();
static void MapPsxReg32(int reg);
static void FlushPsxReg32(int hwreg);
static int UpdateHWRegUsage(int hwreg, int usage);
static int GetHWReg32(int reg);
static int PutHWReg32(int reg);
static int GetSpecialIndexFromHWRegs(int which);
static int GetHWRegFromCPUReg(int cpureg);
static int MapRegSpecial(int which);
static void FlushRegSpecial(int hwreg);
static int GetHWRegSpecial(int which);
static int PutHWRegSpecial(int which);
__inline static void recRecompile();
static void recRecompileInit();
static void recError();
// used in debug.c for dynarec free space printing
u32 dyna_used = 0;
u32 dyna_total = RECMEM_SIZE;
/* --- Generic register mapping --- */
static int GetFreeHWReg()
{
int index;
if (DstCPUReg != -1) {
index = GetHWRegFromCPUReg(DstCPUReg);
DstCPUReg = -1;
} else {
int i;
// LRU algorith with a twist ;)
for (i=0; i<NUM_HW_REGISTERS-1; i++) {
if (!(HWRegisters[i].usage & HWUSAGE_RESERVED)) {
break;
}
}
int least = HWRegisters[i].lastUsed; index = i;
for (; i<NUM_HW_REGISTERS; i++) {
if (!(HWRegisters[i].usage & HWUSAGE_RESERVED)) {
if (HWRegisters[i].usage == HWUSAGE_NONE && HWRegisters[i].code >= 13) {
index = i;
break;
}
else if (HWRegisters[i].lastUsed < least) {
least = HWRegisters[i].lastUsed;
index = i;
}
}
}
// Cycle the registers
if (HWRegisters[index].usage == HWUSAGE_NONE) {
for (; i<NUM_HW_REGISTERS; i++) {
if (!(HWRegisters[i].usage & HWUSAGE_RESERVED)) {
if (HWRegisters[i].usage == HWUSAGE_NONE &&
HWRegisters[i].code >= 13 &&
HWRegisters[i].lastUsed < least) {
least = HWRegisters[i].lastUsed;
index = i;
break;
}
}
}
}
}
/* if (HWRegisters[index].code < 13 && HWRegisters[index].code > 3) {
SysPrintf("Allocating volatile register %i\n", HWRegisters[index].code);
}
if (HWRegisters[index].usage != HWUSAGE_NONE) {
SysPrintf("RegUse too big. Flushing %i\n", HWRegisters[index].code);
}*/
#ifdef DISP_DEBUG
if (HWRegisters[index].usage & (HWUSAGE_RESERVED | HWUSAGE_HARDWIRED)) {
if (HWRegisters[index].usage & HWUSAGE_RESERVED) {
//SysPrintf("Error! Trying to map a new register to a reserved register (r%i)",
// HWRegisters[index].code);
PRINT_LOG1("Error! Trying to map a new register to a reserved register (r%i)",
HWRegisters[index].code);
}
if (HWRegisters[index].usage & HWUSAGE_HARDWIRED) {
//SysPrintf("Error! Trying to map a new register to a hardwired register (r%i)",
// HWRegisters[index].code);
PRINT_LOG1("Error! Trying to map a new register to a hardwired register (r%i)",
HWRegisters[index].code);
}
}
#endif
if (HWRegisters[index].lastUsed != 0) {
UniqueRegAlloc = 0;
}
// Make sure the register is really flushed!
FlushHWReg(index);
HWRegisters[index].usage = HWUSAGE_NONE;
HWRegisters[index].flush = NULL;
return index;
}
static void FlushHWReg(int index)
{
if (index < 0) return;
if (HWRegisters[index].usage == HWUSAGE_NONE) return;
if (HWRegisters[index].flush) {
HWRegisters[index].usage |= HWUSAGE_RESERVED;
HWRegisters[index].flush(index);
HWRegisters[index].flush = NULL;
}
if (HWRegisters[index].usage & HWUSAGE_HARDWIRED) {
HWRegisters[index].usage &= ~(HWUSAGE_READ | HWUSAGE_WRITE);
} else {
HWRegisters[index].usage = HWUSAGE_NONE;
}
}
// get rid of a mapped register without flushing the contents to the memory
static void DisposeHWReg(int index)
{
if (index < 0) return;
if (HWRegisters[index].usage == HWUSAGE_NONE) return;
HWRegisters[index].usage &= ~(HWUSAGE_READ | HWUSAGE_WRITE);
#ifdef DISP_DEBUG
if (HWRegisters[index].usage == HWUSAGE_NONE) {
//SysPrintf("Error! not correctly disposing register (r%i)", HWRegisters[index].code);
PRINT_LOG1("Error! not correctly disposing register (r%i)", HWRegisters[index].code);
}
#endif
FlushHWReg(index);
}
// operated on cpu registers
__inline static void FlushCPURegRange(int start, int end)
{
int i;
if (end <= 0) end = 31;
if (start <= 0) start = 0;
for (i=0; i<NUM_HW_REGISTERS; i++) {
if (HWRegisters[i].code >= start && HWRegisters[i].code <= end)
if (HWRegisters[i].flush)
FlushHWReg(i);
}
for (i=0; i<NUM_HW_REGISTERS; i++) {
if (HWRegisters[i].code >= start && HWRegisters[i].code <= end)
FlushHWReg(i);
}
}
static void FlushAllHWReg()
{
FlushCPURegRange(0,31);
}
static void InvalidateCPURegs()
{
FlushCPURegRange(0,12);
}
/* --- Mapping utility functions --- */
static void MoveHWRegToCPUReg(int cpureg, int hwreg)
{
int dstreg;
if (HWRegisters[hwreg].code == cpureg)
return;
dstreg = GetHWRegFromCPUReg(cpureg);
HWRegisters[dstreg].usage &= ~(HWUSAGE_HARDWIRED | HWUSAGE_ARG);
if (HWRegisters[hwreg].usage & (HWUSAGE_READ | HWUSAGE_WRITE)) {
FlushHWReg(dstreg);
MR(HWRegisters[dstreg].code, HWRegisters[hwreg].code);
} else {
if (HWRegisters[dstreg].usage & (HWUSAGE_READ | HWUSAGE_WRITE)) {
MR(HWRegisters[hwreg].code, HWRegisters[dstreg].code);
}
else if (HWRegisters[dstreg].usage != HWUSAGE_NONE) {
FlushHWReg(dstreg);
}
}
HWRegisters[dstreg].code = HWRegisters[hwreg].code;
HWRegisters[hwreg].code = cpureg;
}
static int UpdateHWRegUsage(int hwreg, int usage)
{
HWRegisters[hwreg].lastUsed = ++HWRegUseCount;
if (usage & HWUSAGE_WRITE) {
HWRegisters[hwreg].usage &= ~HWUSAGE_CONST;
}
if (!(usage & HWUSAGE_INITED)) {
HWRegisters[hwreg].usage &= ~HWUSAGE_INITED;
}
HWRegisters[hwreg].usage |= usage;
return HWRegisters[hwreg].code;
}
static int GetHWRegFromCPUReg(int cpureg)
{
int i;
for (i=0; i<NUM_HW_REGISTERS; i++) {
if (HWRegisters[i].code == cpureg) {
return i;
}
}
//SysPrintf("Error! Register location failure (r%i)", cpureg);
PRINT_LOG1("Error! Register location failure (r%i)", cpureg);
return 0;
}
// this function operates on cpu registers
void SetDstCPUReg(int cpureg)
{
DstCPUReg = cpureg;
}
static void ReserveArgs(int args)
{
int i;
for (i=0; i<args; i++) {
int index = GetHWRegFromCPUReg(3+i);
HWRegisters[index].usage |= HWUSAGE_RESERVED | HWUSAGE_HARDWIRED | HWUSAGE_ARG;
}
}
static void ReleaseArgs()
{
int i;
for (i=0; i<NUM_HW_REGISTERS; i++) {
if (HWRegisters[i].usage & HWUSAGE_ARG) {
//HWRegisters[i].usage = HWUSAGE_NONE;
//HWRegisters[i].flush = NULL;
HWRegisters[i].usage &= ~(HWUSAGE_RESERVED | HWUSAGE_HARDWIRED | HWUSAGE_ARG);
FlushHWReg(i);
}
}
}
/* --- Psx register mapping --- */
static void MapPsxReg32(int reg)
{
int hwreg = GetFreeHWReg();
HWRegisters[hwreg].flush = FlushPsxReg32;
HWRegisters[hwreg].private = reg;
#ifdef DISP_DEBUG
if (iRegs[reg].reg != -1) {
//SysPrintf("error: double mapped psx register");
PRINT_LOG("error: double mapped psx register");
}
#endif
iRegs[reg].reg = hwreg;
iRegs[reg].state |= ST_MAPPED;
}
static void FlushPsxReg32(int hwreg)
{
int reg = HWRegisters[hwreg].private;
#ifdef DISP_DEBUG
if (iRegs[reg].reg == -1) {
//SysPrintf("error: flushing unmapped psx register");
PRINT_LOG("error: flushing unmapped psx register");
}
#endif
if (HWRegisters[hwreg].usage & HWUSAGE_WRITE) {
if (branch) {
/*int reguse = nextPsxRegUse(pc-8, reg);
if (reguse == REGUSE_NONE || (reguse & REGUSE_READ))*/ {
STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.GPR.r[reg]), GetHWRegSpecial(PSXREGS));
}
} else {
int reguse = nextPsxRegUse(pc-4, reg);
if (reguse == REGUSE_NONE || (reguse & REGUSE_READ)) {
STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.GPR.r[reg]), GetHWRegSpecial(PSXREGS));
}
}
}
iRegs[reg].reg = -1;
iRegs[reg].state = ST_UNK;
}
static int GetHWReg32(int reg)
{
int usage = HWUSAGE_PSXREG | HWUSAGE_READ;
if (reg == 0) {
return GetHWRegSpecial(REG_RZERO);
}
if (!IsMapped(reg)) {
usage |= HWUSAGE_INITED;
MapPsxReg32(reg);
HWRegisters[iRegs[reg].reg].usage |= HWUSAGE_RESERVED;
if (IsConst(reg)) {
LIW(HWRegisters[iRegs[reg].reg].code, iRegs[reg].k);
usage |= HWUSAGE_WRITE | HWUSAGE_CONST;
//iRegs[reg].state &= ~ST_CONST;
}
else {
LWZ(HWRegisters[iRegs[reg].reg].code, OFFSET(&psxRegs, &psxRegs.GPR.r[reg]), GetHWRegSpecial(PSXREGS));
}
HWRegisters[iRegs[reg].reg].usage &= ~HWUSAGE_RESERVED;
}
else if (DstCPUReg != -1) {
int dst = DstCPUReg;
DstCPUReg = -1;
if (HWRegisters[iRegs[reg].reg].code < 13) {
MoveHWRegToCPUReg(dst, iRegs[reg].reg);
} else {
MR(DstCPUReg, HWRegisters[iRegs[reg].reg].code);
}
}
DstCPUReg = -1;
return UpdateHWRegUsage(iRegs[reg].reg, usage);
}
static int PutHWReg32(int reg)
{
int usage = HWUSAGE_PSXREG | HWUSAGE_WRITE;
if (reg == 0) {
return PutHWRegSpecial(REG_WZERO);
}
if (DstCPUReg != -1 && IsMapped(reg)) {
if (HWRegisters[iRegs[reg].reg].code != DstCPUReg) {
int tmp = DstCPUReg;
DstCPUReg = -1;
DisposeHWReg(iRegs[reg].reg);
DstCPUReg = tmp;
}
}
if (!IsMapped(reg)) {
usage |= HWUSAGE_INITED;
MapPsxReg32(reg);
}
DstCPUReg = -1;
iRegs[reg].state &= ~ST_CONST;
return UpdateHWRegUsage(iRegs[reg].reg, usage);
}
/* --- Special register mapping --- */
static int GetSpecialIndexFromHWRegs(int which)
{
int i;
for (i=0; i<NUM_HW_REGISTERS; i++) {
if (HWRegisters[i].usage & HWUSAGE_SPECIAL) {
if (HWRegisters[i].private == which) {
return i;
}
}
}
return -1;
}
static int MapRegSpecial(int which)
{
int hwreg = GetFreeHWReg();
HWRegisters[hwreg].flush = FlushRegSpecial;
HWRegisters[hwreg].private = which;
return hwreg;
}
static void FlushRegSpecial(int hwreg)
{
int which = HWRegisters[hwreg].private;
if (!(HWRegisters[hwreg].usage & HWUSAGE_WRITE))
return;
switch (which) {
case CYCLECOUNT:
STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.cycle), GetHWRegSpecial(PSXREGS));
break;
case PSXPC:
STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.pc), GetHWRegSpecial(PSXREGS));
break;
case TARGET:
STW(HWRegisters[hwreg].code, 0, GetHWRegSpecial(TARGETPTR));
break;
}
}
static int GetHWRegSpecial(int which)
{
int index = GetSpecialIndexFromHWRegs(which);
int usage = HWUSAGE_READ | HWUSAGE_SPECIAL;
if (index == -1) {
usage |= HWUSAGE_INITED;
index = MapRegSpecial(which);
HWRegisters[index].usage |= HWUSAGE_RESERVED;
switch (which) {
case PSXREGS:
case PSXMEM:
//SysPrintf("error! shouldn't be here!\n");
PRINT_LOG1("GetHWRegSpecial which:%d : error! shouldn't be here!", which);
//HWRegisters[index].flush = NULL;
//LIW(HWRegisters[index].code, (u32)&psxRegs);
break;
case TARGETPTR:
HWRegisters[index].flush = NULL;
LIW(HWRegisters[index].code, (u32)&target);
break;
case REG_RZERO:
HWRegisters[index].flush = NULL;
LIW(HWRegisters[index].code, 0);
break;
case RETVAL:
MoveHWRegToCPUReg(3, index);
/*reg = GetHWRegFromCPUReg(3);
HWRegisters[reg].code = HWRegisters[index].code;
HWRegisters[index].code = 3;*/
HWRegisters[index].flush = NULL;
usage |= HWUSAGE_RESERVED;
break;
case CYCLECOUNT:
LWZ(HWRegisters[index].code, OFFSET(&psxRegs, &psxRegs.cycle), GetHWRegSpecial(PSXREGS));
break;
case PSXPC:
LWZ(HWRegisters[index].code, OFFSET(&psxRegs, &psxRegs.pc), GetHWRegSpecial(PSXREGS));
break;
case TARGET:
LWZ(HWRegisters[index].code, 0, GetHWRegSpecial(TARGETPTR));
break;
default:
//SysPrintf("Error: Unknown special register in GetHWRegSpecial()\n");
PRINT_LOG1("GetHWRegSpecial which:%d : Error: Unknown special register in GetHWRegSpecial()", which);
break;
}
HWRegisters[index].usage &= ~HWUSAGE_RESERVED;
}
else if (DstCPUReg != -1) {
int dst = DstCPUReg;
DstCPUReg = -1;
MoveHWRegToCPUReg(dst, index);
}
return UpdateHWRegUsage(index, usage);
}
static int PutHWRegSpecial(int which)
{
int index = GetSpecialIndexFromHWRegs(which);
int usage = HWUSAGE_WRITE | HWUSAGE_SPECIAL;
if (DstCPUReg != -1 && index != -1) {
if (HWRegisters[index].code != DstCPUReg) {
int tmp = DstCPUReg;
DstCPUReg = -1;
DisposeHWReg(index);
DstCPUReg = tmp;
}
}
switch (which) {
case PSXREGS:
case TARGETPTR:
//SysPrintf("Error: Read-only special register in PutHWRegSpecial()\n");
PRINT_LOG1("PutHWRegSpecial which:%d : Error: Read-only special register in PutHWRegSpecial()", which);
case REG_WZERO:
if (index >= 0) {
if (HWRegisters[index].usage & HWUSAGE_WRITE)
break;
}
index = MapRegSpecial(which);
HWRegisters[index].flush = NULL;
break;
default:
if (index == -1) {
usage |= HWUSAGE_INITED;
index = MapRegSpecial(which);
HWRegisters[index].usage |= HWUSAGE_RESERVED;
switch (which) {
case ARG1:
case ARG2:
case ARG3:
MoveHWRegToCPUReg(3+(which-ARG1), index);
/*reg = GetHWRegFromCPUReg(3+(which-ARG1));
if (HWRegisters[reg].usage != HWUSAGE_NONE) {
HWRegisters[reg].usage &= ~(HWUSAGE_HARDWIRED | HWUSAGE_ARG);
if (HWRegisters[reg].flush != NULL && HWRegisters[reg].usage & (HWUSAGE_WRITE | HWUSAGE_READ)) {
MR(HWRegisters[index].code, HWRegisters[reg].code);
} else {
FlushHWReg(reg);
}
}
HWRegisters[reg].code = HWRegisters[index].code;
if (!(HWRegisters[index].code >= 3 && HWRegisters[index].code <=31))
SysPrintf("Error! Register allocation");
HWRegisters[index].code = 3+(which-ARG1);*/
HWRegisters[index].flush = NULL;
usage |= HWUSAGE_RESERVED | HWUSAGE_HARDWIRED | HWUSAGE_ARG;
break;
}
}
HWRegisters[index].usage &= ~HWUSAGE_RESERVED;
break;
}
DstCPUReg = -1;
return UpdateHWRegUsage(index, usage);
}
static void MapConst(int reg, u32 _const) {
if (reg == 0)
return;
if (IsConst(reg) && iRegs[reg].k == _const)
return;
DisposeHWReg(iRegs[reg].reg);
iRegs[reg].k = _const;
iRegs[reg].state = ST_CONST;
}
static void MapCopy(int dst, int src)
{
// do it the lazy way for now
MR(PutHWReg32(dst), GetHWReg32(src));
}
static void iFlushReg(u32 nextpc, int reg) {
if (!IsMapped(reg) && IsConst(reg)) {
GetHWReg32(reg);
}
if (IsMapped(reg)) {
if (nextpc) {
int use = nextPsxRegUse(nextpc, reg);
if ((use & REGUSE_RW) == REGUSE_WRITE) {
DisposeHWReg(iRegs[reg].reg);
} else {
FlushHWReg(iRegs[reg].reg);
}
} else {
FlushHWReg(iRegs[reg].reg);
}
}
}
static void iFlushRegs(u32 nextpc) {
int i;
for (i=1; i<NUM_REGISTERS; i++) {
iFlushReg(nextpc, i);
}
}
static void Return()
{
iFlushRegs(0);
FlushAllHWReg();
if (((u32)returnPC & 0x1fffffc) == (u32)returnPC) {
BA((u32)returnPC);
}
else {
LIW(0, (u32)returnPC);
MTLR(0);
BLR();
}
}
static void iRet() {
/* store cycle */
// upd xjsxjs197 start
//count = idlecyclecount + (pc - pcold)/4;
count = idlecyclecount + ((pc - pcold) >> 2);
// upd xjsxjs197 end
ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
Return();
}
static int iLoadTest() {
u32 tmp;
// check for load delay
tmp = psxRegs.code >> 26;
switch (tmp) {
case 0x10: // COP0
switch (_Rs_) {
case 0x00: // MFC0
case 0x02: // CFC0
return 1;
}
break;
case 0x12: // COP2
switch (_Funct_) {
case 0x00:
switch (_Rs_) {
case 0x00: // MFC2
case 0x02: // CFC2
return 1;
}
break;
}
break;
case 0x32: // LWC2
return 1;
default:
if (tmp >= 0x20 && tmp <= 0x26) { // LB/LH/LWL/LW/LBU/LHU/LWR
return 1;
}
break;
}
return 0;
}
/* set a pending branch */
static void SetBranch() {
int treg;
branch = 1;
psxRegs.code = PSXMu32(pc);
pc+=4;
if (iLoadTest() == 1) {
iFlushRegs(0);
LIW(0, psxRegs.code);
STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS));
/* store cycle */
// upd xjsxjs197 start
//count = idlecyclecount + (pc - pcold)/4;
count = idlecyclecount + ((pc - pcold) >> 2);
// upd xjsxjs197 end
ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
treg = GetHWRegSpecial(TARGET);
MR(PutHWRegSpecial(ARG2), treg);
DisposeHWReg(GetHWRegFromCPUReg(treg));
LIW(PutHWRegSpecial(ARG1), _Rt_);
LIW(GetHWRegSpecial(PSXPC), pc);
FlushAllHWReg();
CALLFunc((u32)psxDelayTest);
Return();
return;
}
recBSC[psxRegs.code>>26]();
iFlushRegs(0);
treg = GetHWRegSpecial(TARGET);
MR(PutHWRegSpecial(PSXPC), GetHWRegSpecial(TARGET)); // FIXME: this line should not be needed
DisposeHWReg(GetHWRegFromCPUReg(treg));
FlushAllHWReg();
// upd xjsxjs197 start
//count = idlecyclecount + (pc - pcold)/4;
count = idlecyclecount + ((pc - pcold) >> 2);
// upd xjsxjs197 end
ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
FlushAllHWReg();
CALLFunc((u32)psxBranchTest);
// TODO: don't return if target is compiled
Return();
}
static void iJump(u32 branchPC) {
u32 *b1, *b2;
branch = 1;
psxRegs.code = PSXMu32(pc);
pc+=4;
if (iLoadTest() == 1) {
iFlushRegs(0);
LIW(0, psxRegs.code);
STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS));
/* store cycle */
// upd xjsxjs197 start
//count = idlecyclecount + (pc - pcold)/4;
count = idlecyclecount + ((pc - pcold) >> 2);
// upd xjsxjs197 end
ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
LIW(PutHWRegSpecial(ARG2), branchPC);
LIW(PutHWRegSpecial(ARG1), _Rt_);
LIW(GetHWRegSpecial(PSXPC), pc);
FlushAllHWReg();
CALLFunc((u32)psxDelayTest);
Return();
return;
}
recBSC[psxRegs.code>>26]();
iFlushRegs(branchPC);
LIW(PutHWRegSpecial(PSXPC), branchPC);
FlushAllHWReg();
// upd xjsxjs197 start
//count = idlecyclecount + (pc - pcold)/4;
count = idlecyclecount + ((pc - pcold) >> 2);
// upd xjsxjs197 end
//if (/*psxRegs.code == 0 &&*/ count == 2 && branchPC == pcold) {
// LIW(PutHWRegSpecial(CYCLECOUNT), 0);
//} else {
ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
//}
FlushAllHWReg();
CALLFunc((u32)psxBranchTest);
if (!Config.HLE && Config.PsxOut &&
((branchPC & 0x1fffff) == 0xa0 ||
(branchPC & 0x1fffff) == 0xb0 ||
(branchPC & 0x1fffff) == 0xc0))
CALLFunc((u32)psxJumpTest);
// always return for now...
//Return();
// maybe just happened an interruption, check so
LIW(0, branchPC);
CMPLW(GetHWRegSpecial(PSXPC), 0);
BNE_L(b1);
LIW(3, PC_REC(branchPC));
LWZ(3, 0, 3);
CMPLWI(3, 0);
BNE_L(b2);
B_DST(b1);
Return();
// next bit is already compiled - jump right to it
B_DST(b2);
MTCTR(3);
BCTR();
}
static void iBranch(u32 branchPC, int savectx) {
HWRegister HWRegistersS[NUM_HW_REGISTERS];
iRegisters iRegsS[NUM_REGISTERS];
int HWRegUseCountS = 0;
u32 respold=0;
u32 *b1, *b2;
if (savectx) {
respold = resp;
memcpy(iRegsS, iRegs, sizeof(iRegs));
memcpy(HWRegistersS, HWRegisters, sizeof(HWRegisters));
HWRegUseCountS = HWRegUseCount;
}
branch = 1;
psxRegs.code = PSXMu32(pc);
// the delay test is only made when the branch is taken
// savectx == 0 will mean that :)
if (savectx == 0 && iLoadTest() == 1) {
iFlushRegs(0);
LIW(0, psxRegs.code);
STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS));
/* store cycle */
// upd xjsxjs197 start
//count = idlecyclecount + ((pc+4) - pcold)/4;
count = idlecyclecount + ((pc + 4) - pcold >> 2);
// upd xjsxjs197 end
ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
LIW(PutHWRegSpecial(ARG2), branchPC);
LIW(PutHWRegSpecial(ARG1), _Rt_);
LIW(GetHWRegSpecial(PSXPC), pc);
FlushAllHWReg();
CALLFunc((u32)psxDelayTest);
Return();
return;
}
pc+= 4;
recBSC[psxRegs.code>>26]();
iFlushRegs(branchPC);
LIW(PutHWRegSpecial(PSXPC), branchPC);
FlushAllHWReg();
/* store cycle */
// upd xjsxjs197 start
//count = idlecyclecount + (pc - pcold)/4;
count = idlecyclecount + ((pc - pcold) >> 2);
// upd xjsxjs197 end
//if (/*psxRegs.code == 0 &&*/ count == 2 && branchPC == pcold) {
// LIW(PutHWRegSpecial(CYCLECOUNT), 0);
//} else {
ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
//}
FlushAllHWReg();
CALLFunc((u32)psxBranchTest);
// always return for now...
//Return();
LIW(0, branchPC);
CMPLW(GetHWRegSpecial(PSXPC), 0);
BNE_L(b1);
LIW(3, PC_REC(branchPC));
LWZ(3, 0, 3);
CMPLWI(3, 0);
BNE_L(b2);
B_DST(b1);
Return();
B_DST(b2);
MTCTR(3);
BCTR();
// maybe just happened an interruption, check so
/* CMP32ItoM((u32)&psxRegs.pc, branchPC);
j8Ptr[1] = JE8(0);
RET();
x86SetJ8(j8Ptr[1]);
MOV32MtoR(EAX, PC_REC(branchPC));
TEST32RtoR(EAX, EAX);
j8Ptr[2] = JNE8(0);
RET();
x86SetJ8(j8Ptr[2]);
JMP32R(EAX);*/
pc-= 4;
if (savectx) {
resp = respold;
memcpy(iRegs, iRegsS, sizeof(iRegs));
memcpy(HWRegisters, HWRegistersS, sizeof(HWRegisters));
HWRegUseCount = HWRegUseCountS;
}
}
void iDumpRegs() {
int i, j;
printf("%08x %08x\n", (unsigned int)psxRegs.pc, (unsigned int)psxRegs.cycle);
for (i=0; i<4; i++) {
for (j=0; j<8; j++)
printf("%08x ", (unsigned int)(psxRegs.GPR.r[j*i]));
printf("\n");
}
}
void iDumpBlock(char *ptr) {
/* FILE *f;
u32 i;
SysPrintf("dump1 %x:%x, %x\n", psxRegs.pc, pc, psxCurrentCycle);
for (i = psxRegs.pc; i < pc; i+=4)
SysPrintf("%s\n", disR3000AF(PSXMu32(i), i));
fflush(stdout);
f = fopen("dump1", "w");
fwrite(ptr, 1, (u32)x86Ptr - (u32)ptr, f);
fclose(f);
system("ndisasmw -u dump1");
fflush(stdout);*/
}
#define REC_FUNC(f) \
void psx##f(); \
static void rec##f() { \
iFlushRegs(0); \
LIW(PutHWRegSpecial(ARG1), (u32)psxRegs.code); \
STW(GetHWRegSpecial(ARG1), OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS)); \
LIW(PutHWRegSpecial(PSXPC), (u32)pc); \
FlushAllHWReg(); \
CALLFunc((u32)psx##f); \
/* branch = 2; */\
}
#define REC_SYS(f) \