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boards: shield: introduce st_b_lcd40_dsi1_mb1166
Add support for STMicroelectronics B-LCD40-DSI1 board supporting MIPI DSI display. Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
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‎boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.defconfig

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# Copyright (c) 2023 bytes at work AG
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# SPDX-License-Identifier: Apache-2.0
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if SHIELD_ST_B_LCD40_DSI1_MB1166
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config DISPLAY
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default y
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config GPIO
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default y
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endif # SHIELD_ST_B_LCD40_DSI1_MB1166

‎boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.shield

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# Copyright (c) 2023 bytes at work AG
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# SPDX-License-Identifier: Apache-2.0
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config SHIELD_ST_B_LCD40_DSI1_MB1166
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def_bool $(shields_list_contains,st_b_lcd40_dsi1_mb1166)

‎boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.conf

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# Copyright (c) 2023 bytes at work AG
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_MEMC=y
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CONFIG_STM32_LTDC_RGB888=y
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CONFIG_HEAP_MEM_POOL_SIZE=65536
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# Initialize after LTDC
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CONFIG_DISPLAY_OTM8009A_INIT_PRIORITY=86

‎boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.overlay

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/*
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* Copyright (c) 2023 bytes at work AG
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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chosen {
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zephyr,display = &ltdc;
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};
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};
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&ltdc {
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status = "okay";
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ext-sdram = <&sdram2>;
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/* orisetech, otm8009a */
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width = <800>;
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height = <480>;
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hsync-pol = <STM32_LTDC_HSPOL_ACTIVE_LOW>;
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vsync-pol = <STM32_LTDC_VSPOL_ACTIVE_LOW>;
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de-pol = <STM32_LTDC_DEPOL_ACTIVE_LOW>;
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pclk-pol = <STM32_LTDC_PCPOL_ACTIVE_LOW>;
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hsync-duration = <2>;
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vsync-duration = <1>;
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hbp-duration = <34>;
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vbp-duration = <15>;
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hfp-duration = <34>;
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vfp-duration = <16>;
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def-back-color-red = <0>;
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def-back-color-green = <0>;
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def-back-color-blue = <0>;
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};
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/* ltdc uses pll3_r as pixel clock */
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&pll3 {
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status = "okay";
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clocks = <&clk_hse>;
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div-m = <5>;
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mul-n = <132>;
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div-p = <2>;
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div-q = <2>;
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div-r = <24>; /* 27.5 MHz */
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};
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&mipi_dsi {
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status = "okay";
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/* DSI HOST dedicated PLL
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* F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv
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* PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk
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* = 25 MHz / 5 * 2 * 100 / 2 / (1<<0) / 8 = 62.5 MHz
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*/
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pll-ndiv = <100>;
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pll-idf = <5>;
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pll-odf = <0>;
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vs-active-high;
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hs-active-high;
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de-active-high;
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};
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&otm8009a {
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data-lanes = <2>;
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pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
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rotation = <90>;
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};

‎boards/shields/st_b_lcd40_dsi1_mb1166/doc/connectors.jpg

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‎boards/shields/st_b_lcd40_dsi1_mb1166/doc/image.jpg

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‎boards/shields/st_b_lcd40_dsi1_mb1166/doc/index.rst

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.. _st_b_lcd40_dsi1_mb1166_shield:
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ST B-LCD40-DSI1
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###############
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Overview
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********
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The B-LCD40-DSI1 shield provides a 4-inch WVGA TFT LCD with MIPI DSI interface
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and capacitive touch screen.
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.. figure:: image.jpg
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:alt: B-LCD40-DSI1 MB1166 Image
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:align: center
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B-LCD40-DSI1 MB1166 Image
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.. figure:: connectors.jpg
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:alt: B-LCD40-DSI1 MB1166 Connector
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:align: center
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B-LCD40-DSI1 MB1166 Connector
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+------+--------------+------------+-------+--------------+-----------------+
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| CN1 | Description | Interface | CN1 | Description | Interface |
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| odd | | | even | | |
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+======+==============+============+=======+==============+=================+
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| 1 | GND | - | 2 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 3 | DSI_CK_P | DSI | 4 | TOUCH_INT | Interrupt out |
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+------+--------------+------------+-------+--------------+-----------------+
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| 5 | DSI_CK_N | DSI | 6 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 7 | GND | - | 8 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 9 | DSI_D0_P | DSI | 10 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 11 | DSI_D0_N | DSI | 12 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 13 | GND | - | 14 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 15 | DSI_D1_P | DSI | 16 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 17 | DSI_D1_N | DSI | 18 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 19 | GND | - | 20 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 21 | BLVDD(+5V) | - | 22 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 23 | BLVDD(+5V) | - | 24 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 25 | - | - | 26 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 27 | BLGND | - | 28 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 29 | BLGND | - | 30 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 31 | - | - | 32 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 33 | - | - | 34 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 35 | - | - | 36 | VDD | - |
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| | | | | (2.8V-3.3V) | |
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+------+--------------+------------+-------+--------------+-----------------+
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| 37 | - | - | 38 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 39 | - | - | 40 | I2C_SDA | I2C |
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+------+--------------+------------+-------+--------------+-----------------+
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| 41 | - | - | 42 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 43 | - | - | 44 | I2C_SCL | I2C |
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+------+--------------+------------+-------+--------------+-----------------+
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| 45 | - | - | 46 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 47 | - | - | 48 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 49 | DSI_TE | DSI | 50 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 51 | - | - | 52 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 53 | BL_CTRL | GPIO | 54 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 55 | - | - | 56 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 57 | RESET | GPIO | 58 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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| 59 | - | - | 60 | - | - |
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+------+--------------+------------+-------+--------------+-----------------+
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Requirements
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************
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Your board needs to have a ``mipi_dsi`` device tree label to work with this shield.
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Usage
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*****
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The shield can be used in any application by setting ``SHIELD`` to
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``st_b_lcd40_dsi1_mb1166`` and adding the necessary device tree properties.
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Set ``-DSHIELD="st_b_lcd40_dsi1_mb1166"`` when you invoke ``west build``. For example:
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.. zephyr-app-commands::
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:zephyr-app: samples/drivers/display
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:board: stm32h747i_disco_m7
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:shield: st_b_lcd40_dsi1_mb1166
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:goals: build
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References
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**********
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- `Product page <https://www.st.com/en/evaluation-tools/b-lcd40-dsi1.html>`_
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- `Databrief <https://www.st.com/resource/en/data_brief/b-lcd40-dsi1.pdf>`_
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- `User manual <https://www.st.com/resource/en/user_manual/um2104--4inch-wvga-tft-lcd-board-with-mipi-dsi-interface-and-capacitive-touch-screen-stmicroelectronics.pdf>`_

‎boards/shields/st_b_lcd40_dsi1_mb1166/st_b_lcd40_dsi1_mb1166.overlay

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/*
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* Copyright (c) 2023 bytes at work AG
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&mipi_dsi {
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otm8009a: otm8009a@0 {
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status = "okay";
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compatible = "orisetech,otm8009a";
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reg = <0x0>;
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height = <800>;
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width = <480>;
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reset-gpios = <&dsi_lcd_qsh_030 57 GPIO_ACTIVE_HIGH>;
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bl-gpios = <&dsi_lcd_qsh_030 53 GPIO_ACTIVE_HIGH>;
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};
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};

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