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boards: shield: introduce st_b_lcd40_dsi1_mb1166
Add support for STMicroelectronics B-LCD40-DSI1 board supporting MIPI DSI display. Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
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# Copyright (c) 2023 bytes at work AG | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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if SHIELD_ST_B_LCD40_DSI1_MB1166 | ||
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config DISPLAY | ||
default y | ||
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config GPIO | ||
default y | ||
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endif # SHIELD_ST_B_LCD40_DSI1_MB1166 |
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# Copyright (c) 2023 bytes at work AG | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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config SHIELD_ST_B_LCD40_DSI1_MB1166 | ||
def_bool $(shields_list_contains,st_b_lcd40_dsi1_mb1166) |
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boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.conf
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# Copyright (c) 2023 bytes at work AG | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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CONFIG_MEMC=y | ||
CONFIG_STM32_LTDC_RGB888=y | ||
CONFIG_HEAP_MEM_POOL_SIZE=65536 | ||
# Initialize after LTDC | ||
CONFIG_DISPLAY_OTM8009A_INIT_PRIORITY=86 |
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boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.overlay
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/* | ||
* Copyright (c) 2023 bytes at work AG | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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/ { | ||
chosen { | ||
zephyr,display = <dc; | ||
}; | ||
}; | ||
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<dc { | ||
status = "okay"; | ||
ext-sdram = <&sdram2>; | ||
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/* orisetech, otm8009a */ | ||
width = <800>; | ||
height = <480>; | ||
hsync-pol = <STM32_LTDC_HSPOL_ACTIVE_LOW>; | ||
vsync-pol = <STM32_LTDC_VSPOL_ACTIVE_LOW>; | ||
de-pol = <STM32_LTDC_DEPOL_ACTIVE_LOW>; | ||
pclk-pol = <STM32_LTDC_PCPOL_ACTIVE_LOW>; | ||
hsync-duration = <2>; | ||
vsync-duration = <1>; | ||
hbp-duration = <34>; | ||
vbp-duration = <15>; | ||
hfp-duration = <34>; | ||
vfp-duration = <16>; | ||
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def-back-color-red = <0>; | ||
def-back-color-green = <0>; | ||
def-back-color-blue = <0>; | ||
}; | ||
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/* ltdc uses pll3_r as pixel clock */ | ||
&pll3 { | ||
status = "okay"; | ||
clocks = <&clk_hse>; | ||
div-m = <5>; | ||
mul-n = <132>; | ||
div-p = <2>; | ||
div-q = <2>; | ||
div-r = <24>; /* 27.5 MHz */ | ||
}; | ||
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&mipi_dsi { | ||
status = "okay"; | ||
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/* DSI HOST dedicated PLL | ||
* F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv | ||
* PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk | ||
* = 25 MHz / 5 * 2 * 100 / 2 / (1<<0) / 8 = 62.5 MHz | ||
*/ | ||
pll-ndiv = <100>; | ||
pll-idf = <5>; | ||
pll-odf = <0>; | ||
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vs-active-high; | ||
hs-active-high; | ||
de-active-high; | ||
}; | ||
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&otm8009a { | ||
data-lanes = <2>; | ||
pixel-format = <MIPI_DSI_PIXFMT_RGB888>; | ||
rotation = <90>; | ||
}; |
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.. _st_b_lcd40_dsi1_mb1166_shield: | ||
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ST B-LCD40-DSI1 | ||
############### | ||
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Overview | ||
******** | ||
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The B-LCD40-DSI1 shield provides a 4-inch WVGA TFT LCD with MIPI DSI interface | ||
and capacitive touch screen. | ||
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.. figure:: image.jpg | ||
:alt: B-LCD40-DSI1 MB1166 Image | ||
:align: center | ||
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B-LCD40-DSI1 MB1166 Image | ||
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.. figure:: connectors.jpg | ||
:alt: B-LCD40-DSI1 MB1166 Connector | ||
:align: center | ||
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B-LCD40-DSI1 MB1166 Connector | ||
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+------+--------------+------------+-------+--------------+-----------------+ | ||
| CN1 | Description | Interface | CN1 | Description | Interface | | ||
| odd | | | even | | | | ||
+======+==============+============+=======+==============+=================+ | ||
| 1 | GND | - | 2 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 3 | DSI_CK_P | DSI | 4 | TOUCH_INT | Interrupt out | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 5 | DSI_CK_N | DSI | 6 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 7 | GND | - | 8 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 9 | DSI_D0_P | DSI | 10 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 11 | DSI_D0_N | DSI | 12 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 13 | GND | - | 14 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 15 | DSI_D1_P | DSI | 16 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 17 | DSI_D1_N | DSI | 18 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 19 | GND | - | 20 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 21 | BLVDD(+5V) | - | 22 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 23 | BLVDD(+5V) | - | 24 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 25 | - | - | 26 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 27 | BLGND | - | 28 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 29 | BLGND | - | 30 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 31 | - | - | 32 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 33 | - | - | 34 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 35 | - | - | 36 | VDD | - | | ||
| | | | | (2.8V-3.3V) | | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 37 | - | - | 38 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 39 | - | - | 40 | I2C_SDA | I2C | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 41 | - | - | 42 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 43 | - | - | 44 | I2C_SCL | I2C | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 45 | - | - | 46 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 47 | - | - | 48 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 49 | DSI_TE | DSI | 50 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 51 | - | - | 52 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 53 | BL_CTRL | GPIO | 54 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 55 | - | - | 56 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 57 | RESET | GPIO | 58 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
| 59 | - | - | 60 | - | - | | ||
+------+--------------+------------+-------+--------------+-----------------+ | ||
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Requirements | ||
************ | ||
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Your board needs to have a ``mipi_dsi`` device tree label to work with this shield. | ||
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Usage | ||
***** | ||
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The shield can be used in any application by setting ``SHIELD`` to | ||
``st_b_lcd40_dsi1_mb1166`` and adding the necessary device tree properties. | ||
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Set ``-DSHIELD="st_b_lcd40_dsi1_mb1166"`` when you invoke ``west build``. For example: | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/drivers/display | ||
:board: stm32h747i_disco_m7 | ||
:shield: st_b_lcd40_dsi1_mb1166 | ||
:goals: build | ||
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References | ||
********** | ||
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- `Product page <https://www.st.com/en/evaluation-tools/b-lcd40-dsi1.html>`_ | ||
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- `Databrief <https://www.st.com/resource/en/data_brief/b-lcd40-dsi1.pdf>`_ | ||
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- `User manual <https://www.st.com/resource/en/user_manual/um2104--4inch-wvga-tft-lcd-board-with-mipi-dsi-interface-and-capacitive-touch-screen-stmicroelectronics.pdf>`_ |
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boards/shields/st_b_lcd40_dsi1_mb1166/st_b_lcd40_dsi1_mb1166.overlay
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/* | ||
* Copyright (c) 2023 bytes at work AG | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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&mipi_dsi { | ||
otm8009a: otm8009a@0 { | ||
status = "okay"; | ||
compatible = "orisetech,otm8009a"; | ||
reg = <0x0>; | ||
height = <800>; | ||
width = <480>; | ||
reset-gpios = <&dsi_lcd_qsh_030 57 GPIO_ACTIVE_HIGH>; | ||
bl-gpios = <&dsi_lcd_qsh_030 53 GPIO_ACTIVE_HIGH>; | ||
}; | ||
}; |