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armv8-m: userspace: some parts in userspace enter sequence need to be atomic #22720

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ioannisg opened this issue Feb 11, 2020 · 0 comments · Fixed by #22691
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armv8-m: userspace: some parts in userspace enter sequence need to be atomic #22720

ioannisg opened this issue Feb 11, 2020 · 0 comments · Fixed by #22691
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area: ARM ARM (32-bit) Architecture area: Memory Protection area: Userspace Userspace bug The issue is a bug, or the PR is fixing a bug priority: medium Medium impact/importance bug

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@ioannisg
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Describe the bug
A part of the execution sequence in z_arm_userspace_enter needs to prevent Zephyr from swapping -out and -in the current thread. This is required when building with support for Built-in stack overflow protection (ARMv8-M only).

When entering user space, a thread performs the following sequential actions:

a. Clears PSPLIM register
b. Sets PSP (back) to the user thread stack
c. Modifies mode variable to indicate nPRIV mode
d. Sets CONTROL.nPRIV to 1.

A context-switch occurring before (c) will set PSPLIM to the bottom of the PRIV stack. If this occurs after (b) the result will be stack-overflow.

Expected behavior
We expect z_arm_userspace_enter to perform without kernel crashing.

Impact
Under certain (corner-case) conditions z_arm_userspace_enter might crash.

Additional context
We need to prevent the kernel from switching -out and -in the thread, while it performs the "critical" execution sequence listed above.

@ioannisg ioannisg added bug The issue is a bug, or the PR is fixing a bug area: ARM ARM (32-bit) Architecture area: Memory Protection area: Userspace Userspace labels Feb 11, 2020
@ioannisg ioannisg self-assigned this Feb 11, 2020
@jhedberg jhedberg added the priority: medium Medium impact/importance bug label Feb 11, 2020
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Labels
area: ARM ARM (32-bit) Architecture area: Memory Protection area: Userspace Userspace bug The issue is a bug, or the PR is fixing a bug priority: medium Medium impact/importance bug
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