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riscv: context switch issue in interrupt handler #72123
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Hi @zxtxin! We appreciate you submitting your first issue for our open-source project. 🌟 Even though I'm a bot, I can assure you that the whole community is genuinely grateful for your time and effort. 🤖💙 |
any update? |
Hi @zxtxin, thanks for submitting this bug report.
I'm not sure I follow. If Could you perhaps provide a more detailed description using the template, and e.g. include the trace of the interrupt handling routine that you're describing? That would be much appreciated. Thanks |
Hi @fkokosinski ,
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Yes, with
This doesn't seem to be the case, though. In the case of reschedule, stepping with gdb from
I still can't reproduce a scenario you're describing. Could you please provide more detailed instructions using the standard bug report template that can be found here? Thanks |
Hi @fkokosinski , |
Here is a way to reproduce this issue:
3.build the image with the following command: |
In the current implementation of riscv _isr_wrapper(), z_riscv_switch will probably be called, then the context will switch to a normal thread, while the mret will not be excecuted to return from the interrupt mode. For MCUs with CLIC interrupt controller such as gd32vf103, mintstatus.mil will not be restored if mret is not executed. As a result, no other interrupts with the same level will be executed.
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