Sigma Delta ADC #2617
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Sigma Delta ADC #2617
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…piler into SigmaDeltaADC
lmbollen
requested changes
Dec 15, 2023
| ) | ||
| => SNat n0 | ||
| -- ^ ADC width | ||
| -> SNat (n0 + n1) |
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How do I determine this number?
| -- ^ Accumulator width | ||
| -- Has to be larger or equal to the ADC width, | ||
| -- the OSR is equal to 2^(AccumulatorWidth - ADCwidth) | ||
| -> SNat n2 |
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How do I determine this number?
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| -- 1. feedback to the RC network: | ||
| -- The R and C of the low pass network need to be chosen such that: | ||
| -- RC inbetween 200 and 1000 x clk, where clk is the frequency of | ||
| -- output |
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I think this too, should be at module level or function level.
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Is there an optimal value? if so, how do we choose it?
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Added a Sigma Delta ADC to Clash Cores
Still TODO: