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Add WAsmSIMD rdsum accumulating microkernels
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PiperOrigin-RevId: 627686402
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alankelly authored and xnnpack-bot committed May 6, 2024
1 parent 7189ed9 commit aecf0c5
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Showing 17 changed files with 3,397 additions and 6 deletions.
57 changes: 57 additions & 0 deletions bench/f32-rdsum.cc
Expand Up @@ -82,6 +82,63 @@ BENCHMARK_CAPTURE(f32_rsum_discontig, scalar_c4,
#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64


#if XNN_ARCH_X86 || XNN_ARCH_X86_64
BENCHMARK_CAPTURE(f32_rsum_discontig, avx_c16,
xnn_f32_rdsum_ukernel_7p7x__avx_c16,
xnn_init_f32_scale_avx_params,
benchmark::utils::CheckAVX)
->Apply(BenchmarkBatch)
->UseRealTime();
#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64


#if XNN_ARCH_X86 || XNN_ARCH_X86_64
BENCHMARK_CAPTURE(f32_rsum_discontig, avx_c32,
xnn_f32_rdsum_ukernel_7p7x__avx_c32,
xnn_init_f32_scale_avx_params,
benchmark::utils::CheckAVX)
->Apply(BenchmarkBatch)
->UseRealTime();
#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64


#if XNN_ARCH_X86 || XNN_ARCH_X86_64
BENCHMARK_CAPTURE(f32_rsum_discontig, avx_c64,
xnn_f32_rdsum_ukernel_7p7x__avx_c64,
xnn_init_f32_scale_avx_params,
benchmark::utils::CheckAVX)
->Apply(BenchmarkBatch)
->UseRealTime();
#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64


#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
BENCHMARK_CAPTURE(f32_rsum_discontig, wasmsimd_c16,
xnn_f32_rdsum_ukernel_7p7x__wasmsimd_c16,
xnn_init_f32_scale_scalar_params)
->Apply(BenchmarkBatch)
->UseRealTime();
#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD


#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
BENCHMARK_CAPTURE(f32_rsum_discontig, wasmsimd_c32,
xnn_f32_rdsum_ukernel_7p7x__wasmsimd_c32,
xnn_init_f32_scale_scalar_params)
->Apply(BenchmarkBatch)
->UseRealTime();
#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD


#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
BENCHMARK_CAPTURE(f32_rsum_discontig, wasmsimd_c64,
xnn_f32_rdsum_ukernel_7p7x__wasmsimd_c64,
xnn_init_f32_scale_scalar_params)
->Apply(BenchmarkBatch)
->UseRealTime();
#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD


#ifndef XNNPACK_BENCHMARK_NO_MAIN
BENCHMARK_MAIN();
#endif
6 changes: 6 additions & 0 deletions cmake/microkernels.cmake
Expand Up @@ -132,6 +132,9 @@ SET(ALL_AVX_MICROKERNEL_SRCS
src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u16.c
src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u24.c
src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u32.c
src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c16.c
src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c32.c
src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c64.c
src/f32-rminmax/gen/f32-rmax-avx-u8.c
src/f32-rminmax/gen/f32-rmax-avx-u16-acc2.c
src/f32-rminmax/gen/f32-rmax-avx-u24-acc3.c
Expand Down Expand Up @@ -8897,6 +8900,9 @@ SET(ALL_WASMSIMD_MICROKERNEL_SRCS
src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-wasmsimd-rr2-p5-u20-acc2.c
src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-wasmsimd-rr2-p5-u20-acc5.c
src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-wasmsimd-rr2-p5-u20.c
src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c16.c
src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c32.c
src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c64.c
src/f32-rminmax/gen/f32-rmax-wasmsimd-minmax-u4.c
src/f32-rminmax/gen/f32-rmax-wasmsimd-minmax-u8-acc2.c
src/f32-rminmax/gen/f32-rmax-wasmsimd-minmax-u12-acc3.c
Expand Down
6 changes: 6 additions & 0 deletions microkernels.bzl
Expand Up @@ -129,6 +129,9 @@ ALL_AVX_MICROKERNEL_SRCS = [
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u16.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u24.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u32.c",
"src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c16.c",
"src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c32.c",
"src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c64.c",
"src/f32-rminmax/gen/f32-rmax-avx-u8.c",
"src/f32-rminmax/gen/f32-rmax-avx-u16-acc2.c",
"src/f32-rminmax/gen/f32-rmax-avx-u24-acc3.c",
Expand Down Expand Up @@ -8932,6 +8935,9 @@ ALL_WASMSIMD_MICROKERNEL_SRCS = [
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-wasmsimd-rr2-p5-u20-acc2.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-wasmsimd-rr2-p5-u20-acc5.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-wasmsimd-rr2-p5-u20.c",
"src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c16.c",
"src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c32.c",
"src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c64.c",
"src/f32-rminmax/gen/f32-rmax-wasmsimd-minmax-u4.c",
"src/f32-rminmax/gen/f32-rmax-wasmsimd-minmax-u8-acc2.c",
"src/f32-rminmax/gen/f32-rmax-wasmsimd-minmax-u12-acc3.c",
Expand Down
14 changes: 12 additions & 2 deletions scripts/generate-f32-rdsum.sh
Expand Up @@ -7,14 +7,24 @@
#################################### Scalar ###################################
tools/xngen src/f32-rdsum/scalar.c.in -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-scalar.c &

#################################### NEON ###################################
#################################### NEON #####################################
tools/xngen src/f32-rdsum/neon.c.in -D CHANNELS=16 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-neon-c16.c &
tools/xngen src/f32-rdsum/neon.c.in -D CHANNELS=32 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-neon-c32.c &
tools/xngen src/f32-rdsum/neon.c.in -D CHANNELS=64 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-neon-c64.c &

#################################### SSE ####################################
#################################### SSE ######################################
tools/xngen src/f32-rdsum/sse.c.in -D CHANNELS=16 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-sse-c16.c &
tools/xngen src/f32-rdsum/sse.c.in -D CHANNELS=32 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-sse-c32.c &
tools/xngen src/f32-rdsum/sse.c.in -D CHANNELS=64 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-sse-c64.c &

#################################### AVX ######################################
tools/xngen src/f32-rdsum/avx.c.in -D CHANNELS=16 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c16.c &
tools/xngen src/f32-rdsum/avx.c.in -D CHANNELS=32 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c32.c &
tools/xngen src/f32-rdsum/avx.c.in -D CHANNELS=64 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx-c64.c &

#################################### WAsm SIMD ################################
tools/xngen src/f32-rdsum/wasm-simd.c.in -D CHANNELS=16 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c16.c &
tools/xngen src/f32-rdsum/wasm-simd.c.in -D CHANNELS=32 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c32.c &
tools/xngen src/f32-rdsum/wasm-simd.c.in -D CHANNELS=64 -D ACCUMULATORS=7 -o src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-wasmsimd-c64.c &

wait
143 changes: 143 additions & 0 deletions src/f32-rdsum/avx.c.in
@@ -0,0 +1,143 @@
// Copyright 2024 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.

$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
#include <assert.h>

#include <immintrin.h>

#include <xnnpack/common.h>
#include <xnnpack/reduce.h>
#include <xnnpack/math.h>


$UNROLL = CHANNELS >> 3
void xnn_f32_rdsum_ukernel_${ACCUMULATORS}p${ACCUMULATORS}x__avx_c${CHANNELS}(
size_t rows,
size_t channels,
const float* input,
size_t input_stride,
const float* zero,
float* output,
const union xnn_f32_scale_params params[restrict XNN_MIN_ELEMENTS(1)])
{
assert(rows != 0);
assert(channels != 0);
assert(input != NULL);
assert(output != NULL);

const __m256 vscale = _mm256_set1_ps(params->avx.scale);

size_t input_increment = ${ACCUMULATORS} * input_stride;
for (; channels >= ${CHANNELS}; channels -= ${CHANNELS}) {
const float* i0 = input;
$for i in range(1, ACCUMULATORS):
const float* i${i} = (const float*) ((uintptr_t) input + ${i} * input_stride);

$for i in range(UNROLL):
__m256 vacc${i} = _mm256_setzero_ps();

for (int r = rows; r > 0; r -= ${ACCUMULATORS}) {
$for N in range(1, ACCUMULATORS, 2):
if XNN_UNPREDICTABLE(r < ${N+1}) {
i${N} = zero;
}
if XNN_UNPREDICTABLE(r <= ${N+1}) {
i${N+1} = zero;
}
$for c in range(UNROLL):
__m256 vin${c};
$for j in range(ACCUMULATORS):
$for c in range(UNROLL):
vin${c} = _mm256_loadu_ps(&i${j}[${c*8}]);
$for c in range(UNROLL):
vacc${c} = _mm256_add_ps(vin${c}, vacc${c});
$for N in range(0, ACCUMULATORS):
i${N} = (const float*) ((uintptr_t) i${N} + input_increment);
}
$for i in range(UNROLL):
vacc${i} = _mm256_mul_ps(vacc${i}, vscale);

const float* o = output;
$for i in range(0, UNROLL):
__m256 vo${i} = _mm256_loadu_ps(o); o += 8;
$for i in range(0, UNROLL):
vacc${i} = _mm256_add_ps(vo${i}, vacc${i});
$for i in range(0, UNROLL):
_mm256_storeu_ps(output, vacc${i}); output += 8;

input = (const float*) ((uintptr_t) input + ${CHANNELS} * sizeof(float));
}
__m256i vmask;
if (channels != 0) {
input_increment = ${ACCUMULATORS} * input_stride;
const float* i0 = input;
$for i in range(1, ACCUMULATORS):
const float* i${i} = (const float*) ((uintptr_t) input + ${i} * input_stride);
__m256 vacc[${UNROLL}];
$for i in range(UNROLL):
vacc[${i}] = _mm256_setzero_ps();

const size_t num_full_chunks = channels >> 3;
const size_t num_chunks = round_up_po2(channels, 8) >> 3;
const size_t remainder = channels & 0x7;
for (int r = rows; r > 0; r -= ${ACCUMULATORS}) {
$for N in range(1, ACCUMULATORS, 2):
if XNN_UNPREDICTABLE(r < ${N+1}) {
i${N} = zero;
}
if XNN_UNPREDICTABLE(r <= ${N+1}) {
i${N+1} = zero;
}
for (int i = 0; i < num_full_chunks; ++i) {
$for c in range(ACCUMULATORS):
vacc[i] = _mm256_add_ps(_mm256_loadu_ps(&i${c}[i*8]), vacc[i]);
}

if (remainder) {
vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &params->avx.mask_table[7] - (channels & 0x7) * sizeof(float)));
$for c in range(ACCUMULATORS):
vacc[num_full_chunks] = _mm256_add_ps(_mm256_maskload_ps(&i${c}[num_full_chunks*8], vmask), vacc[num_full_chunks]);
}
$for N in range(ACCUMULATORS):
i${N} = (const float*) ((uintptr_t) i${N} + input_increment);
}
for (size_t i = 0; i < num_chunks; ++i) {
vacc[i] = _mm256_mul_ps(vacc[i], vscale);
}

__m256 vo[${UNROLL}];
const float* o = output;
for (int i = 0; i < channels >> 3; ++i) {
vo[i] = _mm256_loadu_ps(o); o += 8;
}
for (int i = 0; i < channels >> 3; ++i) {
vacc[i] = _mm256_add_ps(vo[i], vacc[i]);
}
for (int i = 0; i < channels >> 3; ++i) {
_mm256_storeu_ps(output, vacc[i]); output += 8;
}
if (remainder) {
const size_t pos = num_full_chunks;
__m256 vout = vacc[pos];
const __m256 vdata = _mm256_maskload_ps(output, vmask);
vout = _mm256_add_ps(vout, vdata);
__m128 vout_lo = _mm256_castps256_ps128(vout);
if (channels & 4) {
_mm_storeu_ps(output, vout_lo);
vout_lo = _mm256_extractf128_ps(vout, 1);
output += 4;
}
if (channels & 2) {
_mm_storel_pi((__m64*) output, vout_lo);
vout_lo = _mm_movehl_ps(vout_lo, vout_lo);
output += 2;
}
if (channels & 1) {
_mm_store_ss(output, vout_lo);
}
}
}
}

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