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Verilog Implementation of an ARM LEGv8 CPU

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ARM LEGv8 CPU

GitHub license

This repository contains the source code for an ARM LEGv8 CPU written in Verilog.

Supported instructions include: LDUR, STUR, ADD, SUB, ORR, AND, CBZ, B, and NOP.

This CPU is based on the ARM architecture from the textbook: Computer Organization and Design: The Hardware/Software Interface ARM Edition by D. Patterson and J. Hennessy, Morgan Kaufmann, 2016 ISBN: 978-012-8017333

Versions

Assembler

legv8_asm.py is an assembler that converts ARM LEGv8 assembly into machine code (binary and hex).

Example
Enter an ARM LEGv8 Instruction: LDUR x10 [x1, #10]

------- C Interpretation -------
Register[10] = RAM[ Register[1] + 10 ]

------- Machine Code (32-bits) -------
BINARY : 11111000010000001010000000101010
HEX    : f840a02a

To Simulate

There are two ways to run and simulate the projects below. Either use the Xilinx Vivado or an online tool called EDA Playground.

Option 1. Xilinx Vivado
  • Run the Xilinx Vivado Suite with the module and testbench files for each project. More instructions can be found here.
Option 2. EDA Playground
  • Login with a Google or Facebook account to save and run modules and testbenches
  • Testbench + Design: SystemVerilog/Verilog
  • Tools & Simulators: Icarus Verilog 0.9.7

Credits

License

All source code in ARM-LEGv8 are released under the MIT license. See LICENSE for details.