Skip to content
#

kogge-stone-adder

Here are 8 public repositories matching this topic...

Performance-Analysis-of-Parallel-Prefix-Adders-Using-Zynq-7000-APSoC

Performed a comparative study of Parallel Prefix Adders using Verilog HDL on Zynq-7000 APSoC (PL) from XIlinx. Circuits are simulated, synthesized and implemented using Vivado Design Suite.

  • Updated Apr 13, 2021
  • Verilog

Improve this page

Add a description, image, and links to the kogge-stone-adder topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the kogge-stone-adder topic, visit your repo's landing page and select "manage topics."

Learn more